Now showing items 1-4 of 4

  • A Device-Level FPGA Simulator 

    Hunter, Jesse Everett III (Virginia Tech, 2000-04-07)
    In the realm of FPGAs, many tool vendors offer behaviorally-based simulators aimed at easing the complexity of large FPGA designs. At times, a behaviorally-modeled design does not work in hardware as expected or intended. ...
  • A Device-Level FPGA Simulator 

    Hunter III, Jesse Everett (Virginia Tech, 2004-06-10)
    In the realm of FPGAs, many tool vendors offer behaviorally-based simulators aimed at easing the complexity of large FPGA designs. At times, a behaviorally-modeled design does not work in hardware as expected or intended. ...
  • JHDLBits: An Open-Source Model for FPGA Design Automation 

    Poetter, Alexandra Vanessa (Virginia Tech, 2004-08-23)
    Today's Field Programmable Gate Array (FPGA) research community could use an extensible tool flow enabling designers to examine new algorithms and new methods of interacting with FPGA configurations. One such flow is ...
  • JHDLBits: An Open-Source Model for FPGA Design Automation 

    Poetter, Alexandra Vanessa (Virginia Tech, 2004-07-19)
    Today's Field Programmable Gate Array (FPGA) research community could use an extensible tool flow enabling designers to examine new algorithms and new methods of interacting with FPGA configurations. One such flow is ...