Modeling and Simulation of a Cascaded Three-Level Converter-Based SSSC
Hawley, Joshua Christiaan
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This thesis is dedicated to a comprehensive study of static series synchronous compensator (SSSC) systems utilizing cascaded-multilevel converters (CMCs). Among flexible AC transmission system (FACTS) controllers, the SSSC has shown feasibility in terms of cost-effectiveness in a wide range of problem-solving abilities from transmission to distribution levels. Referring to the literature reviews, the CMC with separated DC capacitors is clearly the most feasible topology for use as a power converter in the SSSC applications. The control for the CMC-Based SSSC is complicated. The design of the complicated control strategy was begun with well-defined system transfer functions. The stability of the system was achieved by trial and error processes, which were time-consuming and ineffective. The goal of this thesis is to achieve a reliable controller design for the CMC-based SSSC. Major contributions are addressed as follows: 1) accurate models of the CMC for reactive power compensations in both ABC and DQ0 coordinates, and 2) an effective decoupling power control technique. To simplify the control system design, well-defined models of the CMC-Based SSSC in both ABC and DQ0 coordinates are proposed. The proposed models are for the CMC-Based SSSC focus on only three voltage levels but can be expanded for any number of voltage levels. The key system transfer functions are derived and used in the controller design process. To achieve independent power control capability, the control technique, called the decoupling power control used in the design for the CMC-Based STATCOM is applied. This control technique allows both the real and reactive power components to be independently controlled. With the combination of the decoupling power control and the cascaded PWM, a CMC with any number of voltage levels can be simply modeled as a three-level cascaded converter, which is the simplest topology to deal with. This thesis focuses on the detailed design process needed for a CMC-Based SSSC.
- Masters Theses