A semiconductor random-accessor memory unit (RAM unit) is a connection of RAM chips, Data Cable, Chip Select Cable, and Address Cable so that each storage element can be selected for writing or reading independent of previous write or read. The faulty RAM unit is represented by a model consisting of four types of faults: RAM chip faults, D-fault, CS-fault, and A-fault. The testing of a RAM unit and locating faults to the RAM chips or wires in the various cables is considered. A set of six tests has been designed to diagnose the faults in the model. The tests are used in defining a relation, "test tj is invalid". on the fault model. The diagnostic graph of a RAM unit is drawn by using this relatioon and a sequence in which tests have to be performed obtained from this graph. By using this sequence faulty components in a RAM unit are located when at most one type of fault in the model is present. The symmetric array organization of storage elements in RAM chips is used in developing the tests with minimal length. Test generation is using the operations increment, decrement, compare and rotate, and quite easy to program.