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dc.contributor.authorZhang, Dien_US
dc.date.accessioned2014-03-14T20:11:40Z
dc.date.available2014-03-14T20:11:40Z
dc.date.issued2010-04-26en_US
dc.identifier.otheretd-05072010-115156en_US
dc.identifier.urihttp://hdl.handle.net/10919/27579
dc.description.abstractThree-phase voltage source converters(VSCs) have become the converter of choice in many ac medium and high power applications due to their many advantages, including low harmonics, high power factor, and high efficiency. Modular VSCs have also been a popular choice as building blocks to achieve even higher power, primarily through converter paralleling. In addition to high power ratings, paralleling converters can also provide system redundancy through the so-called (N+1) configuration for improved availability, as well as allow easy implementation of converter power management. Interleaving can further improve the benefit of paralleling VSCs by reducing system harmonic currents, which potentially can increase system power density. There are many challenges to implement interleaving in paralleled VSCs system due to the complicated relationships in a three-phase power converter system. In addition, to maximize the benefit of interleaving, current knowledge of symmetric interleaving is not enough. More insightful understanding of this PWM technology is necessary before implement interleaving in a real paralleled VSCs system. In this dissertation, a systematic methodology to analyze and design a paralleled three-phase voltage source converters with interleaving is developed. All the analysis and proposed control methods are investigated with the goal of maximizing the benefit of interleaving based on system requirement. The dissertation is divided into five sections. Firstly, a complete analysis studying the impact of interleaving on harmonic currents in ac and dc side passive components for paralleled VSCs is presented. The analysis performed considers the effects of modulation index, pulse-width-modulation (PWM) schemes, interleaving angle and displacement angle. Based on the analysis the method to optimize interleaving angle is proposed. Secondly, the control methods for the common mode (CM) circulating current of paralleled three-phase VSCs with discontinuous space-vector modulation (DPWM) and interleaving are proposed. With the control methods, DPWM and interleaving, which is a desirable combination, but not considered possible, can be implemented together. In addition, the total flux of integrated inter-phase inductor to limit circulating current can be minimized. Thirdly, a 15 kW three phase ac-dc rectifier is built with SiC devices. With the technologies presented in this dissertation, the specific power density can be pushed more than 2kW/lb. Fourthly, the converter system with low switching frequency is studied. Special issues such as beat phenomenon and system unbalance due to non-triplen carrier ratio is explained and solved by control methods. Other than that, an improved asymmetric space vector modulation is proposed, which can significantly reduce output current total harmonic distortion (THD) for single and interleaved VSCs system. Finally, the method to protect a system with paralleled VSCs under the occurrence of internal faults is studied. After the internal fault is detected and isolated, the paralleled VSCs system can continue work. So system reliability can be increased.en_US
dc.publisherVirginia Techen_US
dc.relation.haspartZhang_Di_D_2010(Updated).pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.subjectpassive component minimizationen_US
dc.subjecthigh power densityen_US
dc.subjectAsymmetric interleaving angleen_US
dc.subjectharmonic current reductionen_US
dc.subjectAsymmetric SVMen_US
dc.subjectInterleavingen_US
dc.subjectTHD reductionen_US
dc.subjectfailure mode analysisen_US
dc.titleAnalysis and Design of Paralleled Three-Phase Voltage Source Converters with Interleavingen_US
dc.typeDissertationen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.degreePh. D.en_US
thesis.degree.namePh. D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
dc.contributor.committeememberCenteno, Virgilio A.en_US
dc.contributor.committeememberLeech, Irene E.en_US
dc.contributor.committeememberDe La Ree Lopez, Jaimeen_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-05072010-115156/en_US
dc.contributor.committeecochairBoroyevich, Dushanen_US
dc.contributor.committeecochairWang, Fei Freden_US
dc.date.sdate2010-05-07en_US
dc.date.rdate2011-11-19
dc.date.adate2010-05-21en_US


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