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dc.contributor.authorBai, Guofengen_US
dc.date.accessioned2014-03-14T20:17:48Z
dc.date.available2014-03-14T20:17:48Z
dc.date.issued2005-10-21en_US
dc.identifier.otheretd-10312005-163634en_US
dc.identifier.urihttp://hdl.handle.net/10919/29409
dc.description.abstractThis research has developed a lead-free semiconductor device interconnect technology by studying the processing-microstructure-property relationships of low-temperature sintering of nanoscale silver pastes. The nanoscale silver pastes have been formulated by adding organic components (dispersant, binder and thinner) into nano-silver particles. The selected organic components have the nano-particle polymeric stabilization, paste processing quality adjustment, and non-densifying diffusion retarding functions and thus help the pastes sinter to ~80% bulk density at temperatures no more than 300°C. It has been found that the low-temperature sintered silver has better electrical, thermal and overall thermomechanical properties compared with the existing semiconductor device interconnecting materials such as solder alloys and conductive epoxies. After solving the organic burnout problems associated with the covered sintering, a lead-free semiconductor device interconnect technology has been designed to be compatible with the existing surface-mounting techniques with potentially low-cost. It has been found that the low-temperature sintered silver joints have high electrical, thermal, and mechanical performance. The reliability of the silver joints has also been studied by the 50-250°C thermal cycling experiment. Finally, the bonging strength drop of the silver joints has been suggested to be ductile fracture in the silver joints as micro-voids nucleated at microscale grain boundaries during the temperature cycling. The low-temperature silver sintering technology has enabled some benchmark packaging concepts and substantial advantages in future applications.en_US
dc.publisherVirginia Techen_US
dc.relation.haspartDissertation-GBai05.pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.subjectSilver jointen_US
dc.subjectReliabilityen_US
dc.subjectLead-free solutionen_US
dc.subjectSemiconductor device interconnectionen_US
dc.subjectLow-temperature sinteringen_US
dc.subjectElectronic packagingen_US
dc.subjectNanoscale silver pasteen_US
dc.titleLow-Temperature Sintering of Nanoscale Silver Paste for Semiconductor Device Interconnectionen_US
dc.typeDissertationen_US
dc.contributor.departmentMaterials Science and Engineeringen_US
dc.description.degreePh. D.en_US
thesis.degree.namePh. D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
thesis.degree.disciplineMaterials Science and Engineeringen_US
dc.contributor.committeechairLu, Guo-Quanen_US
dc.contributor.committeememberCorcoran, Sean Geralden_US
dc.contributor.committeemembervan Wyk, Jacobus Danielen_US
dc.contributor.committeememberReynolds, William T. Jr.en_US
dc.contributor.committeememberBoroyevich, Dushanen_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-10312005-163634/en_US
dc.date.sdate2005-10-31en_US
dc.date.rdate2006-11-14
dc.date.adate2005-11-14en_US


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