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dc.contributor.authoryin, jianen_US
dc.date.accessioned2006-01-03en_US
dc.date.accessioned2014-03-14T20:20:15Z
dc.date.available2006-01-03en_US
dc.date.available2014-03-14T20:20:15Z
dc.date.issued2005-12-09en_US
dc.date.submitted2005-12-13en_US
dc.identifier.otheretd-12132005-165616en_US
dc.identifier.urihttp://hdl.handle.net/10919/30076
dc.description.abstractThe work reported in this dissertation is intended to propose, analyze and demonstrate a technology for a high temperature integrated power electronics module, for high temperature (e.g those over 200oC) applications involving high density and low stress. To achieve this goal, this study has examined some existing packaging approaches, such as wire-bond interconnects and solder die-attach, flip-chip and pressure contacts. Based on the survey, a high temperature, multilayer 3-D packaging technology in the form of an Embedded Chip Module (ECM) is proposed to realize a lower stress distribution in a mechanically balanced structure with double-sided metallization layers and material CTE match in the structure. Thermal and thermo-mechanical analysis on an ECM is then used to demonstrate the benefits on the cooling system, and to study the material and structure for reducing the thermally induced mechanical stress. In the thermal analysis, the high temperature ECM shows the ability to handle a power density up to 284 W/in3 with a heat spreader only 2.1x2.1x0.2cm under forced convection. The study proves that the cooling system can be reduced by 76% by using a high temperature module in a room temperature environment. Furthermore, six proposed structures are compared using thermo-mechanical analysis, in order to obtain an optimal structure with a uniform low stress distribution. Since pure Mo cannot be electroplated, the low CTE metal Cr is proposed as the stress buffering material to be used in the flat metallization layers for a fully symmetrical ECM structure. Therefore, a chip area stress as low as 126MPa is attained. In the fabrication process, the high temperature material glass and a ceramic adhesive are applied as the insulating and sealing layers. Particularly, the Cr stress buffering layer is successfully electroplated in the high temperature ECM by means of the hard chrome plating process. The flat metallization layer is accomplished by using a combined structure with Cr and Cu metallization layers. The experimental evaluations, including the electrical and thermal characteristics of the ECM, have been part of in the study. The forward and reverse characteristics of the ECM are presented up to 250oC, indicating proper device functionality. The study on the reverse characteristics of the ECM indicates that the large leakage current at high temperature is not due to the package surrounding the chip, but chiefly caused by the Schottky junction and the chip passivation layer. Finally, steady-state and transient measurements are conducted in terms of the thermal measurements. The steady-state thermal measurement is used to demonstrate the cooling system reduction. To obtain the thermal parameters of the different layers in the high temperature ECM, the transient thermal measurement is applied to a single chip ECM based on the temperature cooling-down curve measurement.en_US
dc.publisherVirginia Techen_US
dc.relation.haspartdissertation.pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.subjectHigh temperatureen_US
dc.subject3-Den_US
dc.subjectthermal analysisen_US
dc.subjectintegrated power electronics moduleen_US
dc.subjectelectronic packagingen_US
dc.subjectthermo-mechanical analysisen_US
dc.subjectembedded chip moduleen_US
dc.titleHigh Temperature SiC Embedded Chip Module (ECM) with Double-sided Metallization Structureen_US
dc.typedissertationen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
thesis.degree.namePhDen_US
thesis.degree.leveldoctoralen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
dc.contributor.committeechairvan Wyk, Jacobus Danielen_US
dc.contributor.committeememberScott, Elaine P.en_US
dc.contributor.committeememberLu, Guo-quanen_US
dc.contributor.committeememberOdendaal, Willem Gerhardusen_US
dc.contributor.committeememberLiang, Zhenxianen_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-12132005-165616/en_US


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