Show simple item record

dc.contributor.authorMital, Manuen
dc.date.accessioned2014-03-14T20:21:11Zen
dc.date.available2014-03-14T20:21:11Zen
dc.date.issued2006-12-18en
dc.identifier.otheretd-12272006-150302en
dc.identifier.urihttp://hdl.handle.net/10919/30269en
dc.description.abstractAlmost all electronic devices require efficient conversion of electrical power from one form to another. Electrical power is used world wide at the rate of approximately 12 billion kW per hour. The Center for Power Electronics Systems at Virginia Tech was established with a vision to develop an integrated systems approach via integrated power electronic modules (IPEMs) to improve the reliability, cost-effectiveness, and performance of power electronics systems. IPEMs are multi-layered structures based on embedded power technology and offer the advantage of three-dimensional (3D) packaging of electronic components in a small and compact volume, replacing the traditional wire bonding technology. They have the potential to offer reduced time and effort associated with developing and manufacturing power processors. However, placing multiple heat generating chips in a small volume also makes thermal management more challenging. With the steady increase in the heat density of the electronic packages during the last few decades, thermal management is becoming a key enabling technology for the future growth of power electronics. The focus of this work is on using computational analysis tools and experimental techniques to assess fundamental and practical cooling limitations on IPEMs, developing both passive and active integrated thermal management strategies, and creating design guidelines for IPEMs based on both thermal and thermo-mechanical stress considerations. Specifically, a commercially available finite element package is used to create a 3D geometric layout of the electronic module. The baseline finite element numerical model is validated using bench-top wind tunnel experiments. The experimental setup is also employed to characterize the thermal behavior of chips in the multi-chip package and test the applicability of superposition methodology for temperature fields of chips within multi-chip modules. Using numerical models, both passive and active integrated thermal management strategies are investigated. The passive cooling strategies include advanced ceramic materials, copper trace thickness, and structural enhancements. Active cooling strategies include double-sided cooling using traditional heat sinks, and an extension of double-sided cooling concept using microchannels integrated with the module on both sides of embedded chips. The overall result of the work presented here is the better understanding of thermal issues and limitations with IPEM technology, and development of thermal design guidelines for cooling strategies that take into consideration both thermal and thermo-mechanical performance.en
dc.publisherVirginia Techen
dc.relation.haspartDefense_mmital.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectelectronic modulesen
dc.subjectthermal managementen
dc.subjectpower electronicsen
dc.subjectIPEMen
dc.titleIntegrated Thermal Management Strategies for Embedded Power Electronic Modulesen
dc.typeDissertationen
dc.contributor.departmentMechanical Engineeringen
dc.description.degreePh. D.en
thesis.degree.namePh. D.en
thesis.degree.leveldoctoralen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.disciplineMechanical Engineeringen
dc.contributor.committeechairScott, Elaine P.en
dc.contributor.committeememberWest, Robert L. Jr.en
dc.contributor.committeememberNellis, Gregory F.en
dc.contributor.committeememberLiang, Zhenxianen
dc.contributor.committeememberHuxtable, Scott T.en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-12272006-150302/en
dc.date.sdate2006-12-27en
dc.date.rdate2010-01-23en
dc.date.adate2007-01-23en


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record