dc.contributor.author | Newcomb, Jamie David | en |
dc.date.accessioned | 2014-03-14T20:31:13Z | en |
dc.date.available | 2014-03-14T20:31:13Z | en |
dc.date.issued | 2008-01-25 | en |
dc.identifier.other | etd-01312008-113612 | en |
dc.identifier.uri | http://hdl.handle.net/10919/31087 | en |
dc.description.abstract | In recent years, multi-core processors and multi-processor networks have grown in popularity as a solution to the limits on increasing clock speed, rising power consumption, and the nanometer manufacturing processes. Multi-core processors and multi-processor networks are seen as the next step in the advancement of computational capabilities by way of concurrent processing. However, parallel software design is difficult due to the immaturity of scalable architectures and software development environments for multi-core hardware.
How should processors effectively and quickly pass information, with as little overhead as possible? What kind of communication architecture is best suited for parallelism? How can large-scale architectures be quickly produced, verified and properly utilized by software? Using commercially available FPGA development boards, Xilinx tools and components, this thesis offers a light-weight solution to these questions for effective, low-overhead, low-latency multi-core communication and fast prototyping of multi-processor networks for scalable processor arrays. | en |
dc.publisher | Virginia Tech | en |
dc.relation.haspart | JD_Newcomb_Masters_Thesis.pdf | en |
dc.rights | In Copyright | en |
dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
dc.subject | multi-gigabit | en |
dc.subject | Aurora | en |
dc.subject | Xilinx | en |
dc.subject | Field programmable gate arrays | en |
dc.subject | multi-processor array | en |
dc.subject | multi-core | en |
dc.title | A Scalable Approach to Multi-core Prototyping | en |
dc.type | Thesis | en |
dc.contributor.department | Electrical and Computer Engineering | en |
dc.description.degree | Master of Science | en |
thesis.degree.name | Master of Science | en |
thesis.degree.level | masters | en |
thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
thesis.degree.discipline | Electrical and Computer Engineering | en |
dc.contributor.committeechair | Patterson, Cameron D. | en |
dc.contributor.committeemember | Schaumont, Patrick R. | en |
dc.contributor.committeemember | Buehrer, R. Michael | en |
dc.identifier.sourceurl | http://scholar.lib.vt.edu/theses/available/etd-01312008-113612/ | en |
dc.date.sdate | 2008-01-31 | en |
dc.date.rdate | 2008-04-22 | en |
dc.date.adate | 2008-04-22 | en |