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dc.contributor.authorNewcomb, Jamie Daviden_US
dc.date.accessioned2014-03-14T20:31:13Z
dc.date.available2014-03-14T20:31:13Z
dc.date.issued2008-01-25en_US
dc.identifier.otheretd-01312008-113612en_US
dc.identifier.urihttp://hdl.handle.net/10919/31087
dc.description.abstractIn recent years, multi-core processors and multi-processor networks have grown in popularity as a solution to the limits on increasing clock speed, rising power consumption, and the nanometer manufacturing processes. Multi-core processors and multi-processor networks are seen as the next step in the advancement of computational capabilities by way of concurrent processing. However, parallel software design is difficult due to the immaturity of scalable architectures and software development environments for multi-core hardware. How should processors effectively and quickly pass information, with as little overhead as possible? What kind of communication architecture is best suited for parallelism? How can large-scale architectures be quickly produced, verified and properly utilized by software? Using commercially available FPGA development boards, Xilinx tools and components, this thesis offers a light-weight solution to these questions for effective, low-overhead, low-latency multi-core communication and fast prototyping of multi-processor networks for scalable processor arrays.en_US
dc.publisherVirginia Techen_US
dc.relation.haspartJD_Newcomb_Masters_Thesis.pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.subjectmulti-gigabiten_US
dc.subjectAuroraen_US
dc.subjectXilinxen_US
dc.subjectFPGAen_US
dc.subjectmulti-processor arrayen_US
dc.subjectmulti-coreen_US
dc.titleA Scalable Approach to Multi-core Prototypingen_US
dc.typeThesisen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.degreeMaster of Scienceen_US
thesis.degree.nameMaster of Scienceen_US
thesis.degree.levelmastersen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
dc.contributor.committeechairPatterson, Cameron D.en_US
dc.contributor.committeememberSchaumont, Patrick Roberten_US
dc.contributor.committeememberBuehrer, Richard Michaelen_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-01312008-113612/en_US
dc.date.sdate2008-01-31en_US
dc.date.rdate2008-04-22
dc.date.adate2008-04-22en_US


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