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dc.contributor.authorLewis, Jr., Charles Williamen_US
dc.date.accessioned2014-03-14T20:34:37Z
dc.date.available2014-03-14T20:34:37Z
dc.date.issued2004-04-28en_US
dc.identifier.otheretd-04302004-104254en_US
dc.identifier.urihttp://hdl.handle.net/10919/32049
dc.description.abstract

Arguably, from the programmer's perspective, the programming model is the most important characteristic of any computer system. Perhaps this explains why, after many decades of research, architects and programmers alike continue to debate the appropriate programming model for parallel computers. Though thousands of programming models have been developed, standards such as PVM and MPI have made send-and-receive based message-passing the most popular programming model for distributed memory architectures. This thesis explores modifying the Single-Chip Message-Passing (SCMP) architecture to more efficiently support send-and-receive based message-passing. The proposed system is compared, for performance and programmability, to the active messaging programming model currently used by SCMP.

SCMP offers a unique platform for send-and-receive based message-passing. The SCMP design incorporates multiple multi-threaded processors, memory, and a network onto a single chip. This integration reduces the penalties of thread switching, memory access, and inter-process communication typically seen on more traditional distributed memory parallel machines. The mechanisms proposed in this thesis to support send-and-receive based message-passing on SCMP attempt to preserve and exploit these features as much as possible.

en_US
dc.publisherVirginia Techen_US
dc.relation.haspartcwl_thesis.pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.subjectSingle-Chip Computeren_US
dc.subjectParallel Computingen_US
dc.subjectMessage-Passingen_US
dc.titleSupport for Send-and-Receive Based Message-Passing for the Single-Chip Message-Passing Architectureen_US
dc.typeThesisen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.degreeMaster of Scienceen_US
thesis.degree.nameMaster of Scienceen_US
thesis.degree.levelmastersen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
dc.contributor.committeechairBaker, James M. Jr.en_US
dc.contributor.committeememberArthur, James D.en_US
dc.contributor.committeememberJones, Mark T.en_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-04302004-104254/en_US
dc.date.sdate2004-04-30en_US
dc.date.rdate2004-05-06
dc.date.adate2004-05-06en_US


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