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dc.contributor.authorFayez, Almohanad Samiren_US
dc.date.accessioned2014-03-14T20:35:02Z
dc.date.available2014-03-14T20:35:02Z
dc.date.issued2011-04-25en_US
dc.identifier.otheretd-05042011-190721en_US
dc.identifier.urihttp://hdl.handle.net/10919/32196
dc.description.abstractSoftware Defined Radios (SDRs) are radio implementations in software versus the classic method of using discrete electronics. Considering the various classes of radio applications ranging from mobile-handsets to cellular base-stations, SDRs cover a wide range of power and computational needs. As a result, computing heterogeneity, in terms of Field-Programmable Gate Arrays (FPGAs), Digital Signal Processors (DSPs), and General Purpose Processors (GPPs), is needed to balance the computing and power needs of such radios. Whereas SDR represents radio implementation, Cognitive Radio (CR) represents a layer of intelligence and reasoning that derives reconfiguration of an SDR to suit an application's need. Realizing CR requires a new dimension for radios, dynamically creating new radio implementations during runtime so they can respond to changing channel and/or application needs. This thesis explores the use of integrated GPP and DSP based processors for realizing SDR and CR applications. With such processors a GPP realizes the mechanism driving radio reconfiguration, and a DSP is used to implement the SDR by performing the signal processing necessary. This thesis discusses issues related to implementing radios in this computing environment and presents a sample solution for integrating both processors to create SDR-based applications. The thesis presents a sample application running on a Texas Instrument (TI) OMAP3530 processor, utilizing its GPP and DSP cores, on a platform called the Beagleboard. For the application, the Center for Wireless Telecommunications' (CWT) Public Safety Cognitive Radio (PSCR) is ported, and an Android based touch screen interface is used for user interaction. In porting the PSCR to the Beagleboard USB bandwidth and memory access latency issues were the main system bottlenecks. Latency measurements of these interfaces are presented in the thesis to highlight those bottlenecks and can be used to drive GPP/DSP based system design using the Beagleboard.en_US
dc.publisherVirginia Techen_US
dc.relation.haspartFayez_AS_T_2011_Copyright.pdfen_US
dc.relation.haspartFayez_AS_T_2011_1.pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.subjectDSPen_US
dc.subjectCognitive Radioen_US
dc.subjectSoftware Defined Radioen_US
dc.subjectOMAPen_US
dc.subjectHeterogeneous Processorsen_US
dc.titleDesigning a Software Defined Radio to Run on a Heterogeneous Processoren_US
dc.typeThesisen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
thesis.degree.nameMaster of Scienceen_US
thesis.degree.levelmastersen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
dc.contributor.committeechairBostian, Charles W.en_US
dc.contributor.committeememberPatterson, Cameron D.en_US
dc.contributor.committeememberMidkiff, Scott F.en_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-05042011-190721/en_US
dc.date.sdate2011-05-04en_US
dc.date.rdate2011-05-13
dc.date.adate2011-05-13en_US


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