Oscillator Phase Noise Reduction Using Nonlinear Design Techniques
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Phase noise from radio frequency (RF) oscillators is one of the major limiting factors affecting communication system performance. Phase noise directly effects short-term frequency stability, Bit-Error-Rate (BER), and phase-locked loop adjacent-channel interference. RF oscillator circuits contain at least one active device, usually a transistor. The active device has noise properties which generally dominate the noise characteristic limits of an oscillator. Since all noise sources, except thermal noise, are generally proportional to average current flow through the active device, it is logical that reducing the current flow through the device will lead to lower noise levels. A theory based on the time-varying properties of oscillators proposes that narrowing the current pulse width in the active device will decrease the time that noise is present in the circuit and therefore, decrease phase noise even further. The time-domain waveforms and phase noise of an active-biased 700MHz oscillator are analyzed, showing heavy saturation and high harmonic content. Redesigns of the example oscillator in active-bias and four-resistor-bias configurations show improved phase noise and lower harmonic levels at the output. Five oscillator designs of each bias configuration, each having a different pulse width, are simulated. As predicted by the theory, the narrowest current pulse corresponds to the lowest phase noise of the simulated oscillators.
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