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dc.contributor.authorIkuma, Takeshien_US
dc.date.accessioned2014-03-14T20:43:29Z
dc.date.available2014-03-14T20:43:29Z
dc.date.issued2001-07-11en_US
dc.identifier.otheretd-08152001-073548en_US
dc.identifier.urihttp://hdl.handle.net/10919/34544
dc.description.abstract

Accurate prediction of the Digital Subscriber Line (DSL) access rate - over an existing plain old telephone service (POTS) twisted pair local loop - is vital to DSL providers. We have approached the challenge as an identification problem of the local loop structure and its twisted pair parameters, utilizing single-point measurements made at the provider end of the loop. Once the loop model is obtained, its connectivity measure is readily obtained through simulation.

The single-point measurement setup of a twisted-pair local loop is modeled as a linear time-invariant (LTI) system. Its frequency response is simulated based on the VT-TDL twisted-pair lumped circuit model. Study of the time-domain reflectometry (TDR) response, based on transmission line theory, reveals that the TDR response is a linear combination of reflections associated with loop nodes. An iterative modeling method is presented in which one loop node at a time is identified by analyzing embedded reflections in order of (temporal) appearance. This procedure is found not effective when several TDR reflections are heavily overlapping. To resolve the overlapping reflections, two variations of the Method Of Direction Estimation (MODE) algorithm are considered. The first is a hybrid of MODE and a weighted Fourier transform relaxation-based algorithm (MODE-WRELAX algorithm) and the second is the MODE-type algorithm. The MODE-type algorithm, with its signal model showing behavior analogous to that of the dispersive twisted pair behavior, is found more effective than MODE-WRELAX. To combine the iterative modeling procedure and the MODE-type algorithm, a second identification procedure is proposed which processes a limited number of frequency response data. The latter frequency domain procedure is found to be capable of correctly identifying 70 % of the Carrier Serving Area (CSA) and American National Standard Institute (ANSI) test loops.

en_US
dc.publisherVirginia Techen_US
dc.relation.haspart14_Chapter_7.pdfen_US
dc.relation.haspart17_Vita.pdfen_US
dc.relation.haspart06_List_of_Tables.pdfen_US
dc.relation.haspart07_List_of_Abbreviations.pdfen_US
dc.relation.haspart15_References.pdfen_US
dc.relation.haspart09_Chapter_2.pdfen_US
dc.relation.haspart08_Chapter_1.pdfen_US
dc.relation.haspart00_Title.pdfen_US
dc.relation.haspart12_Chapter_5.pdfen_US
dc.relation.haspart02_Dedication.pdfen_US
dc.relation.haspart16_Appendix_A.pdfen_US
dc.relation.haspart13_Chapter_6.pdfen_US
dc.relation.haspart05_List_of_Figures.pdfen_US
dc.relation.haspart04_Table_of_Contents.pdfen_US
dc.relation.haspart11_Chapter_4.pdfen_US
dc.relation.haspart10_Chapter_3.pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.titleModel-Based Identification of POTS Local Loops for DSL Connectivity Predictionen_US
dc.typeThesisen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.degreeMaster of Scienceen_US
thesis.degree.nameMaster of Scienceen_US
thesis.degree.levelmastersen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-08152001-073548/en_US
dc.date.sdate2001-08-15en_US
dc.date.rdate2002-08-22
dc.date.adate2001-08-22en_US


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