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dc.contributor.authorPriya, Kanuen_US
dc.date.accessioned2014-03-14T20:44:02Z
dc.date.available2014-03-14T20:44:02Z
dc.date.issued2011-07-22en_US
dc.identifier.otheretd-08222011-133618en_US
dc.identifier.urihttp://hdl.handle.net/10919/34709
dc.description.abstractPhysical Unclonable Functions (PUFs) provide a secure, power efficient and non-volatile means of chip identification. These are analogous to one-way functions that are easy to create but impossible to duplicate. They offer solutions to many of the FPGA (Field Programmable Gate Array) issues like intellectual property, chip authentication, cryptographic key generation and trusted computing. Moreover, FPGA evolving as an important platform for flexible logic circuit, present an attractive medium for PUF implementation to ensure its security. In this thesis, we explore the behavior of RO-PUF (Ring Oscillator Physical Unclonable Functions) on FPGA when subjected to low voltages. We investigate its stability by applying environmental variations, such as temperature changes to characterize its effectiveness. It is shown with the help of experiment results that the spread of frequencies of ROs widens with lowering of voltage and stability is expected. However, due to inherent circuit challenges of FPGA at low voltage, RO-PUF fails to generate a stable response. It is observed that more number of RO frequency crossover and counter value fluctuation at low voltage, lead to instability in PUF. We also explore different architectural components of FPGA to explain the unstable nature of RO-PUF. It is reasoned out that FPGA does not sustain data at low voltage giving out unreliable data. Thus a low voltage FPGA is required to verify the stability of RO-PUF. To emphasize our case, we look into the low power applications research being done on FPGA. We conclude that FPGA, though flexible, being power inefficient, requires optimization on architectural and circuit level to generate stable responses at low voltages.en_US
dc.publisherVirginia Techen_US
dc.relation.haspartPriya_Kanu_T_2011.pdfen_US
dc.rightsI hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to Virginia Tech or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.en_US
dc.subjectLow Poweren_US
dc.subjectStabilityen_US
dc.subjectPhysical Unclonable Functionsen_US
dc.subjectRing Oscillatoren_US
dc.subjectProcess Variationen_US
dc.subjectUniquenessen_US
dc.titleStudy of Physical Unclonable Functions at Low Voltage on FPGAen_US
dc.typeThesisen_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
thesis.degree.nameMaster of Scienceen_US
thesis.degree.levelmastersen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
dc.contributor.committeechairNazhandali, Leylaen_US
dc.contributor.committeememberTront, Joseph G.en_US
dc.contributor.committeememberSchaumont, Patrick Roberten_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-08222011-133618/en_US
dc.date.sdate2011-08-22en_US
dc.date.rdate2011-09-15
dc.date.adate2011-09-15en_US


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