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dc.date.accessioned2016-08-24T17:53:59Z
dc.date.available2016-08-24T17:53:59Z
dc.date.issued1998-10-06
dc.identifier.urihttp://hdl.handle.net/10919/72368
dc.description.abstractA process for producing a ferroelectric lead zirconate titanate dielectric for a semiconductor device by applying a lead titanate seeding layer to a substrate before applying the lead zirconate titanate film, and a semiconductor device produced in accordance with the process. The lead titanate seeding layer allows the subsequent lead zirconate titanate to be annealed at a significantly lower seeding temperature, to lessen interdiffusion among the films, electrodes and substrate and to lessen thermal stresses.
dc.format.mimetypeapplication/pdf
dc.language.isoen_USen_US
dc.publisherUnited States Patent and Trademark Office
dc.titleLow temperature seeding process for ferroelectric memory device
dc.typePatent
dc.identifier.urlhttp://pimg-fpiw.uspto.gov/fdd/70/171/058/0.pdf
dc.date.accessed2016-08-19
dc.type.dcmitypeText
dc.contributor.assigneeCedraeus Incorporated
dc.contributor.assigneeVirginia Tech Intellectual Properties, Inc.
dc.contributor.assigneeSharp Kabushiki Kaisha
dc.contributor.inventorDesu, Seshu B.
dc.contributor.inventorKwok, Chi Kong
dc.date.filed1994-08-29
dc.identifier.applicationnumber8298344
dc.subject.uspc117/2
dc.subject.uspcother117/84
dc.subject.uspcother257/E21.010
dc.subject.uspcother257/E21.272
dc.subject.uspcother427/126.3
dc.subject.uspcother427/419.2
dc.subject.cpcC23C18/1208
dc.subject.cpcC23C18/1225
dc.subject.cpcC23C18/1254
dc.subject.cpcH01L28/56
dc.subject.cpcH01L21/02197
dc.subject.cpcH01L21/02282
dc.subject.cpcH01L21/02304
dc.subject.cpcH01L21/02356
dc.subject.cpcH01L21/02362
dc.type.patenttypeutility
dc.identifier.patentnumber5817170


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