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dc.date.accessioned2016-08-24T17:53:59Zen
dc.date.available2016-08-24T17:53:59Zen
dc.date.issued1998-10-06en
dc.identifier.urihttp://hdl.handle.net/10919/72368en
dc.description.abstractA process for producing a ferroelectric lead zirconate titanate dielectric for a semiconductor device by applying a lead titanate seeding layer to a substrate before applying the lead zirconate titanate film, and a semiconductor device produced in accordance with the process. The lead titanate seeding layer allows the subsequent lead zirconate titanate to be annealed at a significantly lower seeding temperature, to lessen interdiffusion among the films, electrodes and substrate and to lessen thermal stresses.en
dc.format.mimetypeapplication/pdfen
dc.language.isoen_USen
dc.publisherUnited States Patent and Trademark Officeen
dc.titleLow temperature seeding process for ferroelectric memory deviceen
dc.typePatenten
dc.identifier.urlhttp://pimg-fpiw.uspto.gov/fdd/70/171/058/0.pdfen
dc.date.accessed2016-08-19en
dc.type.dcmitypeTexten
dc.contributor.assigneeCedraeus Incorporateden
dc.contributor.assigneeVirginia Tech Intellectual Properties, Inc.en
dc.contributor.assigneeSharp Kabushiki Kaishaen
dc.contributor.inventorDesu, Seshu B.en
dc.contributor.inventorKwok, Chi Kongen
dc.date.filed1994-08-29en
dc.identifier.applicationnumber8298344en
dc.subject.uspc117/2en
dc.subject.uspcother117/84en
dc.subject.uspcother257/E21.010en
dc.subject.uspcother257/E21.272en
dc.subject.uspcother427/126.3en
dc.subject.uspcother427/419.2en
dc.subject.cpcC23C18/1208en
dc.subject.cpcC23C18/1225en
dc.subject.cpcC23C18/1254en
dc.subject.cpcH01L28/56en
dc.subject.cpcH01L21/02197en
dc.subject.cpcH01L21/02282en
dc.subject.cpcH01L21/02304en
dc.subject.cpcH01L21/02356en
dc.subject.cpcH01L21/02362en
dc.type.patenttypeutilityen
dc.identifier.patentnumber5817170en


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