Wireless body area networks (WBANs) have tremendous potential to benefit from wireless communication technology and are expected to make sweeping changes in the future human health care and medical fields. While the prospects for WBAN products are high, meeting required device performance with a meager amount of power consumption poses significant design challenges. In order to address these issues, IEEE has recently developed a draft of IEEE 802.15.6 standard dedicated to low bit-rate short-range wireless communications on, in, or around the human body. Commercially available SoC (System-on-Chip) devices targeted for WBAN applications typically embed proprietary wireless transceivers. However, those devices usually do not meet the quality of service (QoS), low power, and/or noninterference necessary for WBAN applications, nor meet the IEEE standard specifications. This dissertation presents a design of low-power RF front-end conforming to the IEEE standard in Medical Communication Service (MICS) band of 402-405 MHz.

First, we investigated IEEE 802.15.6 PHY specifications for narrow band WBAN applications. System performance analysis and simulation for an AWGN (additive white Gaussian noise) channel was conducted to obtain the BER (bit error rate) and the PER (packet error rate) as the figure of merit. Based on the system performance study, the link budget was derived as a groundwork for our RF front-end design. Next, we examined candidate RF front-end architectures suitable for MICS applications. Based on our study, we proposed to adopt a direct conversion transmitter and a low-IF receiver architecture for the RF front-end. An asynchronous wake-up receiver was also proposed, which is composed of a carrier sensing circuit and a serial code detector. Third, we proposed and implemented low-power building blocks of the proposed RF front-end. Two quadrature signal generation techniques were proposed and implemented for generation of quadrature frequency sources. The two quadrature voltage controlled oscillators (QVCOs) were designed using our proposed current-reuse VCO with two damping resistors. A stacked LNA and a down-conversion mixer were proposed for low supply and low power operation for the receiver front-end. A driver amplifier and an up-conversion mixer for the transmitter front-end were implemented. The proposed driver amplifier uses cascaded PMOS transistors to minimize the Miller effect and enhance the input/output isolation. The up-conversion mixer is based on a Gilbert cell with resistive loads. Simulation results and performance comparisons for each designed building block are presented. Finally, we present a case study on a direct VCO modulation transmitter and a super-regenerative receiver, which can also be suitable for an MICS transceiver. Several crucial building blocks including a digitally-controlled oscillator (DCO) and quench signal generators are proposed and implemented with a small number of external components.