The continued scaling of feature size in silicon (Si)-based complimentary metal-oxide-semiconductor (CMOS) technology has led to a rapid increase in compute power. Resulting from increases in device densities and advances in materials and transistor design, integrated circuit (IC) performance has continued to improve while operational power (VDD) has been substantially reduced. However, as feature sizes approach the atomic length scale, fundamental limitations in switching characteristics (such as subthreshold slope, SS, and OFF-state power dissipation) pose key technical challenges moving forward. Novel material innovations and device architectures, such as group IV and III-V materials and tunnel field-effect transistors (TFETs), have been proposed as solutions for the beyond Si era. TFETs benefit from steep switching characteristics due to the band-to-band tunneling injection of carriers from source to channel. Moreover, the narrow bandgaps of III-V and germanium (Ge) make them attractive material choices for TFETs in order to improve ON-state current and reduce SS. Further, Ge grown on InₓGa₁₋ₓAs experiences epitaxy-induced strain (ε), further reducing the Ge bandgap and improving carrier mobility. Due to these reasons, the ε-Ge/InₓGa₁₋ₓAs system is a promising candidate for future TFET architectures. In addition, the ability to tune the bandgap of Ge via strain engineering makes ε-Ge/InₓGa₁₋ₓAs heterostructures attractive for nanoscale group IV-based photonics, thereby benefitting the monolithic integration of electronics and photonics on Si. This research systematically investigates the material, optical, and heterointerface properties of ε-Ge/InₓGa₁₋ₓAs heterostructures on GaAs and Si substrates. The effect of strain on the heterointerface band alignment is comprehensively studied, demonstrating the ability to modulate the effective tunneling barrier height (Ebeff) and thus the threshold voltage (VT), ON-state current, and SS in future ε-Ge/InₓGa₁₋ₓAs TFETs. Further, band structure engineering via strain modulation is shown to be an effective technique for tuning the emission properties of Ge. Moreover, the ability to heterogeneously integrate these structures on Si is demonstrated for the first time, indicating their viability for the development of next-generation high performance, low-power logic and photonic integrated circuits on Si.