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dc.contributor.authorCameron, Kirk W.en_US
dc.contributor.authorAnwar, Alien_US
dc.contributor.authorCheng, Yueen_US
dc.contributor.authorXu, Lien_US
dc.contributor.authorLi, Boen_US
dc.contributor.authorAnanth, Udayen_US
dc.contributor.authorLux, Thomasen_US
dc.contributor.authorHong, Yilien_US
dc.contributor.authorWatson, Layne T.en_US
dc.contributor.authorButt, Ali R.en_US
dc.date.accessioned2018-04-20T00:42:55Z
dc.date.available2018-04-20T00:42:55Z
dc.date.issued2018-04-19
dc.identifier.urihttp://hdl.handle.net/10919/82857
dc.description.abstractExponential increases in complexity and scale make variability a growing threat to sustaining HPC performance at exascale. Performance variability in HPC I/O is common, acute, and formidable. We take the first step towards comprehensively studying linear and nonlinear approaches to modeling HPC I/O system variability. We create a modeling and analysis approach (MOANA) that predicts HPC I/O variability for thousands of software and hardware configurations on highly parallel shared-memory systems. Our findings indicate nonlinear approaches to I/O variability prediction are an order of magnitude more accurate than linear regression techniques. We demonstrate the use of MOANA to accurately predict the confidence intervals of unmeasured I/O system configurations for a given number of repeat runs – enabling users to quantitatively balance experiment duration with statistical confidence.en_US
dc.publisherDepartment of Computer Science, Virginia Polytechnic Institute & State Universityen_US
dc.relation.ispartofComputer Science Technical Reportsen_US
dc.subjectComputer Systemsen_US
dc.subjectHigh Performance Computingen_US
dc.subjectParallel and Distributed Computingen_US
dc.titleMOANA: Modeling and Analyzing I/O Variability in Parallel System Experimental Designen_US
dc.typeTechnical reporten_US
dc.identifier.trnumberTR-18-04en_US
dc.type.dcmitypeTexten_US


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