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dc.contributor.authorSathe, Shirish K.
dc.date.accessioned2019-03-26T19:16:49Z
dc.date.available2019-03-26T19:16:49Z
dc.date.issued1982
dc.identifier.urihttp://hdl.handle.net/10919/88557
dc.format.extentvii, 113, [1] leaves
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherVirginia Polytechnic Institute and State University
dc.rightsThe authors of the theses and dissertations are the copyright owners. Virginia Techs Digital Library and Archives has their permission to store and provide access to these works.
dc.subject.lccLD5655.V855 1982.S274
dc.subject.lcshIntegrated circuits -- Large scale integration -- Simulation methods
dc.titleFunctional level fault simulation of LSI devices
dc.typeThesis
dc.contributor.departmentElectrical Engineering
dc.description.degreeMaster of Science
dc.identifier.oclc09223472
thesis.degree.nameMaster of Science
thesis.degree.levelmasters
thesis.degree.grantorVirginia Polytechnic Institute and State University
dc.type.dcmitypeText


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