Dynamic Current Sharing Issues with Paralleling SiC Power MOSFETs

Abstract

This work comprehensively evaluates the key factors that impact the dynamic current sharing of paralleling silicon carbide (SiC) MOSFETs at the phase-leg circuit level. The power device matching is necessary and is well-known method to improve current balance. Stray inductance differences in the power loop, gate drive loop, and printed circuit board (PCB) layout are also well-known key factors. In addition to the above conventional sorting and passive matching methods, this paper proposes additional active matching approach by using the negative gate-off voltage, which can not only eliminate switching noise induced false turn on, but also help current sharing with gating signal delay matching similar to adjusting gate resistance. Impact of all key factors have been verified through experimental results.