Board level diagnosis techniques using VHDL modeling

Abstract

This thesis presents a program developed to implement techniques for troubleshooting digital boards. There are old boards still in service that have no built in testing circuits. This makes troubleshooting them time consuming and difficult. In making this program two questions were posed; "How would a technician normally perform this operation?" and "How can a program help him/her do this better?" Having experience as a technician himself, the author could easily answer the first question. The experienced technician would put a known sequence of inputs into the board and compare the actual outputs to the expected. Any outputs that did not compare would lead the technician to the section of board most closely related to the fault. Within this new section, new signals are probed while the same patterns of inputs are repeated. This technique is commonly referred to as bracketing. Bracketing involves these four steps:

1.Select where to probe. 2.Run test inputs and sample. 3.Use sampled information to reduce the suspect set. 4.If the suspect set is not a single component then repeat steps 1 through 4.

The answer to the second question has no easy answer. That is where it is hoped this program can help. The program uses information from a non-faulted VHDL model of the board to learn what to expect. Since there is no interface to a real probed board, VHDL is also used to model the faulted board.