Center for Power Electronics Systems PROGRESS REPORT FRED C. LEE DUSHAN BOROYEVICH 10 YEAR PARTNER UNIVERSITIES University of Wisconsin-Madison Rensselaer Polytechnic Institute University of Puerto Rico-Mayagüez North Carolina A&T State University at Virginia Polytechnic Institute and State University DIRECTOR CO-DIRECTOR This space left blank Center for Power Electronics Systems PARTNER UNIVERSITIES University of Wisconsin-Madison Rensselaer Polytechnic Institute University of Puerto Rico-Mayagüez North Carolina A&T State University at Virginia Polytechnic Institute and State University DUSHAN BOROYEVICHDIRECTORFRED C. LEE CO-DIRECTOR PROGRESS REPORT 10 YEAR Produced by Uncork-it Communications, Blacksburg, VA CPES 10 YEAR PROGRESS REPORT 2010 CPES 10 YEAR PROGRESS REPORT Chapter 1: Introduction Outlines the CPES systems vision, the concept of the IPEM, and the initial formation of the CPES team. Chapter 2: History of Power Electronics Describes how the goals and achievements of CPES build on thinking and developments in the field. Chapter 3: Center Program Overview Discusses the center research through a 3-plane, 4-generation structure. Breaks down the three planes and overviews progress in engineered systems, enabling technology, and fundamental knowledge. Summarizes educational outreach, industrial collaboration, and facilities construction and improvement. Chapter 4: Outcomes & Impacts Summarizes the Center’s impact: the creation and commercializa- tion of the IPEM concept, the transformation of the power electron- ics discipline nationally and internationally, and the positive effects visible in the universities participating in the ERC. Chapter 5: Achievements The Center’s successes and accomplishments in research, industrial relations, education & outreach, and infrastructure. Chapter 6: Beyond Graduation The CPES vision for the future: post-graduation plan, technology roadmap, post-ERC research, sustainable building technology, other research programs, education & outreach, and the business plan. 1.0 2.0 3.0 4.0 5.0 6.0 CONTENTS 1.0 CPES 10 YEAR PROGRESS REPORT 2010 1.1 A Systems Vision A Need for a New Power Electronics Perspective The IPEM Concept Building the Team 1.2 1.4 1.6 1.8 INTRODUCTION CHAPTER 1 1: INTRODUCTION1.2 Electricity is used at an average rate of 40 bil-lion kilowatt-hours worldwide every day of every year. With few exceptions, the electric-ity is not used in its raw form. Instead, the machines, motors and electronics equipment convert electricity into the specific form they need. The con- version of electrical power from one form to another increasingly uses the technology — and the engineer- ing discipline — of power electronics. An enabling infrastructure technology Power electronics and related power-processing techniques constitute an “enabling infrastructure tech- nology.” Worldwide sales of power electronics equip- ment top $60 billion each year and support another $2 trillion in hardware/software electronics. Advances in power electronics technology can reduce losses in power conversion and more precisely control electri- cal power for manufacturing operations. These, in turn, can increase energy efficiency of equipment and processes using electrical power, raise industrial pro- ductivity and improve product quality. Such advances could have a huge impact on U.S. industrial competi- tiveness. Environmental benefits Power electronics can also yield environmental benefits. For example, the 2003 EPRI Electricity Tech- nology Roadmap identified high-efficiency end-uses of electricity as one of the key challenges to achieving its vision of an extremely reliable power delivery sys- tem that increases economic growth rates with mini- mal environmental impact. High-efficiency lighting systems, motor drives and power supplies were listed among the highest priority capability gaps. The effi- ciency of all of those applications can be greatly im- proved with advanced power electronics. Reducing energy consumption With the widespread use of power electronics technology, the United States would be able to cut elec- trical energy consumption by 33 percent. The energy savings, by today’s measure, is equivalent to the total output of 840 fossil fuel-based generating plants. This would result in enormous economic, environmental and social benefits. The engineers of the Center for Power Electron- ics Systems (CPES) are working to make electric power processing more efficient and more exact in order to achieve these benefits. The effort requires close col- laboration with industry and with researchers across universities and fields of endeavor. Electrification is considered the greatest engineering feat of the 20th century by the National Academy of Engineering. The dream of CPES engineers is to take electricity to the next step and develop power processing systems of the highest value to society. A Systems Vision INTRODUCTION CPES 10 YEAR PROGRESS REPORT 2010 1.3 12 billion kilowatts every hour of every day of every year 1: INTRODUCTION1.4 A need for a new power electronics perspective State of the industry – 1998 In 1998, U.S. power electronics systems were typi-cally custom-designed, non-standard units con-taining 300-400 electronic components, with little integration and fairly low reliability. Long design cycles and labor-intensive manufacturing processes created excessive costs and a weakened U.S. power electronics industry. In the 1980s, power electron- ics had been considered a core enabling technology for major corporations in the U.S. However, in the 1990s, the major corporations adopted outsourcing strategies and spun off their power electronics divi- sions. What had been a captive market was trans- formed into a merchant market, with fewer resources devoted to technical advancement in the technology. Consequently, innovative solutions grew scarce. Power electronics products became commoditized and cost- driven and manufacturing migrated to countries with low labor costs. U.S. industry had become bottom-line focused and spent little on development — even less on research. Research challenges Meanwhile, university research efforts advanced component and process technology for power elec- tronics, but did not yield the overall improvement needed for the next generation of motors and elec- tronics. Funding for research in the field was very com- petitive and research groups had little incentive to col- laborate, especially across universities and fields. With fragmented academic research efforts and decreasing industrial innovation, power electronics needed a new research paradigm if the technology was going to deliver its promised efficiencies. It was a challenging engineering problem, both operationally and techno- logically. ERC mission In 1998, the National Science Foundation (NSF) established the Center for Power Electronics Systems as an Engineering Research Center (ERC) to develop advanced electronic power conversion technologies for efficient electric energy utilization through multi- disciplinary engineering research and education. The initial research vision was based on the con- cept of developing standardized, modularized inte- grated power electronics modules (IPEM) “to enable dramatic improvements in the performance, reliabil- ity and cost-effectiveness of electric energy processing systems.” IPEM vision The envisioned integrated power electronics solu- tion is based on advanced packaging of a new genera- tion of devices and innovative circuits and functions in the form of building blocks with integrated function- ality, standardized interfaces, suitability for automated manufacturing and mass production, and application versatility, namely IPEMs, and the integration of these building blocks into application-specific systems solu- tions. The impact of this paradigm shift can be com- pared to the impact realized via the improvements in very-large-scale integrated (VLSI) circuit technology that has enabled significant advancement in computer and telecommunications equipment. INTRODUCTION CPES 10 YEAR PROGRESS REPORT 2010 1.5 SIGNAL PROCESSING — IC POWER PROCESSING — IPEM Moore’s Law Prevails through • Standardization • Manufacturability • Volume production • Cost reduction IPEM Expected Impact through • Building blocks • Reduced labor • Low cost 1: INTRODUCTION1.6 The IPEM Concept The IPEMs will be standardized, off-the-shelf units for any range of power application, in-cluding computer, telecommunications, and aerospace applications, as well as high-volume commercial and industrial power conversion equip- ment and motor drives. The IPEM approach makes possible increased levels of integration in the compo- nents that comprise a power electronics system–de- vices, circuits, controls, sensors, and actuators–which are integrated into standardized, manufacturable sub- assemblies and modules that, in turn, are customized for a particular application. In 1998, U.S. power electronics systems were typi- cally custom-designed units containing 300–400 elec- tronics components, with little integration and fairly low reliability. Individually packaged power devices were mounted on a heat sink, with the driver, sensors and protection circuits implemented on a printed cir- cuit board (PCB), which was mounted on top of the power devices. In addition, a control circuitry and mi- croprocessor board was mounted on top of the driver board. The manufacturing process was labor intensive and costly, with a typical cycle time between 16 and 24 months. Conceptual IPEM The IPEM concept involves packaging advanced power semiconductor devices and diodes in chip form. Power devices, such as MOSFETs or IGBTs, are used to form a building block die. A number of these dies are mounted on a substrate with high thermal conduc- tivity. Multi-chip module co-fired ceramic (MCM-C) technology is employed, with the ability to intercon- nect through proper electrical vias. For example, the MCM module can be built on a high-performance ceramic or metal-matrix composite to enable effective thermal management. The control circuitry, gate buffers, current, temperature sensors, level shifting circuit, and the protection circuit of the IPEM is fabricated on a conventional ceramic using surface-mount components and devices. The entire assembly is attached to a cold plate. A microprocessor controller interfaces directly with the IPEM to provide all necessary control functions. This IPEM approach will give U.S. power electronic equipment manufacturers the capacity to pool similar technologies and resources to manufacture integrated power electronics systems. Interconnections for Control Circuits Chip-Form Devices Deposited Vias Surface Mount Components Top Metal Layer Ceramic SubstrateHeat Spreader Advanced Power Devices Thin-Film or Thick-Film Mounting Insulating Layer Bottom Metal Layer CONCEPTUAL IPEM WITH INTEGRATED GATE DRIVER INTRODUCTION CPES 10 YEAR PROGRESS REPORT 2010 Generator Filter Ac-Dc Rectifier Inverter Inverter Dc/Dc Converter LoadGenerator Filter ac/dc Rectifier dc/dc Converter Inverter High Voltage dc Power Bus Load Utility Bus Inverter 1.7 Embedded Power 800 V, 80 A Passive Module Packaging LC in DIP Integrated EMI filter Differential and Common-Mode Double-Sided Cooling SC-IPEM Integrated Transmission Line EMI Filter Differential and Common-Mode 3D Active/ Passive/Thermal Integration Stacked Power 24 A, 260 W/in3 Flex Power 600 V, 15 A Standard- Cell IPEM Flip-Chip on Flex 800 V, 90 A IPEMS AND THEIR APPLICATIONS IPEM-BASED SYSTEM 1: INTRODUCTION1.8 The research goal could not be accomplished by any single group and CPES was established as a consortium of five universities, with more than 80 industry members. Industrial collaboration and technology transfer were critical goals, as the pow- er electronics solutions would need to be integrated quickly into commercial products. Because of the lack of power electronics specialists in U.S. firms, CPES was also tasked with developing enough trained engineers and scientists to carry the technology forward. A winning team A major strength of CPES is its ability to use a wealth of existing resources and industrial collabo- ration. Virginia Tech, the University of Wisconsin- Madison (UW), and Rensselaer Polytechnic Institute (RPI) are the nation’s leaders in power electronics and advanced power semiconductor materials and devices. These three universities have combined forces with North Carolina A&T State University (NCA&T) and the University of Puerto Rico-Mayagüez (UPRM), which are institutions with solid reputations in the quality of their undergraduate engineering programs as well as their power electronics and related research. Virginia Tech brings expertise in high-frequency power conversion devices and circuit technologies, power electronics packaging, and systems integration. The University of Wisconsin has expertise in industrial and utility-grade power conversion, electric machines and motor drives, and industrial controls. RPI’s exper- tise involves novel discrete power semiconductor ma- terials, process techniques, power devices, and smart power ICs. North Carolina A&T contributes knowl- edge of nonlinear control, neural networks, and fuzzy logic-based intelligent control, and the University of Puerto Rico-Mayagüez has expertise in controls and electric machines. The resources and expertise of re- searchers from each of these institutions have contrib- uted to the success of the Center. CPES industry members have been the critical key in our success. From the beginning, industry members have been enthusiastic and involved, helping shape goals and contributing to the management of the ERC. Since 1998, CPES research goals have evolved and the collaborations with industry and university researchers have strengthened. CPES succeeded in changing the technology of power electronics, while increasing knowledge and participation in the field. As we graduate from the NSF ERC program, we look forward to building on our global collaboration and changing the way electricity is used. Building the Team INTRODUCTION CPES 10 YEAR PROGRESS REPORT 2010 1.9 Integration of Research: IPEM-based System Integration The three-plane diagram below shows the research planes and applications of power electronics modules. Active IPEM INTEGRATED POWER CONVERSION SYSTEMS Sustainable Building Integrated Motor Drives Integrated Power Supplies Processor EV Enabling Technology FUNDAMENTAL KNOWLEDGE Active IPEM Passive IPEM IPEM Components & Materials Processes & Algorithms IPEM Specifications System RequirementsIPEMs Technology Requirements Data Center Advanced Power Semiconductors (APS) Integrable Materials (IM) High Density Integration (HDI) Thermal-Mechanical Integration (TMI) Control & Sensor Integration (CSI) CP ES PE OP LE CHAPTER 2 HISTORY Power electronics Since the widespread use of electricity and electrical machinery, some form of invert-ers, converters, and rectifiers have been used to process electricity. The “modern” trans- former was introduced in the 1880s and many electri- cal distribution transformers today are similar, large, mechanical/electrical devices. In the early 20th century, high-frequency trans- formers were built with vacuum-tube devices, then with mercury arc tubes. In the 1950s, semiconductor power transistors, thyristors and diodes began replac- ing vacuum tubes, and solid state devices were devel- oped for many applications. The introduction of the power MOSFET and the higher power IGBT in the 1970s and 1980s, respec- tively, however, marks the beginning of modern high- frequency power electronics. Early MOSFET-based conversion systems were expensive and custom-made, but they gave designers the ability to more precisely and more cheaply control electrical processing. With this capability, more applications started integrating power electronics systems. The introduction of the power MOSFET coincid- ed with the introduction of dizzying numbers of new consumer electronic devices, from radios and comput- ers to home appliances. At the same time, consumers were pushing for energy efficiency and conservation thanks to their experience of the 1970s oil embargo and the nascent environmental movement. The confluence of so many technological and so- cietal forces made power electronics a very promising field of endeavor. Researchers expected power electronics to en- able efficient control of electricity for electronic-based applications. But, there were many problems to be solved, including devices, converter topologies, pulse- width modulation techniques, control and estima- tion techniques, digital signal processing techniques, application-specific-integrated circuits, and control hardware and software. Major issues included reliable operation, energy saving, reducing volume, weight and cost, and reducing the electromagnetic influence on other systems. A year after the introduction of the commercial power MOSFET — in 1977, Virginia Tech started its power electronics program. The group was known by different names over the years, including the Power Electronics Research Group (PERG) and the Virginia Power Electronics Center (VPEC), before CPES — and its history parallels the developments and promise of the field. CPES has influenced the careers not just of hundreds of students, but also many faculty and staff members. Some who have joined CPES remained, while others moved to other positions or other universities, using their experience to build strong programs across the country. 2.0 CPES 10 YEAR PROGRESS REPORT 2010 2.1 CHAPTER 2 Getting started at Virginia Tech Faster, smaller, and more efficient Distributed power Characterization Packaging EMI research Computer aided design tools Motor driver for electric vehicles High power VRM consortium SMES program NSF ERC 2.2 2.4 2.6 2.8 2.10 2.12 2.12 2.13 2.14 2.16 2.17 2.17 CONTENTS 2: HISTORY CP ES PE OP LE In the 1970s, the energy crisis and environmental movement contributed to growing interest in hy-brid and electric vehicles. During this time, a util-ity company donated an electric car to Virginia Tech’s electrical engineering department. As CPES di- rector Fred Lee tells it, the car broke down, and the department hired him as an assistant professor, to both start the power electronics program and to fix the car. Gasoline became more available, prices fell again in the 1980s, battery and other technologies were not yet equal to the task, and interest in hybrid and elec- tric vehicles faded (to return much stronger in the late 1990s). However, new technologies, such as the MOS- FET, integrated circuit, and microprocessor created an inexhaustible demand for experts in power electronics. These technologies were still young and needed to be implemented, perfected, and tested on a broad scale. Accordingly, power electronics research at Virgin- ia Tech focused on applying, refining, and characteriz- ing these new technologies that would underlie digital logic, personal computers, and vastly improved power systems possible. Left: Leo Grigsby with the broken down electric car. Right: Fred Lee (left) in the early years of power elec- tronics research at Virginia Tech. 1979 Virginia Tech hired Dan Chen from GE. One of Chen’s primary interests was device characterization. In 2003 he retired from Vir- ginia Tech as a professor emeritus. He is now a university distinguished professor of National Taiwan University, where he has been build- ing a premium power electronics program. 1977 Fred Lee was hired to spearhead the power electronics program. He had served for three years as a Member of the Technical Staff of the Control and Power Processing Department at TRW Systems. He is an expert in modeling and design. Getting started at Virginia Tech 2.2 CPES 10 YEAR PROGRESS REPORT 2010 CPES PEOPLE 1984 Vatché Vorperian was hired. He remained with Virginia Tech until 1991, when he joined NASA’s Jet Propulsion Laboratory, where he is a senior member of the technical staff. 1983 PERG was formally established as the Virginia Power Electronics Center (VPEC). In the same year, VPEC formed its Industry Partnership Program and held the first VPEC Annual Seminar. Fred Lee was named the director of VPEC. Early research projects Early power electronics research at Virginia Tech focused on applying breakthrough tech-nologies to high-level projects. In its inaugural project, PERG built a permanent magnet machine for an electric vehicle with a first-generation giant bi-polar transistor from Westinghouse. PERG also worked with Kollmorgen- Inland Motor to develop a drive train for the project, which was funded by NASA and supported by the De- partment of Energy. During this early period, PERG was also awarded a project funded by Naval Ocean Systems Center in San Diego. The project’s objective was to build a solid- state amplifier for very-low frequency transmitters to be used in submarine communications. For this project, PERG built a scaled-down ampli- fier system to demonstrate the concept of using stacked dc-dc converters to synthesize the sine wave. This re- search led to the initial development of the phase-shift, full-bridge dc-dc converter, which is used in all com- puters and telecommunications equipment today. The concept of stacking the dc-dc converter to synthesize the sine wave was a major innovation that spurred new research and products. Westinghouse ad- opted the stacking technology and later spun off the group involved into Robicon. Robicon successfully in- troduced a number of high power products based on this technology in China for the construction of multi- mega watt, medium-voltage drive systems for such ap- plications as large fans and pumps. At the conclusion of this project, PERG designed and demonstrated two versions of bridge converter modules for synthesizing the dc-sinusoidal power sup- plies. The first version was a 30 kW, 30 kHz bipolar transistor bridge converter module for dc-sinusoidal power supply. The other version of the bridge inverter was a 4 kW, 150 kHz FET bridge inverter for the Na- vy’s very-low-frequency transmitter power supply. 2.3 2: HISTORY As electronics became ubiquitous, and chip and transistor sizes decreased, problems like overheating, switching losses, energy efficiency, electromagnetic interference (EMI), and packaging grew in importance. Whereas the MOSFET and other breakthrough devices had once been considered highly efficient, when millions of them were put on a single chip, even minor energy loss could generate heat build-up and lead to lower performance and higher rates of device failure. Solu- tions sought to reduce switching losses, improve heat sinks, and reduce wattage to the device while increas- ing the energy density. Power electronics development began confront- ing these limitations as interest peaked in the 1990s. As device size shrinks, heat build-up continues to resur- face as a problem, leading to an ongoing demand for breakthroughs in switches, topology, and packaging. Virginia Tech’s power electronics researchers, excel- ling in the areas of soft-switching, high-frequency and high-power applications, continued to deliver break- through research and often generated large markets for new applications and devices. Large companies, such as IBM and Digital Equipment, funded several of these projects and then developed the results into highly successful commercial products. Faster, smaller, and more efficient VPEC developed this high-frequency resonant control chip in collaboration with Philips-Signetics. The control chip is employed in a multi-resonant converter to achieve high frequency and high power density up to 80 watts per cubic inch. The chip is packaged to be mounted on any circuit board. A significant breakthrough research effort in the 1980s concerned soft-switching techniques. VPEC developed a zero-voltage, zero-current switching, quasi-resonant converter; a zero-voltage switching, multi-resonant converter; and a soft- switching, zero-voltage, zero-current PWM converter. These techniques eliminated virtually all switching losses and switching stresses together with significantly reduced switching noise and EMI. This research resulted in more than 20 U.S. pat- ents and has become the basis for building modern- day power electronics equipment. VPEC and other power electronics researchers worldwide have vigor- ously pursued research on soft-switching for the last few decades. Soft-switching 2.4 CPES 10 YEAR PROGRESS REPORT 2010 CPES PEOPLE 1985 Bo H. Cho joined VPEC. He had been on the technical staff of the Power Conversion Electronics Department, TRW Defense and Space System Group. In 1995, Cho joined Seoul National University in Korea as a professor. He has built a well-regarded power electronics program and is a member of the Korean National Academy of Engineering. He is Chairman of the Korean Institute of Power Electronics. In 1984, VPEC developed a new generation of switchmode quasi-resonant power supplies. These converters, capable of switching at 5–10 MHz com- pared with 30–40 kHz used commercially, reduced the size and weight of the power supply. The size reduction was significant enough that the power supply could be mounted directly on a digital logic board, where it could provide more precise power regulation. This was a requirement for the next generation of computers. Research on quasi-resonant and multi-resonant and soft-switching PWM power converter technolo- gies resulted in 20 U.S. patents in the years after 1984, with eight additional invention disclosures in the sub- ject of soft-switching topologies for high frequency and both low-power and high power applications. A project that began in 1987 was the first of its kind to demonstrate the capability of developing high density, board-mount power supplies for VHSIC-re- lated applications for the Air Force. The project was funded by the Air Force and conducted along with Texas Instruments, AT&T Bell Labs, and Unisys. VPEC demonstrated a high-grade power con- verter featuring, for the first time, 50 W per cubic inch in power density. The converter used a multi-resonant technique developed at Virginia Tech. The prototype switched above 5 MHz, converted 40-60 V input to 5 V at 10 A output, and demonstrated 80 percent ef- ficiency. VPEC’s work helped kick-start high-density research and applications. VPEC’s on-board supply generated interest for many industrial applica- tions. Board-mounted power 2.5 2: HISTORY CP ES PE OP LE 1986 F. William Stephenson joined VPEC. Stephenson developed a hybrid microelectronics facility and pursued active filter research with mi- croelectronics fabrication. He later became Dean of Engineering at Virginia Tech before retiring. 1986 F. Lee was named James S. Tucker en- dowed professor 1985 Krishnan Ramu joined VPEC. He left the group to pursue research in motor drives and controls. He is a full professor in Virginia Tech’s ECE department, an inventor and an entrepreneur. He developed nonlinear switched-reluctance MAG- LEV technology and a switched reluctance home elevator. He also successfully launched a company, called Panaphase, which was recently sold. From 1984 to 1991, VPEC worked with IBM-Poughkeepsie to develop high-density, modular power supplies for the future genera- tion of IBM 390 mainframe computers. The objective was to develop a power supply using a stacked power supply system concept and in- volved converting an AC line into a 360 V dc bus. The VPEC system incorporated many power supply modules ar- ranged into a series and parallel configuration. The Center also devel- oped a simulation model for such a system to address issues related to stability and dynamic interactions of system components resulting from line/load transients and failure of the power supply module. IBM introduced its new mainframe computer, Model S390, in 1991. High-density modular power supplies for IBM A VPEC-developed high-frequency power supply Left: An IBM processor. RIght: When IBM divided its power system into many modules (as shown at right) for its S/390 mainframe computers, VPEC helped design and troubleshoot the system. Distributed Power 2.6 CPES 10 YEAR PROGRESS REPORT 2010 Research on space power systems began in 1977 and escalated in 1985. Two projects of note were the development of a high voltage dis-tributed power system for the Space Station Freedom and the development of a testbed for a power system for the Earth Observing System with NASA- Goddard. Both projects involved extensive modeling, hardware design, and testing to ensure the power sys- tems would work perfectly in space. Reliability was especially important for the space station, since the lives of the astronauts would depend on the power system operating seamlessly 24/7. It is difficult to test space systems, however, be- cause they are often so large that they can only be as- sembled in space. Virginia Tech’s power electronics group was selected to overcome this obstacle because of its expertise in large power electronic systems. VPEC established a Space Power Laboratory in 1990 to accommodate its growing space power re- search program. In 1991, the NASA Goddard Space Flight Center funded VPEC’s construction of a hardware testbed for the space platform power processing system. The testbed system included a solar array simulator, solar array switching unit, battery simulator, battery charger/discharger, and mode controller. This testbed was built and shipped to NASA-Goddard, where it was used to evaluate the NASA Earth Observing System (EOS) power system. The project also involved the development of a software system to simulate an entire orbit cycle and the design of load converter topologies to interface with the 120 V regulated bus of the NASA EOS satel- lite. Space power A researcher adjusts a bi-directional converter developed for use with the NASA space power test- bed. The device is pictured at the right. Below: Sable tests a space power station for NASA’s Earth Observa- tory Satellite Research Scientist Dan Sable in the Space Power Laboratory 1987 VPEC became a Technology Development Center and received 10 years of funding from Virginia’s Center for Innova- tive Technology. The purpose of the Center was to establish a center of excellence in power electronics and attract power electronics industry to the Commonwealth of Virginia. Over the 10-year funding cycle, CIT provided a total of $3 million to VPEC. By 1987, VPEC’s industrial consortium had grown to include 30 member companies. CPES PEOPLE 2.7 2: HISTORY CP ES PE OP LE 1989 Raymond B. Ridley joined VPEC. He researched power correction and developed converters and computer-aided design tools. In 1991 he founded Ridley Engineering, Inc., which he continues to serve as president. 1989 F. Lee was awarded a William E. Newell Award and elected an IEEE Fellow 1989 VPEC hired Ann Craig (left) as Administrative Director and Teresa Shaw (right) as Industrial Liasion and Since many power electronics technologies were still in their early stages, researchers and developers in the field needed informa-tion on the their reliability, capabilities, life expectancy and efficiency. No non-destructive tester existed to evaluate the capabilities of several critical power electronics devices without destroying them. The major cause of failure of many high-power devices — those that were expected to spur the next generation of power electronics technologies — was reverse bias second breakdown. PERG began tack- ling the issue in 1981 with the goal of designing and fabricating a 1000 V, 120 A, nondestructive, second- breakdown tester — the first of its kind in the world. The project was sponsored by the NASA/DOE Electric Vehicle Program and later on by David Taylor Naval Ship Development and Research Center (NSDRC). The tester would characterize devices like bipolar junction transistors, Darlingtons, and GTOs by ex- perimentally defining their reverse bias safe-operating area. Most important, the tester would allow govern- ment, industry, and academic researchers, for the first Characterization Fred Lee with nondestructive second breakdown tester for power semiconductor devices 2.8 CPES 10 YEAR PROGRESS REPORT 2010 CPES PEOPLE 1990 F. Lee was awarded the Virginia Tech Alumni Award for Research Excellence 1991 VPEC hired Dushan Boroyevich, who led research in the areas of high-power, three-phase conversion, motor drive, and digital control. time, to characterize their expensive devices without destroying them. In 1987 the group (recently renamed VPEC) succeeded and introduced its nondestructive second breakdown tester for power semiconductor devices. The unique tester can test power semiconductor de- vices with voltage rating up to 1800 V and current rat- ing up to 300 A. At the time, it was the world’s fastest switch. The tester worked by taking a device into sec- ond breakdown, then quickly turning on the crowbar switch. The switch diverted energy preventing it from actually entering the device and causing permanent damage or destruction. The advent of the tester enabled research on the mechanism that was causing secondary breakdown. At the time, this was a relatively mysterious process facing the new generation of giant bipolar transistors. The tester was used to test high power semicon- ductor devices such as IGBTs, GTOs, and MCTs. These new semiconductor devices helped prepare the way for the next generation of power electronics applications. Notably, IGBTs are now a crucial component of hybrid and electric vehicles such as the Toyota Prius, indus- trial devices, and transportation systems. 2.9 2: HISTORY Hybrid packaging In 1986, VPEC received funding from Digital Equipment Corporation to research and develop sev- eral high-density dc-dc converter modules using hy- brid packaging concepts. This research effort contin- ues today. VPEC successfully demonstrated a dc-dc module in 1986 that used multi-resonant converter topology and power hybrid packaging to achieve power density close to 100 W per cubic inch. Above: High-density dc-dc converter module devel- oped for Digital Equipment Corporation. Top left: Milan Jovanovic, a researcher at VPEC. Top right: High density module Packaging 2.10 CPES 10 YEAR PROGRESS REPORT 2010 A high-frequency transformer Thick-film hybrid transformer developed by VPEC Left: A five-phase inverter developed at VPEC to drive the novel five-phase multi pole PM brushless dc mo- tor with short flux paths. The motor drive system provides high efficiency, high torque capability, excellent winding and semicondunctor utilization, and cogging torque elimination. Right: a matrix converter In 1988, General Motor Research Lab and Texas Instruments sponsored a project to develop a thick- film inductor and transformer. VPEC began studying thick-film hybrid techniques and applying them to- wards design and fabrication of high-frequency multi- megahertz magnetic components. These techniques made it possible for screen printing to deposit both conductive and magnetic materials to form a thick- film inductor and transformer structure for magnetic components. The hybrid transformer was also suitable for other automated productions. Thick-film Left: Thick-film magnetics technology with printed core. Right: Thick-film transformer 2.11 2: HISTORY EMI research Electronic power systems were proliferating, but so were the electromagnetic waves they emit into the air, causing interference for televisions, radios, and communications re- ceivers. The disturbances due to the pulsating current drawn by this equipment can also find their way into the utility power grids, resulting in poor power quality that ad- versely affects other users. In 1989, VPEC introduced a graduate level course on EMI and established its EMI Labora- tory in an RF-protected room. One major source of EMI was due to the high rate of change of current and voltage as a result of high frequency hard switching. VPEC developed sev- eral key soft-switching technologies, such as zero-cur- rent and zero-voltage quasi-resonant, multi-resonant and PWM circuits. These technologies enable power supplies to operate at very high frequencies with a controlled rate change of current and voltage. They significantly reduced EMI, and a remarkable greater- than-98-percent efficiency was achieved. VPEC also used a frequency modulation scheme to reduce the conducted EMI from a switching power supply. The scheme makes it easier for a power supply to pass FCC or VDE specifications. Innovative measurement techniques were also developed to separate the common mode noise from the differential noise. This innovation facilitated filter design techniques to minimize EMI noise. A VPEC student conducts EMI measurements of a power electron- ics device in the EMI lab. A graduate student simulates a flyback power factor correction circuit using VPEC modeling tools. By 1992, the industry had enough computing power to develop effective computing models for power elec-tronics equipment. VPEC developed several successful power electronics modelling software packages. One design package, CADO, used nonlinear design optimi- zation techniques to select converter power stage components at highly detailed levels. The package included a selection of power components and switching frequencies. It could perform topo- logical trade-offs. A time-domain simulations program, COSMIR, was de- signed for fast and efficient analysis of switching power convert- ers. The PC-based software was capable of performing large- signal analysis of power converters with simulation time and order-of-magnitude shorter than general-purpose simulation software. Computer aided design tools 2.12 CPES 10 YEAR PROGRESS REPORT 2010 1994 Virginia Tech hired Alex Qin Huang. Af- ter ten years with CPES, Alex Huang moved to NC State, where he is now director of another NSF ERC, the FREEDM Systems Center. He is an expert in power semiconductor devices and high power applications. 1995 F. Lee named Lewis A. Hester Chair of Electrical Engineering. 1995 G.Q. Lu received an NSF Career Award CPES PEOPLE Motor drives for electric vehicles Concern for the environment revived during the 1990s and with it, interest in electric vehicles. Another signif-icant VPEC research effort centered around the PNGV project. The goal of this research, sponsored by Gen- eral Motor, Chrysler, Ford, and the US Army TACOM, was to build and evaluate an electric drive system for electric vehicles. AC adjustable speed drives for automotive applications have to be reliable, cost-effective, efficient, and have high power density. Soft-switching technologies can help to meet these requirements by reducing device stress, dv/dt and EMI, allowing higher switch- ing frequency, smaller size and weight, and cost reduction. The major objective of the PNGV project is to evaluate and develop high performance, cost-effective, soft-switching topolo- gies for three-phase inverters in adjustable speed drives for electric vehicles. In pursuit of this goal, the advantages and limitations of different soft-switching topologies were evaluated and optimum topologies and design guidelines for electric vehicle applications were developed. PNGV Electric Vehicle Testbed 2.13 2: HISTORY CP ES PE OP LE 1996 Jason Lai joined VPEC. After working with CPES, he founded the Future Energy Elec- tronics Center (FEEC) at Virginia Tech. The FEEC has achieved 98 percent efficiency in power systems for photovoltaic arrays. 1997 Allan Ward was hired to manage the newly- established Power Electronics Packaging Lab, which had a permanent class 1000 clean enclosure, a clean oven, plasma cleaner, spin coater, and chemical wet station for polymer and hybrid circuit processing as well as equip- ment for ceramic processing. In 1991, research in power factor correction grew in importance. VPEC started research on several sponsored projects covering power levels from less than 100 W to higher than 10 kW. After the High Power Lab was established in 1993, research projects included power factor correction and soft-switching PWM converters. High Power PEBB The Office of Naval Research (ONR) sponsored many projects from 1995-2000 under the Power Electronics Building Blocks (PEBB) Program. This multi-year effort involved researchers from several de- partments at Virginia Tech, University of Wisconsin- Madison, Rensslaer Polytechnic Institute, and North Carolina A&T State University. The building block concept is a system integra- tion approach to standardize power electronics com- ponents and packaging techniques, thus reducing cost and improving reliability of power electronics systems. Research on this modular concept and break- through technology developed into the IPEM under CPES’s direction and continues today. The ONR PEBB effort has sponsored more than 100 research projects with a total of $65 million of funding to date. These projects addressed such issues as modularity, redundancy, parallelability, standard- ized control, and power interface and communications protocol. Research also included the development of PEBB technology generic to a wide-range of power convert- ers and applications. The overall objective of PEBB research was to de- velop advanced packaging and processing technologies for generic PEBBs and for high power inverter/con- verter applications. A series of generic PEBBs was be- ing fabricated at VPEC using state-of-the-art commer- cial high-power semiconductor devices and materials. The research focused on all issues related to PEBB, including circuit topologies, control techniques inte- gration of passive components, materials and interface engineering, three-dimensional thermal management, and packaging design and fabrication. 2.14 CPES 10 YEAR PROGRESS REPORT 2010 Aircraft power systems With funding from Schneider Toshiba Inverter Europe and Thales Avionics Electrical Systems, VPEC pursued research on aircraft-related power systems in the late 1990s. The Center actively participated in the development of multi-pulse ac-dc power conversion by developing 18-pulse autotransformer rectifier units (ATRU). This research resulted in the development of sym- metric and asymmetric ATRU topologies. ATRU con- verters have been adopted in low power appliance ap- plications acting as passive filters for six-pulse diode bridge rectifiers. The symmetric ATRU topologies have been adopted by industry for different ac-dc applica- tions. Sponsored by Ford under DOE funding, VPEC researchers in 1997 worked on developing a bi-direc- tional dc–dc converter technique for use in fuel cell- powered hybrid electric vehicles. The bi-directional full-bridge dc/dc converter incorporated unified soft- switching schemes effective for power flow in both di- rections. Together with the control techniques devel- oped by VPEC, it achieved high efficiency and reliable operation. This particular design was patented and commercialized later on by Ballard in every fuel cell test vehicle. Fuel cells Left: CPES developed a dc-dc converter to provide power to the fuel cell. Right: A fuel- cell vehicle. 2.15 2: HISTORY CP ES PE OP LE 1998 Virginia Tech hired G.Q. Lu, whose background was in applied physics and materials science. He is an expert in elec- tronics materials and packaging and is still a core faculty member of CPES. 1998 VPEC hired Linda Long as Finance Director. 1998 F. Lee received the Arthur E. Fury Award for Leadership and Innovation in Advancing Power Electronics Technology and was named director of CPES, ERC. The gigahertz chip: VPEC forms the voltage regulator module consortium From 1985 to 1997 computer speeds grew from 16 MHz to 200 MHz. VPEC formed the Voltage Regulator Module (VRM) consortium in 1997 to pursue development of the next breakthrough. The original consor- tium members included Intel, International Rectifier, Texas Instruments, National Semiconductor, and SGS Thomson. The objective of the consortium was to help industry apply impor- tant new technologies in power delivery architecture, suitable high-fre- quency power semiconductor devices, power conversion topologies, con- trol sensor techniques, integrated magnetics, advanced packaging, and system integration. The mini-consortium has grown over the last 10 years, now with 20 member companies from the IC and power supply industries. The scope of this research has been extended to power management starting with the AC source and extending all the way to point-of-load. Research ef- forts have resulted in 25 U.S. patents and hundreds of technical papers. “Improving the amount of information that can be put on chips and the speeds at which they oper- ate, has come down to one issue,” explained Fred Lee at the time, “and that is voltage. The lower the volt- age, the better.” Lowering the voltage means less power loss, higher density, meaning more transistors can be fitted per unit space and higher processing rates can be achieved. Today, more than a trillion transistors can be packed in one processor with a frequency greater than 1 GHz. Within the first six months of beginning the re- search (started in 1997), VPEC developed a multi- phase voltage regulator module based on parallel multiple buck converter cells. The proposed voltage regulator is smaller, faster, and is scalable to suit new generations of processors with ever-increasing current consumption, clockrate and stringent voltage regula- tions. Today, every microprocessor is powered with the CPES-developed multi-phase voltage regulator mod- ules. The Consortium The VRM VRM Consortium 2.16 CPES 10 YEAR PROGRESS REPORT 2010 SMES program Superconducting magnetic energy storage (SMES) is a way of storing energy in a mag-netic field. It could be used to help stabilize power grids, among other things. ONR funded VPEC in 1997 to pursue research targeted at high performance, high power applications. VPEC subsequently developed a 200 kVA chopper- inverter prototype circuit. This system demonstrated the energy storage and transfer properties of super- conducting magnetic storage systems and how they can be integrated into the utility grid to suppress fast transient surge and sag. Initially, SMES technologies were developed for military applications. DARPA, however, wanted to use the technology for commercial applications. One po- tential applications is to build a 30 megawatt SMES system to stabilize the electric power utility grid in Alaska. Alaska is an ideal setting, because its utility grid is isolated from the main continent. Thus when a large user turns the power on and off, it creates voltage surge or sag. The SMES device reacts very quickly to changes and could be used to stabilize the grid. Researchers at Virginia Tech developed a 200 kVA prototype to demonstrate this concept. The technol- ogy was later transferred to Babcock and Wilcox for construction of a 30 megawatt system. Unfortunately, this project was terminated in the middle of the con- struction effort. Bi-Directional Chopper Three-Phase Inverter SMES Coil Utility Proof-of-Concept Prototype 250 kW(1800 V,200 A) Power electronics research at Virginia Tech grew steadily from 1977, when Dr. Lee was hired, to 1998, when CPES was founded. The insatiable demand for power electronics experts insured a steady supply of projects and funding from indus- try. By the 1990s, VPEC was already one of the world’s largest power electronics research centers. In 1996, VPEC teamed with the Wisconsin Power Electronics Center of the University of Wisconsin and the Power Semiconductor Research Center (PSRC) of North Carolina State University to submit its first ERC proposal to NSF. The team survived the final proposal stage and was invited to host an NSF site visit. In 1998, VPEC teamed with the University of Wisconsin-Madison, Rensselaer Polytechnic Institute, North Carolina A&T State University, and the Uni- versity of Puerto Rico-Mayaguez to submit its second ERC proposal to NSF. CPES was awarded a five-year $12.3 million cooperative agreement from the NSF ERC program to transform VPEC into CPES. NSF ERC 2.17 3.0 CENTER PROGRAM OVERVIEW CHAPTER 3 With a multi-university team such as CPES, a well defined and comprehensive strategic plan and roadmap are essen- tial to realize the Center’s vision and goals. Although the CPES research programs and organizations have always been based on the Center’s IPEM-focused research vision, they have been continually evolving since the in- ception of the Center in response to advances in CPES research and the SWOT (Strengths, Weaknesses, Opportunities, Threats) analyses by NSF, industry, and students. MARKET PLACE Needs Benchmarks Standards Trends Multi-discipline Research and Curricula Develop Power System-level Leadership Skills EDUCATION Device & System-level Courses ENGINEERED SYSTEMS Next Generation IMPACT • Increase US market base • Graduates trained in power systems • Improve Energy E­ciency • Improve Environment • Improve Quality Reliability & Cost • 2X by year 5 • 4X by year 7 • 10X by year 10 C O M M ER C IA LIZ AT IO N & T EC H . T RA N SF ER FUNDAMENTAL KNOWLEDGE Advanced Power Semiconductor Integratable Materials ENABLING TECHNOLOGIES Standard-Cell Passive IPEMs Motor and Converter Integration Control and Sensor Integration Thermal-Mechanical Integration High-Density Integration IPEM-based Power Conversion Systems (IPEM-PCS) IPEM Synthesis Microprocessor and Converter Integration Standard-Cell Active IPEMs CPES 10 YEAR PROGRESS REPORT 2010 3.1 CHAPTER 3 Center Program Overview Four Generations of CPES Research OVERVIEW: Engineered Systems Integrated Motor Drive Systems Power Distribution Systems Sustainable Building Initiative OVERVIEW: Enabling Technology: IPEM Integrated Voltage Regulator Modules High-Frequency IPEMs Low-Frequency IPEMs Passive IPEMs OVERVIEW: Fundamental Knowledge High Density Integration Integrable Materials Thermal-Mechanical Integration Semiconductor Power Devices and ICs Control & Sensor Integration Education and Outreach Industrial Collaboration CPES Industry Membership Program: Major Events Leadership and Management 3.0 3.2 3.6 3.8 3.10 3.12 3.14 3.16 3.18 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.40 3.44 3.46 CONTENTS 3: CENTER PROGRAM OVERVIEW FOUR GENERATIONS OF CPES RESEARCH Evolution of the strategic research program CPES was built to improve the efficiency of electricity use through developments in power electronics, improved technology transfer, and strengthened education in the field. We aimed to increase the efficiency of elec- trical processes by standardizing, modularizing, and integrating power electronics technology. We sought to simplify a complicated process, but our challenges were not simple. Before we could achieve modular integration through IPEMs, we first had to break the problem into manageable pieces and tackle each piece on multiple levels simultaneously. We tapped the expertise from five different uni- versities. As we developed answers and gained experi- ence working across former boundaries of institutions and disciplines, we restructured the problem and our attack to meet new challenges. In the past 10 years, CPES has evolved through four major phases: the early coalescence phase, in which we gathered and defined our challenges; the convergence phase, in which our solutions fed into each other and we made great strides in IPEM development; the expanded creativity phase, in which we identified and investigated more discrete tasks at each level of the three plane diagram; and the graduation phase, in which we restructured for a re- newed effort outside of the ERC program. A 3-plane structure CPES research can be viewed through the NSF three-plane strategy. The fundamental knowledge plane encompasses basic scientific research and engineering theory and practices. Enabling technology includes the 3.2 COALESCENCE ENGINEERED SYSTEMS ENABLING TECHNOLOGY FUNDAMENTAL KNOWLEDGE DEMONSTRATIVE PROGRAM Thrust DEMONSTRATIVE PROGRAM Thrust IPEM SYNTHESIS TECHNOLOGY DEVELOPMENT Thrust TECHNOLOGY DEVELOPMENT Thrust CONVERGENCE Provide focus and research program integration Distributed Power Systems Distributed Power Systems System Partitioning Specifications Processes & Algorithms Components & Materials Technology Requirements Integrated Design Tools Integrated Design Tools IPEMs Motor Drives IPEM Development Advanced Power Semiconductor Devices Advanced Power Semiconductor Devices Control and Sensor Integration Integrated Packaging Advanced Power Electronics Packaging System Integration High Performance Drives Packaged Drives Enhance long-term scientific innovation 1998 1999 2000 2001 2002 2003 YEAR 5YEAR 4YEAR 3YEAR 2YEAR 1 CPES 10 YEAR PROGRESS REPORT 2010 engineering developments that are critical for new technology. Engineered systems are the systems, appli- cations, and testbeds developed to test and demonstrate advances in enabling technology and fundamental knowledge. The planes, although distinct, cannot exist without advances and direction from each other. The diagram below maps CPES research evolu- tion across each strategy plane for the 10 ERC years. Enabling technology CPES was founded to advance an enabling tech- nology: the IPEM and integrated power electronics systems. Initially, enabling technology efforts were focused on the development of the IPEM and the in- tegration technology needed for IPEM-based systems. As IPEMs were developed and commercialized, the research team converged in supporting IPEM synthe- sis, providing a technology push in the fundamental knowledge plane and a system pull for the demonstra- tive programs. This effort led to identifying needs and developing a set of standard IPEMs plus application- specific IPEMs, namely low-frequency, high frequency, and passive IPEMs. It also led to the integration of IPEMs with their intended applications such as inte- grated power supplies for microprocessor and motor and converter integration. Fundamental knowledge IPEM enabling technology could not progress without advances in fundamental knowledge. Early on, the supporting fundamental knowledge included semiconductor devices and packaging. As the technol- ogy developed, control and sensor integration were addressed. Once the initial IPEMs were demonstrated, fundamental knowledge research expanded to addi- tion of materials and thermal-mechanical integration issues. These were the fundamental knowledge direc- tions as we moved toward graduation. Engineered systems Throughout the 10 ERC years, the CPES testbeds and applications concentrated on distributed power systems and motor drives: the two areas of expertise at Virginia Tech and the University of Wisconsin. Once the IPEMs were demonstrated, engineered systems research concentrated on a power conversion system. Post-ERC efforts continue in that area of expertise, but also expand to include more generic sustainable build- ing technology and high-power applications, targeting the use of alternative energy and smart utility grids. 3.3 EXPANDED CREATIVITY GRADUATION IPEM-Based Power Conversion Systems (IPEM-PCS) Microprocessor and Converter Integration Advanced Power Semiconductors Integrable Materials High-Density Integration Thermal- Mechanical Integration Control and Sensor Integration Standard-Cell Active and Passive IPEMs Motor and Converter Integration Electro-Magneto-Thermo-Mechanical Integration Technology Integrated Motor Drive Systems Power Electronics Integration Technology Integrated Power Conversion Systems Semiconductor Power Devices and ICs Power Distribution Systems Sustainable Building Initiative Integrated Modular Motor Drives Control and Sensor Integration Thermal- Mechanical Integration High-Density Integration Integrable MaterialsAdvanced Power Semiconductors Low-Frequency IPEMs Passive IPEMs High-Frequency IPEMs Integrated Power Supply (Voltage Regulator Module) Consolidate research to maintain critical mass 2004 2005 2006 2007 2008 AND BEYONDYEAR 11YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6 3: CENTER PROGRAM OVERVIEW RESEARCH ORGANIZATION 4 generations of research In the diagram on the previous pages, the four generations of CPES research are depicted as the verti- cal colored blocks, with each generation lasting two or three years. The different generations provide another dimension to the CPES research story. Coalescence Originally, the Center’s research program was structured with seven subthrusts and grouped into two thrust areas. One was technology development and the other was demonstrative program. Within the technology development thrust, there were four subthrusts: advanced power semiconductor devices; advanced power electronics packaging; system integra- tion; and integrated power electronic module (IPEM) development. Within the demonstrative program, we had three testbed areas: distributed power systems; packaged drives; and high-performance drives. The first two years of CPES were highlighted by the major effort involved in forming strong teams across universities and disciplines. During this Coales- cence Phase, we identified major technology and ap- plication barriers and established the state-of-the-art benchmarks. However, by the end of this initial period, our industry members became concerned that the re- search program was too spread-out and without suf- ficient focus, while the NSF was worried about lack of 3.4 Electro-magento-thermo-mechanical integration technology Microprocessor and Converter Integration Standard-cell Active IPEMs Standard-cell Passive IPEMs Motor and Converter Integration IPEM Synthesis T.A. Lipo, UW T.P. Chow, RPIIntegrable Materials G.Q. Lu, VT Control and Sensor Integration R.D. Lorenz, UW High-density Integration J.D. van Wyk, VT Power Electronics Integration Technolo- gies; K. Ngo, VT Thermal-mechanical Integration E.P. Scott, VT IPEM-based power conversion systems D. Boroyevich, VT CENTER DIRECTOR F.C. Lee, VT T.M. Jahns, UW CPES 10 YEAR PROGRESS REPORT 2010 3.5 integration between the research teams. Consequently, the research program was strategically reorganized to facilitate the convergence of the ideas and activities. Convergence The modified research structure for the next four years was organized according to the NSF three-plane strategy. In the engineered systems plane, we reduced the number of testbeds to two, distributed power sys- tems, and motor drives, in order to better tap existing strengths. In the enabling technology plane, we devel- oped an IPEM synthesis thrust, and expanded the fun- damental knowledge efforts. We emphasized IPEM synthesis as the core tech- nology, to provide clear focus between the system-level pull and fundamental technology push. This was pur- sued by developing an integrated design methodology with CAD tools that could be used both at the system- and component-level, and by designing, implementing and evaluating IPEMs for the application testbeds. The resulting convergence of research produced numerous technological advances and initiated a paradigm shift in the design of power electronics systems. Expanded creativity In 2004, in order to address the issue of lack of balance between basic research and applied research as raised by NSF site visit team, CPES research programs were restructured with a much-expanded IPEM vision and a significant increase of the basic research content in all research thrusts. In enabling technology, a new thrust, electro-mag- neto-thermo-mechanical integration, was established to replace the IPEM synthesis thrust. There were three focused areas within this thrust: standard-cell IPEM technologies for high-frequency applications (based on our distributed power systems testbed) and low- frequency applications (based on our motor drives tes- tbed); integrated power supplies; and integrated mod- ular motor drives. In the engineered systems plane, we consolidated our testbed programs to form one IPEM- based power conversion systems thrust. The reorganization did enable numerous new contributions in all areas of CPES research, although their connectivity and aggregate impact on the power electronics systems grew more obscure. Preparation for graduation During the last two years, the research strategy was reorganized again in preparation for graduation from NSF ERC funding. The plan was a result of nu- merous meetings and discussions of the whole CPES leadership team, the Industry Advisory Board, and the outreach to the global power electronics community. We concluded that CPES must maintain the core com- petence essential for our multidisciplinary research, and at the same time open up to enable future energy- related system applications. This resulted in consolida- tion of the research into four core thrusts: integrated power conversion systems, integrated motor drive sys- tems, power electronics integration technology, and semiconductor power devices and ICs, and simultane- ous expansion of the research sponsored by industry and other government agencies. At the same time, a broad-based research was initiated in the area of power electronics impact on the future sustainable buildings. Although CPES IPEM technology is commercial- ized in low power applications, we still face challenges with the concept in high power applications. However, in order to make the greatest impact on future energy efficiency and clean energy, we are moving toward tackling energy processing at a larger, systems level. A Convergence Generation IPEM for high- efficiency distributed power systems, used to evaluate advances in semiconductor devices and high-density integration. “CPES has world class research activities in drives and converters and other research programs that build on those strengths.” —2004 NSF Site Visit Report 3: CENTER PROGRAM OVERVIEW 3.6 OVERVIEW Engineered Systems CPES has targeted systems and applications that would conserve the most energy based on the state of power electronics technol-ogy at the time. Moving the technology quickly into industrial use has been a driving force be- hind the Center, with the hope that the country could begin to realize energy savings almost from the start. CPES was built around two peaks of excellence: Virginia Tech in power supplies and the University of Wisconsin in motor drives. These two technologies have played major roles throughout CPES history. Evolution of engineered systems In 1998, when IPEMs were just a concept, de- monstrative programs were one of two major thrusts at CPES, with subthrusts in distributed power sys- tems, high-performance drives and low-cost pack- aged drives. Applications and testbeds — chosen for their market potential and predicted energy savings — ranged from computers and telecommunications equipment to heating, ventilation and air conditioning (HVAC) to hybrid electric vehicles. In 2000, CPES consolidated high performance drives and packaged drives into one motor drive effort to encourage greater col lab oration and integration. The two applications, distributed power systems and motor drives, reflected CPES strengths and expertise. As IPEM technology developed and the concept of system integration was formulated, it became appar- ent that the fundamental integration technologies for COALESCENCE ENGINEERED SYSTEMS ENABLING TECHNOLOGY FUNDAMENTAL KNOWLEDGE DEMONSTRATIVE PROGRAM Thrust DEMONSTRATIVE PROGRAM Thrust IPEM SYNTHESIS TECHNOLOGY DEVELOPMENT Thrust TECHNOLOGY DEVELOPMENT Thrust CONVERGENCE Distributed Power Systems Distributed Power Systems System Partitioning Specifications Processes & Algorithms Components & Materials Technology Requirements Integrated Design Tools Integrated Design Tools IPEMs Motor Drives IPEM Development Advanced Power Semiconductor Devices Advanced Power Semiconductor Devices Control and Sensor Integration Integrated Packaging Advanced Power Electronics Packaging System Integration High Performance Drives Packaged Drives Provide focus and research program integration Enhance long-term scientific innovation 1998 1999 2000 2001 2002 2003 YEAR 5YEAR 4YEAR 3YEAR 2YEAR 1 CPES 10 YEAR PROGRESS REPORT 2010 3.7 power supplies and motor drives are the same. What set them apart was the specific requirement for IPEMs in each application. We again restructured our engi- neered systems efforts, blending the two applications into a general IPEM-based power conversion systems thrust. This restructuring triggered the expanded creativ- ity phase of CPES efforts as researchers investigated many innovations of IPEMs based on different appli- cations. As we moved toward graduation from the NSF ERC program, the ongoing engineered systems efforts in IPEM-based power conversion systems expanded beyond traditional low power high-volume power sup- plies and motor drives to lower power electronics for portable battery operated systems and higher power distributed power generation and processing systems. Three major systems themes Three major themes have been woven throughout our engineered systems work during our 10 years as an NSF ERC. The distributed power systems for higher power, higher voltage power supply applications and the autonomous power/motor drive applications de- rive from our two peaks of excellence. Parallel to those efforts, research in the lowest power, microprocessor power supplies has been a major effort. Most recently, we have added another initiative that integrates all the themes: power electronics for sustainable buildings. Sustainable building initiative The newest systems initiative targets saving energy in the home and other buildings. All CPES campuses are developing integrated power electronics technol- ogy for future buildings. Investigations include a high voltage (380 V) dc power distribution system and testbeds using renewable energy sources; a higher- frequency (higher than 60 Hz) ac power distribution system, and power supply and management systems for portable appliances that can use multiple sources of energy. EXPANDED CREATIVITY GRADUATION IPEM-Based Power Conversion Systems (IPEM-PCS) Microprocessor and Converter Integration Advanced Power Semiconductors Integrable Materials High-Density Integration Thermal- Mechanical Integration Control and Sensor Integration Standard-Cell Active and Passive IPEMs Motor and Converter Integration Electro-Magneto-Thermo-Mechanical Integration Technology Integrated Motor Drive Systems Power Electronics Integration Technology Integrated Power Conversion Systems Semiconductor Power Devices and ICs Power Distribution Systems Sustainable Building Initiative Integrated Modular Motor Drives Control and Sensor Integration Thermal- Mechanical Integration High-Density Integration Integrable MaterialsAdvanced Power Semiconductors Low-Frequency IPEMs Passive IPEMs High-Frequency IPEMs Integrated Power Supply (Voltage Regulator Module) Consolidate research to maintain critical mass 2004 2005 2006 2007 2008 AND BEYONDYEAR 11YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6 3: CENTER PROGRAM OVERVIEW 3.8 Integrated Motor Drive Systems Electric motors consume more than 50 per-cent of all electricity, much of which could be saved if motor drives are more widely adopt-ed. Cost and reliability are primary hurdles to the integration of motor drives into applications from white goods to automobiles to aircraft — making these drives natural targets for CPES technology. When CPES was founded in 1998, motor drive research was split into two demonstrative programs: high performance drives and packaged drives. The high performance drive thrust focused on applications such as spindle drives using new sensor and estima- tion techniques. Research in packaged drives focused on fractional-horsepower motor drives intended for home appliance heating, ventilation, and air condi- tioning (HVAC) applications. The aim was to simplify the power converter to- pologies to reduce the number of active switches, thus reducing power electronics costs. Our ultimate goal was to develop integrated motor drive configurations that combined the motor and power electronics into a single physical structure. Coalescence phase In Year 3, the two demonstrative projects were merged into a single motor drives thrust focusing on low-horsepower motor drives (1-3 hp) for HVAC ap- plications. The goal was to reduce motor drive cost and size and to improve reliability by eliminating the elec- trolytic capacitors typically required for the dc link. Automotive power electronics In Year 3, we also launched a special “Low-Cost Automotive Power Electronics” project with additional researchers from MIT to apply IPEM technology in an integrated electric water pump for an advanced auto- motive architecture with 42 V dc electric accessories. The new integrated water pump assembly included a permanent magnet machine, a shaft mounted pump impeller, and a power electronics controller combined into a single housing, using flip-chip-on-flex planar interconnect technology for the IPEM at the heart of the motor drive. Birth of the IMMD In 2003, CPES defined the basic concept of the integrated modular motor drive (IMMD), which was based on a modular stator architecture that consists of basic building blocks that combine each stator pole and its concentrated winding with a single-phase in- Motor DrivesPackaged Drives 1-hp integrated industrial motor drive Dual-bridge matrix converter 1998 1999 2000 2001 2002 YEAR 5YEAR 4YEAR 3YEAR 2YEAR 1 CPES 10 YEAR PROGRESS REPORT 2010 3.9 verter module dedicated to exciting that winding. We launched parallel efforts to develop the modular per- manent magnet machine and the modular power elec- tronics needed to implement the IMMD concept. While this IMMD machine was under develop- ment, we worked on design features and characteris- tics for the phase-leg inverters needed to excite each pole winding. The expected high-temperature envi- ronment (greater than 100° C) for the IPEM led to the adoption of a film capacitor in place of the lower-tem- perature electrolytic capacitors used in conventional motor drives. In order to minimize parasitic inductance and the associated transient voltage ringing, we paid special attention to interconnections between each inverter phase-leg and the front-end rectifier as well as its con- nections to the neighboring inverter units. Prototype machines The prototype five-phase permanent magnet ma- chine was successfully tested using a breadboard five- phase inverter during 2007. Separately, a demonstrator version of the five-phase IMMD inverter was tested in a benchtop configuration that was intended to focus on the physical dimensions of the inverter phase-drive units and their electrical performance characteristics. Integration in one housing In Year 10, we redesigned the inverter phase-drive units together with a compatible motor housing so that the five-phase inverter and machine can be as- sembled in the same structure. Although this Year 10 IMMD assembly is a demonstrator unit rather than a production prototype, it includes many of the key physical and electrical features needed by motor drive manufacturers to evaluate the viability and readiness of IMMD technology. Cooperative success The success of the motor drives systems research has been possible because of cooperative efforts throughout the organization, including advances made in advanced power semiconductor development, sen- sor integration, standard-cell active IPEMs and IPEM packaging. Promising concepts developed through CPES in the motor drive systems area are already hav- ing an impact on new generations of commercial mo- tor drives that are moving inexorably towards higher levels of integration. Integrated Modular Motor Drives Integrated modular 5-phase motor drive 2003 2004 2005 2006 2007 2008 YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6 Concept 5-phase IMMD 3: CENTER PROGRAM OVERVIEW Ten years ago, the distributed power systems (DPS) concept became widely used in com-puter and telecommunications products. The front-end power processing and interfacing with utility lines was performed at a system level: a power factor correction (PFC) converter followed by an isolated dc-dc converter, and a number of small, point-of-load converters that were placed on the cir- cuit board for their intended loads. This opened the opportunity in the power supply industry to develop a standardized modular approach to power processing — an ideal application for IPEMs. From the start, CPES researchers believed that apply- ing the IPEM building block approach would greatly reduce the product cycle time and improve power den- sity, performance, reliability, and cost. Telecom, server testbeds During the first five years, research focused on testbed demonstrations of IPEM technology for tele- com and servers. For the dc-dc converter, we chose an asymmetrical soft-switching half-bridge topology for its high efficiency and simplicity. For the power fac- tor correction converter, we used the then newly de- veloped SiC diode and CoolMOS® devices, which cut power loss by more than 35 percent. This enabled us to successfully demonstrate a low- profile (1U) design with a 30 percent improvement of power density. This design became the baseline con- verter from which we replaced discrete components with integrated active and passive IPEMs in the next generation. Distributed Power Systems Distributed Power System 3.10 The 2003 testbed IPEM proto- type of the same converter had 1/6 the number of components and was half the size, with a power density of 11.7 W/in3. In 1998, the best commercial converters supplying 1 kW, 48 V, dc power for internet servers from a 120 V, 60 Hz, ac outlet had a 2.6-in. height and a 5.8 W/in3 power density. In 2000, the first CPES baseline converter sported discrete devices and a power density of 7.5 W/in3. CPES 10 YEAR PROGRESS REPORT 2010 3.11 CPES has targeted systems and applications where its technology could achieve the greatest impact on energy efficiency. Shift to broader impacts With the initial IPEM successes for data servers, CPES shifted research in the second 5 years to explore broader impacts on society’s electrical energy usage. Ad- vanced electronic power distribution system architectures have been investigated for reliable supply of electrical energy in internet infrastructure, defense applica- tions, ships, and airplanes, as well as in the emerging distributed generation from alternative and renewable energy sources. In order to improve the understanding of complex multidisciplinary interactions and trade-offs in such systems, a novel modular-terminal-behavioral approach to modeling of power system components has been developed. As an example, over the past three years, we developed a flexible, autonomous hybrid power system testbed for future self-sustained applications that can demon- strate how power electronics can help save energy, protect the environment and im- prove people’s lives. The testbed incorporates renewable sources, power converter- based loads, and a grid-interfaced, controllable distribution network. The testbed is a self-contained, 3 kW, autonomous hybrid power system for data communications in remote locations. It is designed to provide uninterrupted energy supply to the data servers and air-conditioning as electrical loads. It is also a scaled-down, generic electronic power distribution system that can demonstrate applications such as future homes, hybrid electric cars, aircraft, and ships. The testbed includes a solar photovoltaic source simulator, a wind turbine, and an ac grid connection as energy sources. Lead-acid batteries, a battery charger, ac transfer switch, dc-ac inverter, and mixed ac-dc power distribution with computer- controlled measurement and supervision comprise the energy management system. In addition to its initial application demonstrating integrated power electron- ics converters, the new testbed inspired new research projects on system architec- tures and control, power/energy management, and system integration. The experimental electric power system testbed is a 3 kW autonomous hybrid power system for studying emerging electric systems in data centers, sustainable homes, ships, aircraft and hybrid electric cars. PERFORMANCE, EFFICIENCY ADVANCES • The first active IPEM based on em- bedded power packaging technologies was demonstrated in 2000. • Passive IPEMs were demonstrated for the first time in 2001. The IPEM significantly improved performance and power density and integrated the energy storage elements, including two capacitors and a resonant induc- tor together with three winding power transformers. • Improved active IPEMs were dem- onstrated by successively integrating all the active devices of the PFC and dc-dc converters in 2003. • The first prototype of the integrated EMI filter was developed in 2003. • In 2003, an integrated front-end con- verter using active and passive IPEMs with improved efficiency, power den- sity, and performance, was exhibited. 3: CENTER PROGRAM OVERVIEW 3.12 Sustainable Building Initiative Energy and sustainability have become key issues across the country and around the world. Renewable and alternative energy sources and energy conservation are receiving unprecedented attention. Power electronics, more than ever, can play a significant role in society’s transition to sustain- able development. While our integrated power electronics technology has been shown to reduce energy use in several high-energy-consumption applications, the next step is im- proving energy efficiency in the home. Homes provide one of the largest oppor- tunities for both improving energy-efficient utilization and for distributed energy generation. CPES is developing a sustainable building initiative and has launched several projects during Years 9 and 10 to jump-start research in this area: • A dc-based electric power system as a future home testbed at Virginia Tech. The goal is to design and construct a future home testbed by ren- ovating part of a CPES laboratory into a dc-based system with nominal home loads, renewable sources (wind and solar), advanced energy stor- age, a grid interface, plug-in hybrid, and an energy management system. • High-frequency power distribution system at the UW-Madison cam- pus. Major activities include an initiative to study and build a high- frequency (400 Hz or higher) ac distribution system testbed, combined with efforts to integrate plug-in hybrid vehicles into the system, and an investigation of the suitability of sustainable buildings as microgrids. • Integrated energy systems for portable information and entertainment ap- pliances. This research at RPI is focused on developing an integrated en- ergy system architecture that can provide and optimize the energy supply to portable entertainment and information appliances. These devices are expected to grow in number and significance in future sustainable build- ings, making the availability of such integrated energy systems increasingly important. CPES 10 YEAR PROGRESS REPORT 2010 3.13 Electr ic ene rgy mana geme nt cen ter Grid connection HVAC 3: CENTER PROGRAM OVERVIEW 3.14 OVERVIEW Enabling Technology: IPEM When CPES was formed, IPEMs were just a concept. We were convinced that, by standardizing, modulariz-ing, and integrating power electron- ics technology, we could dramatically improve the per- formance, reliability, and cost-effectiveness of electric energy processing systems. Central plane of ERC strategyThe IPEM, whether concept, design, or mod- ules, has served as the enabling technology — the cen- tral plane of the ERC strategy — throughout the past 10 years. In this central plane, IPEM technology has provided the components, processes, packaging, and design tools for the engineered systems described in the preceding pages. At the same time, this enabling technology set the direction for the specifications and objectives of the fundamental knowledge research. Conversely, the goals and capabilities in the other planes also directed IPEM development. IPEM development In the first five years, we made remarkable prog- ress in IPEM development as we pursued development of integrated modules for motor drives and for power supplies. We demonstrated the first IPEM in 2000 us- ing a CPES-developed embedded power packaging technique that included an active MOSFET device for power supplies that integrated the active components within the module. It was quickly followed by an active IPEM using IGBT devices for low-frequency higher- power applications; a passive IPEM; then a filter IPEM. COALESCENCE ENGINEERED SYSTEMS ENABLING TECHNOLOGY FUNDAMENTAL KNOWLEDGE DEMONSTRATIVE PROGRAM Thrust DEMONSTRATIVE PROGRAM Thrust IPEM SYNTHESIS TECHNOLOGY DEVELOPMENT Thrust TECHNOLOGY DEVELOPMENT Thrust CONVERGENCE Distributed Power Systems Distributed Power Systems System Partitioning Specifications Processes & Algorithms Components & Materials Technology Requirements Integrated Design Tools Integrated Design Tools IPEMs Motor Drives IPEM Development Advanced Power Semiconductor Devices Advanced Power Semiconductor Devices Control and Sensor Integration Integrated Packaging Advanced Power Electronics Packaging System Integration High Performance Drives Packaged Drives Provide focus and research program integration Enhance long-term scientific innovation 1998 1999 2000 2001 2002 2003 YEAR 5YEAR 4YEAR 3YEAR 2YEAR 1 CPES 10 YEAR PROGRESS REPORT 2010 3.15 Basic functions of a power electronics system: 1. Switching elements to regulate energy flow 2. Electromagnetic energy storage and transformation for proper functioning of switching, control, and filtering 3. Spatial and temporal operations control 4. Thermal management 5. Mechanical/structural integration of com- ponents, modules, and total assembly IPEM Functional Partitions CONTROL & SENSOR SIGNALS EMI FILTER IPEM EMI FILTER IPEM PASSIVE IPEM ACTIVE IPEM THERMAL ENERGY INPUT ENERGY OUTPUT ENERGY A passive IPEM integrates the energy storage capaci- tors, inductors, and transformers. A filter IPEM also physically integrates inductors and capacitors, but is used specifically to attenuate high-frequency switch- ing noise. An overarching effort in IPEM synthesis research progressed from the analysis of the multi-disciplinary design process to developing an integrated design methodology. The CPES software integration enabled commercially available models from many different segments of power electronics to be used for an overall IPEM system design. IPEM adoption Industrial adoption has been swift. In IT, the IPEM has been adopted to power the new genera- tion of desktop processors. Before CPES, the concept of an Intelligent Power Module (IPM) was only in its infancy, but now it is widely used in low power motor drives. The IPEM has also become a mainstream con- cept in high power applications. Continuing thrusts With advances from CPES fundamental knowl- edge efforts, including a nano-silver die attach and a silicon carbide diode, we proceeded with IPEM tech- nology on two levels: high-frequency IPEMs for power supplies and low-frequency IPEMs for motor drives. In support of both thrusts, power electronics integra- tion technology continues to translate engineering ba- sics into the necessary technology and materials for integrated building blocks. GRADUATION IPEM-Based Power Conversion Systems (IPEM-PCS) Microprocessor and Converter Integration Advanced Power Semiconductors Integrable Materials High-Density Integration Thermal- Mechanical Integration Control and Sensor Integration Standard-Cell Active and Passive IPEMs Motor and Converter Integration Electro-Magneto-Thermo-Mechanical Integration Technology Integrated Motor Drive Systems Power Electronics Integration Technology Integrated Power Conversion Systems Semiconductor Power Devices and ICs Power Distribution Systems Sustainable Building Initiative Integrated Modular Motor Drives Control and Sensor Integration Thermal- Mechanical Integration High-Density Integration Integrable MaterialsAdvanced Power Semiconductors Low-Frequency IPEMs Passive IPEMs High-Frequency IPEMs Integrated Power Supply (Voltage Regulator Module) EXPANDED CREATIVITY Consolidate research to maintain critical mass 2004 2005 2006 2007 2008 AND BEYONDYEAR 11YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6 3: CENTER PROGRAM OVERVIEW 3.16 Integrated Voltage Regulator Modules For new generations of microprocessors Over a period of 10 years, the Intel proces-sor has evolved from relatively low volt-age of 2 volts (V) and 10 amps (A) to a still lower voltage of less than 1 V and an increased consumption of more than 100 A of current. This has been possible because of CPES technology that powers every Intel processor today. The multi-phase voltage regulator module (VRM) technology at the heart of this success story is a spe- cialized distributed power system. It has been a direct- commercialization effort, with a testbed including all the computers worldwide. The new generation of Intel’s microprocessor operates at a much lower voltage and higher current and high clock frequency to increase data processing speed. The processor requires a fast dynamic response in order to implement the sleep/power mode of opera- tion. This mode is necessary to conserve energy and extend operation time for battery-powered equip- ment. A VRM is used to provide precisely regulated output with fast dynamic response so that energy can be transferred as fast as possible to the microprocessor. The first generation VRM was too slow to respond to the microprocessor’s transient energy demand. The initial solution was to use a large number of capacitors, which increased the volume and cost. At the request of Intel, CPES established a mini- consortium that consisted of Intel, International Rec- tifier, National Semiconductor, Texas Instruments, STMicroelectronics and Delta. The goal of the consor- tium was to address the power management issue, with a target of supplying the power to microprocessors at 1.2 V and 60-100 A. Breaking away from that era’s conventional method of paralleling power semiconductor devices in order to meet the increasing current demand and Prior to the Pentium Pro processor, Intel’s 486 micropro- cessor used a “silver box” power supply with 5 V output. The Pentium Pro employed lower voltage and more than doubled the clock frequency. This required a dedicated power module — a VRM, which was adjacent to the processor. This was not scalable. In 1997, CPES proposed a multi- phase buck converter. The proto- type showed a 600% improvement in power density, 1/3 the profile, a 1000% reduction of energy storage inductors and a 600% reduction of input/output capacitors. CPES 10 YEAR PROGRESS REPORT 2010 3.17 efficiency requirements, CPES proposed a system that paralleled a number of mini-converters. By also phase- shifting the clock signal, not only were we able to can- cel most of the output current ripple, but also increase the ripple frequency, thus reducing the need for a large number of capacitors. Industry adopted the multi- phase VRM approach almost immediately. Power management consortium Today, CPES researchers continue to investigate this issue due to continuous reduction in voltage as well as continuous increase in load current. We are exploring new topologies and power architecture, new power semiconductor devices and power ICs, inte- grated magnetics, fast control and integrated packag- ing concepts to improve the transient response and minimize the I2 R loss due to continuous reduction in voltage as well as continuous increase in load current. The mini-consortium has been renamed the Power Management Consortium (PMC) with an ex- panded scope to continue pursuing power efficiency in microprocessor-based computer and telecommu- nication applications through novel developments in power electronics topologies and system architecture. Membership totals 20 members at year 10, with much of the growth in the past year. The testbed for these systems is the most popular commercial microprocessor in the world. Within a year, every Intel proces- sor was powered with the CPES- developed multi-phase VRM. By 2002, many companies offered IPEM products, referred to as “Dr. MOS” for point-of-load and VR applications. Among other innovations, CPES promoted the idea of replacing conventional wirebond with direct bonding and introduced techniques such as flip-chip-on- flex and “embedded power.” In 2002, firms introduced products without using wirebond. As clock frequencies and power requirements continue to rise, CPES is developing novel archi- tectures to push the technology to meet these future demands. A two-stage solution provided one step along the way. Although the Intel microprocessor followed Moore’s Law in its early decades, the past 10 years show the processor outpacing the predicted 18-month doubling of transistor density. The sharp upward curve coincides with the use of CPES multi-phase VRM technology. CPES researchers are currently working on novel developments for microprocessors. Intel Processors Development Roadmap 3: CENTER PROGRAM OVERVIEW 3.18 High-Frequency IPEMs For integrated power supplies The IPEM concept was conceived when Virginia Tech researchers first developed the multi-phase voltage regulator module for power pro-cessing of the Intel Pentium II chip. Power sup- plies have been an ongoing CPES theme in one form or another ever since. As electronic equipment shrinks in size, power supplies must minimize accordingly. Therefore, IPEMs for power supplies are typically high frequency in nature (up to MHz range) in order to re- duce the size and weight of the passive components. Challenges Improving integration and reducing the pack- aging size are ongoing challenges for high-frequency IPEMs. Continued development depends on concur- rent advances in materials, packaging, and power de- vices. Another challenge is parasitic inductance and capacitance. As more components occupy a smaller space, their proximity to each other encourages un- wanted parasitics to arise. High-frequency IPEM developments The first IPEM was an active high-frequency de- vice for server power supplies. It was based on a wire- bond approach and used for benchmarking. Each suc- ceeding generation showed improvement in reducing interconnect parasitics and in reducing the common mode noise current that arises from parasitic capaci- tance inherent with the multi-layer structure. The first passive IPEM was also for high-frequen- cy power supplies. The passive IPEM replaced the functions of discrete capacitors, inductors, and power transformers. The integration was built upon multi- layer, three-dimensional structures that used materials with different properties. CPES is promoting the idea of replacing the Three generations of IPEM development for server power supplies. The early IPEMs were based on the wire-bond approach for benchmarking purposes. The next generation shows improvement in reducing the interconnect parasitics and in reducing the common mode noise current due to parasitic capacitance inherent with the multi-layer structure. The third generation shows an embedded IGBT and SiC device with double-sided cooling. 1999 2001 2002 CPES 10 YEAR PROGRESS REPORT 2010 3.19 conventional wirebond with direct bonding, and has introduced a number of techniques, such as the flip- chip-on-flex and the embedded power technology. These integration approaches feature much-reduced interconnect parasitics, which enhance circuit perfor- mance; improved thermal management by introduc- ing the opportunity for double-sided cooling; and im- proved functional integration by integrating snubber capacitors, bus capacitors, chip inductors, and incor- porating embedded current sensors into the multi- chip, multi-layer packaged module. CPES later developed filter IPEMs for electromag- netic interference (EMI) and radio frequency (RF) in- terference. The EMI-filter IPEMs integrated magnetics and dielectrics for frequencies between 100 kHz and 10 MHz and were developed for use in a ballast in a 20 W high-intensity-discharge (HID) lamp. Integrated power supplies As IPEMs and their supporting technology devel- oped, CPES pushed to develop a three-dimensional integration of a complete power supply, combining ac- tive, passive, and filter IPEMs in a common structure. The goal is a complete physical integration in a three- dimensional multi-chip module so that power supplies can be even better integrated with microprocessors. CPES has developed a demonstration integrated power unit, using a “stacked power” architecture. Active components are embedded inside ceramic layers that have high thermal conductivity. With moderate air flow, a heat sink can then be eliminated. The passive components are integrated with the active components using low-temperature co-fired ceramics. During testing, the single-phase module achieved 83 percent efficiency at 18 A output current and 91 percent efficiency at a light load of 4.5 A. The light- load efficiency shows promise in computer-related applications. Integrated Power Supply technology is still in its infancy and CPES researchers are tackling the issues with a multi-disciplinary team of experts in materials, packaging, semiconductor devices and circuits, and system-level expertise. CPES 3-D integrated power supply converter module, showing the first physical integration of all active and passive components in a single package. 2006 3: CENTER PROGRAM OVERVIEW 3.20 Low-Frequency IPEMs For integrated modular motor drives Throughout its history, CPES has aggressively pursued the development of active IPEMs for motor drives and other applications with switching frequencies of 20 kHz or less. The common theme of this research has been to develop new features and new packaging technologies that combine to advance the state of the art of integrated power module technology. The development of mo- tor drives with integrated power electronics is a ma- jor success for the CPES integration concept that is already achieving energy savings in many commercial applications worldwide. Early years One of the first motor drive power modules was the high-performance drive IPEM consisting of an IG- BT-based inverter phase-leg capable of delivering 75 A to a motor phase winding from a 600 V dc bus. Al- though this early benchmark IPEM used conventional chip-and-wire interconnect technology, it already em- bodied the philosophy of integrating gate drives and higher-level features inside the power module. Research efforts began early in CPES to develop the concept of a flexible active gate drive that would incorporate a combination of advanced features ap- plicable to the widest possible range of MOS-gated power devices. Desired features include active control of turn-on and turn-off transitions, level-shifting, de- vice sensing, protection, and gate drive power supplies. New techniques were developed to independently ad- just both the dv/dt and the di/dt transition rates for switching events on a pulse-by-pulse basis. During 2002-03 a prototype motor drive IPEM was designed and fabricated that incorporated flip- chip-on-flex planar interconnect technology and a version of active gate drive control. The prototype switched 10 A from a 300 V dc bus, appropriate for a 1-3 hp motor drive. Standard cell IPEMs After IPEMs were successfully demonstrated for both high- and low-frequency applications, CPES shift- ed focus to developing standard cell IPEMs, reflecting a desire to make the IPEM technology appropriate for as wide a range of applications as possible using high- volume production techniques to reduce cost. Embed- ded-power planar interconnect technology was adopt- ed for subsequent generations of standard-cell-IPEMs in order to consolidate fabrication efforts and to take advantage of progress that was being made in applying this packaging technology to high-frequency IPEMs. Two generations of the embedded-power IPEMs were designed and fabricated during Years 7 to 9 and valu- able improvements were made to the embedded power fabrication process during this time. Advanced features Several projects were conducted in parallel with the IPEM design and fabrication projects in order to develop advanced features appropriate for incorpora- tion into IPEM designs. For example, an Augmented Phase-Leg Configuration (APLC) that is inherently immune to catastrophic shoot-through failures was in- vented and successfully tested. A new, charge-boosting gate drive power supply architecture was also devel- oped that ensures the availability of gate drive pow- er to the phase-leg upper switch under all operating conditions. CPES 10 YEAR PROGRESS REPORT 2010 3.21 Significant attention was also devoted to thermal management issues. For example, early on, CPES in- vestigated the thermal performance capabilities of heat pipes installed to remove heat from the upper surfaces of IPEMs in order to provide the advantages of dou- ble-sided cooling. As a result, during Year 9, a high-temperature phase-leg and gate drive was developed and success- fully demonstrated for operation in a 175° C environ- ment, using silicon carbide MOSFETs and Schottky diodes for the power switches. Continuing development Low-frequency IPEM research conducted dur- ing the past 10 years was successful on several levels. This progress was achieved by actively encouraging the participation of CPES researchers from all of the campuses and nearly all of the research thrusts. CPES researchers plan to maintain this collaboration to con- tinue the development and commercialization of low- frequency IPEMs. We seek to go on reducing the size and cost and to increase reliability and efficiency to meet the needs of commercial applications. High Performance Drive IPEM Universal Active Gate Drive (UAGD) Augmented Phase-Leg Configuration High-Temp (175°C) Phase-Leg Motor Drive IPEM Standard Cell IPEM LOW FREQUENCY IPEMS: 1998 – PRESENT 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 YEAR 11YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6YEAR 5YEAR 4YEAR 3YEAR 2YEAR 1 3: CENTER PROGRAM OVERVIEW Passive IPEMs 3.22 CPES developed three standard-cell IPEMs for integration in devices: active IPEMs, passive IPEMs, and filter IPEMs. Contin-ued development of active IPEMs is pur- sued in the high-frequency and low-frequency IPEMs in the preceding pages. We are also pursuing advances in passive IPEMs, which integrate the energy storage capacitors, inductors, and transformers and in filter IPEMs, which are passive devices, but used to attenu- ate high- and low-frequency switching noise. Passive IPEMs influence device size In power electronics devices, it is typically the passive components and their interconnects that de- termine the size and profile of a device. Continued de- velopment of this technology is therefore critical for continued miniaturization and integration. In passive IPEMs, the passive integration is built upon multi-layer, three-dimensional structures using materials with different properties, such as high per- meability, high dielectric constant, and high conduc- tivity, in order to achieve integrated, multi-functional properties. CPES research in this area is part of our power electronics integration technology thrust and advances rely on work in high-density integration, ma- terials, and thermal-mechanical integration. Passive IPEM advances Functional and process integration with improved thermal management was successfully demonstrated in 2000. After the initial breakthrough, CPES quickly developed new advances in passive IPEMs, particularly exploring alternative or new materials to better inte- grate existing functions or to integrate new functions into passive IPEMs. Materials investigated include thin-film dielectric materials and a composite nano- material with ferrite and ferro-electric components. Advances in passive IPEM integration include the integration of inductors, capacitors and transformers, the development of super-passive IPEMs, thermal- passive integration, low-temperature, co-fired ceramic power inductors, and filter-integrated IPEMs. Integrated inductor, capacitor, and transformer (2000): CPES developed the construction technologies and processes for generic integration of inductors, capacitors and transformers. Super-passives (2004): In an effort to improve the behavior of passive building blocks, an embedded layer was integrated into an EMI filter to cancel out parasitics effects, resulting in broader bandwidth. RF Filter integrated IPEMs: In 2003, CPES demonstrated an EMI filter circuit that integrates high- frequency absorbing elements as part of the construction of the converter system for a transmission-line RF filter. CPES 10 YEAR PROGRESS REPORT 2010 The structure for passive integration is built around the integrated LC-primitive, as shown in the figure above. When two primitives are located inside a magnetic core and the magnetic leakage between the two is enhanced by a magnetic leakage layer, the integrated structure exhibits the behavior of two equivalent inductors, an equivalent capacitor and transformer action called an integrated LLCT. By changing the interconnections on the same primitive, we can realize three different functions from the same physical structure. Consequently, when arranging two or more primitives in a structure as shown here, a multitude of functionalities can be obtained from the same structure merely by changing interconnections. 3.23 Ongoing challenges Although CPES technology in passive IPEMs has broken ground on many new fronts, additional chal- lenges arise with each new development. A major goal is to integrate active and passive IPEMs in one com- ponent, which will impose a host of new requirements upon the building blocks. For instance, the efficiency needs to be high at partial loads, or needs to be opti- mized for the entire system over its life. The environ- ments will be harsher, with voltages reaching tens of kilovolts and the power reaching hundreds of kilo- watts, leading to intense electromagnetic fields, tem- perature, and mechanical stress. Diagrammatic representation of technology for integration of electromagnetic power passives: LC primitive (left) and structure of a typical LLCT (right). Thermal-passive integration: CPES embedded heat extractors into the magnetic materials of the passive IPEMs to improve the power density of passive modules without hurting electromagnetic performance. Our ceramic dielectric heat extractors embedded into ceramic magnetic cores doubled the loss-handling capability. Low-temperature co-fired ceramic power inductor: A low-temperature co-fired ceramic inductor was developed for a single-phase buck converter operating at a switching frequency exceeding 1 MHz. The inductor outperformed similar commercial inductors and showed more than ten times the power handling capability. Secondary Leakage Layer Primary LC Parallel resonant Series resonant Low-pass filter aa b c c c d ddd db a a a 3: CENTER PROGRAM OVERVIEW OVERVIEW Fundamental Knowledge 3.24 Long-term, high-risk, and high-impact best de-scribe CPES fundamental knowledge research. The development of IPEMs for power conver-sion and motor drives depended on significant advances in materials, integration technology, ther- mal-mechanical understanding, semiconductors, and controls and sensors. Fundamental knowledge efforts were initially integrated into two general thrusts: advanced power semiconductor devices and advanced power electron- ics packaging. As the IPEM concept developed, the ba- sic research in packaging shifted to integrated packag- ing. At the same time, advances in motor drives and power conversion created a need for specific funda- mental work in control and sensor integration. Strengthening research emphasis After its 2003 site visit, NSF encouraged CPES to put more emphasis on long-term scientific inno- vation and in response. We identified five key areas: advanced power semiconductors, integrable materials, high-density integration, thermal-mechanical integra- tion, and control and sensor integration. Those five thrusts continue today as part of our overall research strategy. Advanced power semiconductors is a major component of the semiconductor power devices and ICs thrust of the post-ERC CPES. Ongoing work in control and sensor integration is being woven into the integrated motor drive systems thrust; while high den- sity integration, integrable materials and thermal-me- chanical integration are combining to form the core efforts in the integration technology thrust. COALESCENCE ENGINEERED SYSTEMS ENABLING TECHNOLOGY FUNDAMENTAL KNOWLEDGE DEMONSTRATIVE PROGRAM Thrust DEMONSTRATIVE PROGRAM Thrust IPEM SYNTHESIS TECHNOLOGY DEVELOPMENT Thrust TECHNOLOGY DEVELOPMENT Thrust CONVERGENCE Distributed Power Systems Distributed Power Systems System Partitioning Specifications Processes & Algorithms Components & Materials Technology Requirements Integrated Design Tools Integrated Design Tools IPEMs Motor Drives IPEM Development Advanced Power Semiconductor Devices Advanced Power Semiconductor Devices Control and Sensor Integration Integrated Packaging Advanced Power Electronics Packaging System Integration High Performance Drives Packaged Drives Provide focus and research program integration Enhance long-term scientific innovation 1998 1999 2000 2001 2002 2003 YEAR 5YEAR 4YEAR 3YEAR 2YEAR 1 CPES 10 YEAR PROGRESS REPORT 2010 3.25 Many successes The success of the fundamental knowledge ef- forts is evident through the commercialization of several CPES developments, plus through the speed with which CPES was able to establish the concept and implementations of IPEM technology. Critical ad- vances include the nanoscale silver paste for attaching components. Multi-university, multidisciplinary efforts A key feature in the success of CPES fundamen- tal knowledge efforts has been the interactions of researchers across universities and disciplines. The thermal-mechanical integration group, for example, pulled its team from across all five universities, tapping the special expertise of individual members. Another example is the multidisciplinary team ef- fort to address the need for high-temperature packag- ing of wide bandgap power semiconductor devices. In this effort, the advanced power semiconductor group contributed silicon carbide device design, fabrication, and characterization; integrable materials researchers applied their nanoscale silver paste and high-density integration researchers did the package fabrication and testing. Many such cross-functional teams were part of the CPES successes, especially after the IPEM concept developed and system-level issues arose. Advanced power semiconductors: The ultimate goal is to find a power de- vice capable of high temperature op- eration with minimum conduction and switching loss. Another goal is balancing on-chip integration and integration at the IPEM level with optimum cost, reli- ability, performance, broad applicability and flexibility issues. Control and sensor integration: The goal is to create the fundamental knowl- edge needed to “intelligently” integrate current and temperature sensors and ac- tive controls into power electronics with technology approaches that have the potential to significantly improve both functionality and reliability while signifi- cantly reducing costs. High density integration: The goal is to effectively incorporate switching, energy storage and transformation, controls, conduction, and thermal man- agement into a single system that is manufacturable, mechanically and struc- turally sound and can operate effectively and reliably throughout its lifetime. Integrable materials: The goal is to develop materials technology that is fun- damental to both integrating the various functions into a power electronics mod- ule and to understanding the physical mechanisms of module failure. Thermal–mechanical integration: The goal is to develop the modeling and analysis tools to determine and over- come the thermal and mechanical barri- ers that might limit IPEM integration in a wide range of applications. FUNDAMENTAL KNOWLEDGE THRUSTS AND GOALS GRADUATION IPEM-Based Power Conversion Systems (IPEM-PCS) Microprocessor and Converter Integration Advanced Power Semiconductors Integrable Materials High-Density Integration Thermal- Mechanical Integration Control and Sensor Integration Standard-Cell Active and Passive IPEMs Motor and Converter Integration Electro-Magneto-Thermo-Mechanical Integration Technology Integrated Motor Drive Systems Power Electronics Integration Technology Integrated Power Conversion Systems Semiconductor Power Devices and ICs Power Distribution Systems Sustainable Building Initiative Integrated Modular Motor Drives Control and Sensor Integration Thermal- Mechanical Integration High-Density Integration Integrable MaterialsAdvanced Power Semiconductors Low-Frequency IPEMs Passive IPEMs High-Frequency IPEMs Integrated Power Supply (Voltage Regulator Module) EXPANDED CREATIVITY Consolidate research to maintain critical mass 2004 2005 2006 2007 2008 AND BEYONDYEAR 11YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6 3: CENTER PROGRAM OVERVIEW High Density Integration 3.26 A power electronics system needs switching elements to regulate the flow of energy. It needs electromagnetic energy storage and transformation to allow for proper high frequency energy processing by means of switching and filtering. It needs control to execute all operations correctly, both spatially and temporally. It needs high- power, low-loss conductors, and thermal management to assure thermal stability and operation at the cor- rect temperatures. Finally, the system needs the com- ponents, modules, and complete assembly to be me- chanically and structurally sound in order to ensure appropriate operation and lifetime/reliability. System-based hybrid integration Considering all these requirements, it is clear that while the switching function and the control function in some cases can be monolithically integratable into a semiconductor material, in other cases this might not be economically feasible. Energy storage components, on the other hand, must be integrated using different materials – especially for use at higher power levels. This leads to a system-based hybrid integration tech- nology. To accommodate the diversity of materials, struc- tures, processes, functionalities, and power levels in a typical power electronics system, CPES chose the hierarchical “integrated packaging” strategy. Active, passive, and EMI filter IPEMs are essential building blocks in typical power conversion systems. Thermal management is another essential function that needs to be considered during IPEM development, especially in terms of integration opportunity. Double-sided metalization For integrating active modules, it would be highly desirable to have a structure with double-sided met- alization. This would provide for three-dimensional integration as well as for double-sided cooling. Fol- lowing the then-current wire-bond interconnect tech- Modularization Concept IPEM System Integration Concept 3D Planar Stack Embedded Power 800 V, 80 A Joint Reliability Crack Growth PFC & Dc-Dc Integration 600 V, 12 A Passive Module Packaging LC in DIP Standard-Cell IPEM 600 V, 20 A Embedded IGBTs and SiC Diodes Integrated Transmission Line EMI Filter Differential Mode Integrated EMI filter Differential and Common-Mode MPIPPS Post-Bonded Planar Package D2 BGA IGBT in Power BGA Flip-Chip on Flex 800 V, 90 A Dimple Array 600 V, 50 A Integrated LLCT 97.8%, 70 W/cc MILESTONES IN POWER ELECTRONICS PACKAGING AND INTEGRATION 2000 2001 2002 2003 YEAR 5YEAR 4YEAR 3 1998 1999 YEAR 2YEAR 1 — — — — CPES 10 YEAR PROGRESS REPORT 2010 3.27 nology would not have allowed these possibilities. It was also clear that any choice of a non-wire-bond top interconnect would imply the additional process steps of making the industrially available aluminum contact pad device chips solderable by additional metal depo- sition. Although lead–tin solder compositions for the die attach also had industrial acceptance, it was clear that the program would have to consider lead-free in- terconnect material, since international pressure for lead–free electronics was mounting. Integrating passives and filters For the integration of passives and filters, the combination of ferrites and dielectric ceramics with a high dielectric constant had already been proven to be the best choice for use in frequency ranges up to 1 MHz, while for frequency ranges of 1 MHz and be- yond, polymer-based dielectrics also became feasible at the kW power level. Due to the brittle nature of ce- ramic dielectrics, planar metalization by a deposition technology with low interface stress had to be used. Plasma metal spraying and electroplating were both developed as viable methods. While good adhesion by plasma metal spraying was readily achieved, electro- plating required the deposition of thin film adhesion layers before plating, preferably by sputtering. Encap- sulation of these modules could follow the practice for active integrated modules. Optimizing volume Having the same form factor for the active, pas- sive and filter modules would optimize volume utili- zation in system packaging. Additionally, we selected planar technology for all modules for low-profile considerations and the possibilities for hybrid three- dimensional integration. Using planar conductors on ceramics, planar metal deposition of interconnects to the semiconductor die, planar magnetics, and other planar structural members in all three types of mod- ules could lead to the same types of manufacturing processes for each type of module, which would be an important advantage for IPEM integration technology. Improving thermal management & integration In the interest of improved thermal management and three-dimensional integration, the technologies selected for the active power modules have rigid inter- connects at both the top and the bottom of the die. A failure mode common to all the explored technologies is the cracking and voiding of the bottom die-attach solder layers due to the thermal cycling that occurred during the lifetime of the module. This work can also be extended to the failure modes in solder bodies, such as metal post interconnects and solder balls or col- umns, that are used in the top interconnects in place of the traditional wire bonds. In these cases, however, the stress concentrations have been shown to have a sig- nificant influence on the failure modes and lifetimes. A considerable effort also must be devoted to meth- ods for detection of these failures by non-destructive techniques such as scanning acoustic microscopy and thermal impedance measurement. Nano-Silver Die Attach Low Pressure Low Sintering Temperature Double-Sided Cooling SC-IPEM Super Passive Parasitic Cancelation Integrated Transmission Line EMI Filter Differential and Common-Mode Thermal-Passive Integration Transformer with Integrated Heat Extractor Thermo-Mech Stress Model Metal on Silicon High-Temperature Planar Module 250°C SiC Diode LTCC Power Inductor 12.5 A, 4 MHz Failure Modes Metal on Brittle Substrates Metal-Ceremic Fracture Model with California Lutheran University 3D Active/ Passive/Thermal Integration Stacked Power 24 A, 260 W/in3 Flex Power 600 V, 15 A Standard- Cell IPEM High-Voltage Embedded Power >2 kV SiC Devices 2004 2005 2006 2007 2008 YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6 — — 3: CENTER PROGRAM OVERVIEW Integrable Materials 3.28 Materials technologies are fundamental to both integrating the various functions into a power electronics module and to understanding the physical mecha- nisms of module failure. As such, this research thrust has played a vital role in CPES technology and devel- opment. Materials research was initially a part of the pack- aging research thrust, but was strengthened in 2003 with the establishment of the integrable materials re- search thrust. The increased emphasis was in response to an NSF site visit encouraging CPES to emphasize fundamental research. Within the integrable materials thrust, CPES re- searchers conducted long-term, high-risk materials research in die bonding and thermal management, passive integration using multi-functional materials, electromagnetic fields sensing, and controlling physi- cal failure mechanisms. Many of the advances from this work were inspired by developments in emerging fields, such as nanotechnology and micro-electro-me- chanical systems (MEMS). As CPES moves toward a post-graduation struc- ture, materials research has been integrated into the power electronics integration technology thrust. Problem: Passive components in electronic products, such as power supplies for computer and communications equipment, generally occupy a large space, resulting in bulky electronic packages. Integration or embedding of these components can reduce the overall package size. This approach pres- ents reliability challenges at the interfaces between the various types of materials stemming from me- chanical, thermal, and thermo-mechanical stresses. Solution: If a single material could have the de- sired ferroelectric and ferromagnetic properties, it could be used to make both capacitive and induc- tive components in the same space or volume. This would significantly reduce package size or weight and interconnection interfaces. Multiferroic mate- rials in the form of ferroelectric-ferrite composites have been fabricated by mixing powders of the di- electric and magnetic constituents and then fired or sintered together to make EMI filters. However, this processing approach requires high sintering temper- atures in excess of 1000°C, which challenges the use of good conductive metals, such as silver or copper in the integrated passives. We synthesized multiferroic nanocomposites of ferromagnetic and ferroelectric materials. The sol- gel technique we used allows for uniform and inti- mate mixing of the individual components. Through the nanoscale route, novel structures with enhanced properties and functionalities can be realized. Nano- structures also require lower subsequent processing temperatures, thus reducing potentially adverse re- actions between the components. Our multiferroic nanocomposite consists of nanosize particles of a ferrite phase coated with or embedded in a matrix of a dielectric phase. The nanocomposite can be sin- tered at a temperature below 1000° C. PASSIVE INTEGRATION USING MULTI-FUNCTIONAL MATERIALS CPES 10 YEAR PROGRESS REPORT 2010 3.29 A paste made from silver nanoparticles is used to attach components resulting in much improved thermal management of integrated modules. Until recently, power semiconductor devices in single-chip packages or multi-chip power mod- ules were fastened to substrates using either lead or lead-free solder alloys. These connections serve as electrical interconnections and heat dissipation paths. In the case of power modules, an additional large-area solder layer was often used to attach the substrate to a heavy heat-spreading plate. Solder was commonly used for chip attachment because of its low processing temperature: most solder-reflow pro- cesses can be done below 300° C. However, solders have low electrical and thermal conductivity. Also, die-attached solder layers are susceptible to fatigue failure under cyclic loading. Furthermore, because the soldering process involves the melting and solidi- fication of solder particles in a flux mixture, voids of- ten form due to entrapped gas evolving from the flux components and poor wetting of the surface by the solder. The growth of voids during thermal cycling is detrimental to the reliability and thermal perfor- mance of die-attached layers. When lead was banned in electronic products, European electronic manufacturers implemented a silver sintering technology for interconnecting semi- conductor chips. However the sintering technologies required a quasi-static pressure to lower the sinter- ing temperature of thick-film silver pastes to about 250° C. The need for high pressure complicated the manufacturing process and placed critical demands on substrate flatness and chip thickness. The CPES solution used nanoparticles of sil- ver to lower its sintering temperature with low or no pressure. The driving force for densification of a particle compact increases with decreasing particle size, thus the densification rate — a product of ther- modynamic driving force and kinetics — could still be high at low temperatures even with a low atomic diffusion rate. We formulated a uniform silver paste containing 30-nm silver particles. The paste has a uniform structure and viscosity can be adjusted for screen/stencil printing or dispensing. The sintered at- tachment has excellent electrical, thermal, mechani- cal, and thermo-mechanical properties and offers a simpler, lead-free solution for chip interconnection. A key issue in the development of modules is the reliability of the interconnection scheme used and CPES has actively pursued planar interconnect technologies for packaging IPEMs. Typically, compromises are made to accommodate the electrical require- ments to the detriment of mechanical integrity. In seeking to alleviate potential problems where the joints are exposed to stresses due to mismatches among the packaging materials and devices, CPES researchers developed the FlexPower concept. With FlexPower, the top of the mounted devices (IGBTs and diodes) are intercon- nected by flexible metal straps. The straps can be plain copper or copper plated with silver. The joints to the devices are formed by reflowing solder to form an hourglass shape with the height controlled by a high-temperature solder ball in the middle. The increased height and hourglass shape, and the flexibility of the straps will enhance reliability. The joints are relatively easy to fabricate as the procedure follows traditional joining processes. The technique is also conducive to automation in manufacturing. FlexPower technology also provides a route to high-temperature packaging because the devices will be attached to the substrate using nanosilver paste. MATERIALS FOR LARGE AREA DIE BONDING MATERIALS ADVANCES TO CONTROL PHYSICAL FAILURE Underfill Passivation FilmUBMPower Chip Middle Solder Bump Flex External Solder Bump AI Pad Hourglass-shaped Solder Joints 3: CENTER PROGRAM OVERVIEW Thermal-Mechanical Integration 3.30 Thermal management issues are a key limiting barrier to the overall CPES goals of IPEM inte-gration and the ability to impact a wide range of applications. These issues influence cost, reliability, and overall system performance, which ne- cessitates the development of novel integrated cooling approaches specifically for IPEMs. The theoretical lim- its of these approaches must be determined, however, at a fundamental level, requiring the development of computationally efficient analysis tools. As a result, CPES initiated the thermal-mechanical integration research in its second year to address these critical concerns. We recruited into the core team sev- eral faculty members from the mechanical engineer- ing departments at Virginia Tech and the University of Wisconsin. Contributions were made in thermal model development and experimental verification at the IPEM and system levels, integrated design optimi- zation, and double-sided cooling feasibility analysis. Expanding the research group After the second year of CPES, we expanded the team to include faculty members from North Carolina A&T and the University of Puerto Rico-Mayagüez, who focused on the reduced-order model develop- ment, which was found to be a major roadblock for the advancement of integrated design methodology. In 2004, we further strengthened the team with members from Rensselaer. The overall goal of this research thrust has been to develop integrated cooling technologies for planar structures and assess fundamental cooling limitations. Critical tasks included the development of (1) multi- level, multi-physics analysis tools and experimental techniques to determine the limitations of perfor- mance, (2) integrated thermal management technolo- gies, (3) automated algorithms to generate reduced-or- der thermo-electric models, and (4) methodologies to characterize thermo-mechanical failure mechanisms. Thermal modeling and analysis Continuous efforts in the thermal modeling and analysis of IPEMs and IPEM-based systems have reached consistent agreement between experimental and detailed finite element results within 6 percent. To identify the fundamental limitations on the thermal management of IPEMs, we evaluated novel thermal management solutions such as double-sided cooling, thermo-electric coolers, mini- and micro-channel cooling by developing detailed thermo-electrical- mechanical finite element models, and experimental validation of the models. The feasibility of using min- iature heat pipes for double-sided cooling of devices in IPEMs was established. Fast electro-thermal lumped models In order to facilitate the development of software integration tools for thermo-electrical parametric studies, package design optimization, and long-term reliability assessment, significant progress was made in the development of fast electro-thermal lumped mod- els with automated parameter extraction techniques. CPES 10 YEAR PROGRESS REPORT 2010 3.31 A novel 1-D lumped capacitance and partial element thermal modeling approach was developed and exper- imentally validated for several planar IPEMs. Another approach developed equivalent circuit reduced-order modeling in the form that can be automatically ex- tracted from finite-element simulations. Thermal integration of IPEMs Later, major research focus was on integration of motor and drive electronics in a single housing, including the need to develop a modeling methodol- ogy that can be applied to the complex system associ- ated with the thermal integration of the IPEMs with their motor poles. The modeling methodology for the design of an air-cooled system was developed and ex- perimentally validated within the experimental and model uncertainties. More advanced thermal manage- ment systems, including forced air, liquid cooling, heat pipes, and direct liquid dielectric spray cooling were also investigated. Experimental measurements were conducted to study the cooling effectiveness of dielec- tric spray cooling with different nozzle configurations. The performance of mixtures of dielectric fluids in spray cooling of high heat flux surfaces was measured for the first time. Significant advantage of this technol- ogy to provide cooling was demonstrated. Concept of double-sided cooling for IPEM Temperature distributions on top-side metalliza- tion of standard-cell IGBT IPEM. Single sided cooling Double sided cooling 93.8° 81.4° CPES made major advances in double-sided cooling technology, illustrated here. One of the advances involved extracting heat by fluidic channel cooling. Using micro-channels on a silicon substrate, the CPES technology can extract heat at the astonishing flux of 200 W/cm2. SEM photograph of a microchannel fabrication on silicon substrate 3: CENTER PROGRAM OVERVIEW Semiconductor Power Devices and ICs 3.32 Research in semiconductor power devices and integrated circuits (ICs) has fast-moving targets, thanks to the development speed of commercially available components. The goal is to focus on high value-added efforts relative to the marketplace, while maintaining optimum balance be- tween short-term impact and long-term basic science and technology. The ultimate goal is balancing on-chip integration and integration at the IPEM level with op- timum cost, reliability, performance, broad applicabil- ity and flexibility issues. During the first five years, research in this area was focused on the improvement of silicon devices. Efforts included developing fast recovery diode, integrating fast recovery diode with IGBT and MOSFET, integrat- ing pilot current sensors into IGBT, and developing lateral power ICs for low-voltage applications. During the second five years, research was more focused on wide-band gap devices using silicon carbide and gal- lium nitride. Breaking through performance limits We are exploring and demonstrating device struc- tures in discrete, smart discrete and integrable high- voltage power switching semiconductor devices as well as monolithic power ICs. Silicon has long been the dominant semiconductor, but some silicon power devices are approaching the theoretical performance limits imposed by material properties. Wide bandgap semiconductors, particularly sili- con carbide (SiC) and gallium nitride (GaN), have attracted much attention due to their remarkable ma- terial properties, such as wide bandgap (3.0-3.4 eV), high critical electrical field (2-3 MV/cm), reasonably high electron mobility (800-1000 cm2/V·s) and good thermal conductivity (1.5-4.5 W/cm·K), when com- pared to silicon. GaN has the additional advantages of heteroepitaxial growth of high-quality thin layers on large-diameter silicon substrates and device processing temperatures are compatible with those of commercial silicon foundries. These wide bandgap semiconductor devices are projected to have 100-10,000 times better performance than equivalent silicon counterparts. Be- sides, replacing bipolar silicon devices (such as pin rec- tifier and IGBT) with respective unipolar SiC or GaN devices (such as Schottky rectifier and MOSFET or HEMT) not only reduces on-state conduction power loss but also improves switching power loss. Conse- quently, our power device research spans silicon, SiC, and GaN devices, as well as diamond rectifiers, GaAs HEMTs, and power ICs. Technical directions Our power device and IC research include: inven- tion of novel device concepts and structures; design, layout and simulations to determine critical device di- mensions and geometry and performance projection; development of integrated process flow, as well as key and possibly new unit process steps (such as SiC epi- taxial process and GaN MOS process), for device or CPES 10 YEAR PROGRESS REPORT 2010 3.33 IC fabrication; static and dynamic electrical character- ization of prototype to determine corroborations with simulation projections; and, development of SPICE- level simulation models for our novel devices as well as on packaged commercial devices to facilitate power electronic circuit simulations. Dream device of the future Over the last 10 years, we have demonstrated nu- merous silicon, SiC and GaN power devices and sev- eral Si power ICs. Also, we have transitioned several device designs and key unit processes to our industrial partners. In the future, we will continue our research into new emerging power devices and ICs, as well as into other semiconductors. A particularly promising effort has been called the “dream device of the future.” We have identified a de- vice that can both carry and block positive and nega- tive voltage at the same time. We are currently develop- ing it and using a next-generation GaN device for the bidirectional current, four-quadrant switch – the first of its kind in the world. A researcher at Rensselaer Polytechnic Institute using a stepper in his research with advanced power devices. WHY WIDE BANDGAP? Some silicon power devices are approaching the theoretical performance limits imposed by material properties. Wide bandgap semiconductors, particularly SiC and GaN, offer advantages in critical electrical field, electron mobility and thermal conductivity. 3: CENTER PROGRAM OVERVIEW Control & Sensor Integration 3.34 The Control and Sensor Integration thrust was created as a direct result of the benchmarking study conducted in the first year and a half af-ter the startup of CPES. The key issues identi- fied in motor drives part of the study were that 1) reli- ability was dominated by thermal mechanical failures and that 2) current sensing was the most costly single component, and it also did not lend itself to high level integration in motor drives and power electronic con- verters. The resulting goal of this thrust was to create the fundamental knowledge needed to “intelligently” inte- grate current and temperature sensors and active con- trols into power electronics with technology approach- es that have the potential to significantly improve both functionality and reliability while significantly reduc- ing costs. For this vision to be achieved, we indentified the critical issues: integrated current sensing internal to the IPEM structure, integrated spatial and temporal interconnect and junction temperature sensing with fast dynamics suitable for active thermal-mechanical stress control, and relative thermal control of parallel IPEMs for robust power sharing. Consistent with our goal, there are four core sub- thrusts in the control and sensor integration thrust. Two subthrusts relate directly to current sensing inte- gration fundamentals and two relate directly to active thermal-mechanical control: • Integrated, GMR-based current, interconnect temperature, and junction temperature sens- ing supporting a validated thermal-mechan- ical observer • Integrated pilot cell current sensing and cur- GMR FIELD DETECTION: Using the GMR field detector allows for a simplified compact integrated current sensor design. CPES 10 YEAR PROGRESS REPORT 2010 3.35 rent reconstruction suitable for current regu- lated converters • Active Tj and ∆Tj controls based on validated thermal-mechanical strain to maximize reli- ability and device utilization • Relative junction temperature control for thermal-based load sharing of parallel con- verters based on fully integrated sensing and integrated bus level signal utilization During the 10 years of CPES, researchers in all four core subthrusts have developed the knowledge base for the technology implementation to become feasible. Even more important, the synergy between the core areas has become very evident in that the GMR point field integration technology, a multifunc- tional capability has been developed such that all of the key sensing needs can be addressed with these de- vices, thus significantly lowering cost while simultane- ously improving reliability. The control and sensor integration team is highly interdisciplinary, with strong engagement of both electrical engineers and mechanical engineers. In addi- tion to this multi-physics team, advanced controls and estimation team members from both disciplines play a significant role in achieving robustness. The control and sensor integration research has been integrated into the integrated motor drives sys- tems work as we move to a post-ERC structure. This fundamental research is critical to continuing devel- opments in motor drives and other IPEM and power electronics applications. Axis of Sensitivity Output Trace on DBC Sensed Current GMR FIELD DETECTION 3: CENTER PROGRAM OVERVIEW Education & Outreach 3.36 Power electronics is an enabling technology that can significantly improve the efficiency of elec-trical power use. For the discipline to achieve its potential impact, more engineers must be familiar and skilled in its technologies. In addition to developing technology and knowledge, CPES seeks to address the shortage of power electronics engineers and to improve the cultural diversity of the discipline. Since the beginning, CPES partner universities focused on providing education and outreach pro- grams that provide multi-disciplinary, team-driven, and systems-oriented educational opportunities to pre-college, university students, and practicing profes- sionals. We provide a power electronics curriculum at each partner campus, plus an outreach program that connects to industry, the large power electronics com- 1998 1999 2000 2001 2002 YEAR 4YEAR 3YEAR 2YEAR 1 EDUCATION & OUTREACH PROGRAM DEVELOPMENT Established pre-col- lege summer camps at VT, RPI and NC A&T Industry short courses and workshops at VT and UW Student-led annual conference established NSF YEAR 1: “CPES is poised to make a significant impact in power electronics education, especially on those campuses with less support and awaremess of the power electronics discipline.” Cooperative agreements for distance learning and exchange New courses at VT, RPI, UPRM and NC A&T REUs established at VT and UPRM URP program at RPI SURE program at UW Power electronics options at VT, RPI New courses at VT, RPI, UPRM and NC A&T New courses at RPI and NC A&T PER initiatives (pre-college outreach) funded NSF YEAR 3: “Educational program has acceler- ated and is now having significant impact across all the CPES institutions, impressive movement of students across the campuses.” CPES 10 YEAR PROGRESS REPORT 2010 3.37 munity, and to pre-college students, with particular attention to women and underrepresented minorities. Education committee To achieve these goals, CPES established an Edu- cation Committee consisting of a director and one fac- ulty representative from each partner campus, as well as research thrust leaders from integrated power con- version systems and integrated motor drive systems. The committee reviews programs, develops strategies for the implementation, and evaluates progress. Cross-listed curriculum CPES has developed 14 new courses among the partner institutions, bringing the total power electron- ics-related offerings to 86; almost a third — 27 — are in distance format and available to students in partner institutions and as well as some practicing engineers. A number of these new courses are a direct reflection of the Center’s research results, particularly in the area of power electronics packaging, which is vital to our IPEM vision. As electronic systems grow more com- pact and complex, the interconnection of the compo- nents gets more difficult, requiring expertise across many disciplines. When CPES was formed in 1998, packaging was neither a mainstream research topic for power electronics nor a component of the curriculum. Degree and certificate programs Undergraduate options or certificate programs in power electronics are available at Virginia Tech, the University of Wisconsin, the University of Puerto Ri- co-Mayagüez and Rensselaer. A new M.S. program has been started at North Carolina A&T and a new Ph.D. 2003 2004 2005 2006 2007 2008 YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6YEAR 5 VT course module: Controls Power electronics option at UPRM Short-term ex- change program New short course at VT New course at UPRM Second three-year REU program established at VT and UPRM LSAMP REU program at VT More than 100 students have participated in short-term exchange to date. More than 700 students have participated in pre-college programs to date. Revised VRM Short Course Disseminated/ published results at three conferences: ASEE - Hawaii ICEE - Portugal ICEER - Australia Ph.D. program under development at UPRM Power electronics concentration at UW New Course: ECE 379 at UW VT junior-level course modules: ballast/PFC Established diversity strategic plan Fellowship program: domestic Ph.D. students Pre-college programs at UW and UPRM M.S. PELs program at NC A&T NSF YEAR 7: “Strong leadership and commitment to educational programs, cross-campus students visits, pre-college activities, and life long learning.” 3: CENTER PROGRAM OVERVIEW 3.38 “The education program offered through CPES is truly exceptional and can be a model for other centers” —2004 NSF Site Visit Report program is in place at UPRM. Also, at UPRM, par- ticipation in CPES has enabled the Power Engineering Group to drive a major undergraduate curricular revi- sion, moving power electronics to a formal track; more than 150 students now take the introductory power electronics course each year. Since becoming a CPES partner, the power engineering program at UPR has become one of the largest undergraduate programs in power engineering in the U.S. Student exchanges CPES also has a strong commitment to further- ing student education through partner exchanges and has sponsored travel scholarships for travel to part- ner institutions to perform collaborative research and participate in educational programs. More than 100 short-term student exchanges have occurred to date, with the participants primarily from North Carolina A&T and the University of Puerto Rico–Mayagüez. Research experience for undergraduates Focus in undergraduate programs has sought to raise the visibility of power electronics among students who are in the process of selecting a major field of study and to increase the numbers of domestic, female and underrepresented minority students entering the field. This was not a major emphasis before CPES. Now, the NSF has cited CPES as the model for all Engineering Research Centers for educational outreach. Since 2002, the Center’s Research Experiences for Undergraduates (REU) program has funded research experiences for students in several partner institutions. In 2005, students from outside the CPES partnership were included, with support from the Louis Stokes Al- liance for Minority Participation; more than 80 per- cent of these students have been underrepresented minorities. Student leadership council The CPES Student Leadership Council plays a critical role in planning and executing the Center’s education and outreach efforts. CPES students also participate in national SLC meetings and led the NSF ERC student retreat in 2004. Annual CPES Conference The student council also organizes the CPES An- nual Conference, which is designed to provide a fo- rum for the Center to share its research progress with industry members and the larger power electronics community. CPES students are responsible for the technical program, poster session, general logistics and the development of the conference brochure, proceed- ings, and proceedings CD. Pre-college outreach Generating interest in engineering among young students is critical to growing the field. CPES has power electronics programs for pre-college students at all partner campuses, serving more than 700 high school, middle school, and elementary school students to date. These include summer camps for children of both genders, as well as sessions planned especially for girls. They also include one-day events, such as the Lego League in Southwest Virginia and Duke Power Day in North Carolina. Some events also target public school teachers. Professional outreach The most effective form of knowledge/technology CPES 10 YEAR PROGRESS REPORT 2010 3.39 transfer to industry is the employment of CPES students. CPES has produced 410 graduates who are trained with a systems vision and are accustomed to working in a multi- disciplinary team environment. To date, 230 are working in industry and contributing well, according to a CPES survey of CPES alumni and their managers. Short courses/tutorials In an ongoing effort to provide continuing educa- tion opportunities to professional engineers in industry, CPES has offered 10 short courses multiple times over the decade. In addition, CPES has offered tutorials on major issues the day before the annual conferences. Research thrust leaders play a prominent role in this outreach, such as in 2006, when T.M. Jahns described the future of power electronics and electric machines in a series of invited lec- tures to engineering groups throughout Australia. Professional conferences CPES researchers actively promote the field throgh organizing research conferences and workshops. Recent examples include establishing the first international sym- posium on Power Electronics Technology for Distributed Generation Systems and organizing the International Power Electronics and Motion Control Conference and the Future of Electronic Power Processing and Conver- sion Workshop. CPES researchers also helped organize and promote the only international conference focusing on integrated systems, the Conference on Integrated Pow- er Electronics (CIPS). Left: E-Wheels at UW exposes freshmen and sophomore university students to power electronics. Below, from left: First Lego League participants interacted with CPES students. RPI Power Electronics Day Camp includes fundamentals of power electronics and hands- on demonstrations. UW’s Careers Camp is held to stimulate interest in engineering and the sciences . 3: CENTER PROGRAM OVERVIEW Industrial Collaboration 3.40 CPES is guided by a mission to improve industrial competitiveness of power elec-tronics via an integrated system approach. With its industrial collaboration program, CPES is noted for timely knowledge dissemination and technology transfer, and a broad participation from industry members. The industry partner program keeps the Center on track with relevant research and technologies viable for commercialization. CPES industrial collaboration and technology transfer efforts were cited by NSF as a model for all Engineering Research Centers. The CPES program includes the following components: indus- try membership, research collaboration, technology transfer, connectivity partnership, and graduates in the field. Industrial membership Before CPES, there were two pre-existing indus- trial consortia – VPEC at Virginia Tech and WEMPEC at the University of Wisconsin-Madison, each with about 50 industry members. These members were folded into the CPES industrial consortium. The back- bone of CPES’ connection to industry, the industrial consortium offers a four-tiered membership structure, with top-tier (Principal Plus) members paying $50,000 for the greatest opportunities to influence the Center’s program and review CPES intellectual properties for possible product development. Principal Members also enjoy opportunities to guide CPES programs and eval- uate intellectual properties, while Associate Members have less influence but access to the Center’s research results, researchers, facilities, and education opportu- nities. The Affiliate Member category was designed to CPES INDUSTRY MEMBERS WORLDWIDE North America – 70 Asia – 18 Europe – 11 CPES 10 YEAR PROGRESS REPORT 2010 3.41 accommodate software and equipment donors as well as small start-ups and all WEMPEC members. The membership in CPES partnership program has remained robust despite global economic changes, mergers, and acquisitions. Consortium support CPES has received strong industrial consortium support through the years, from $400,000 in 1998 to more than $1.6 million in 2008. CPES faculty mem- bers have increased recruiting efforts recently to bring additional top-tier Principal Plus members on board. This increase clearly demonstrates that more com- panies are realizing the higher returns from their in- vestment as they expand collaborative activities with CPES. Industry advisory board The CPES Industry Advisory Board, which usu- ally includes the top two tiers of the industrial con- sortia, grew more proactive after 1998, implementing a series of weekly and monthly board teleconferences and quarterly full-membership telecons to filter issues and keep members engaged in CPES. As the Center grew and more issues arose, the board formed eight working groups between 1999 and 2001 on policies, research benchmarking, industry-student communi- cations, manufacturability, SWOT analysis, research champion mentoring, reliability, and research review. Power management mini-consortium Power management mini-consortium research in voltage regulator modules was initiated in 1997 with the interest of a cluster of industry sponsors. After the formation of CPES, the group continued to work syn- ergistically to develop pre-competitive technologies, pool resources, and share research results in consor- tium format. In 2002, the mini-consortium was folded into the CPES industrial consortium. The multiphase voltage regulator module pro- posed by CPES in 1997 has been adopted as the stan- dard industry solution to power every Intel micro- processor, creating a billion-dollar market, the fastest growing sector of power electronics. In 2006, CPES expanded the power management research scope beyond solutions for microproces- sors and other point-of-load applications to mobile and wireless equipment, such as PDAs, GPS, and cell phones. The power management scope encompasses the study of power architecture for laptop, desktop, server, and networking products, distributed modu- lar power supply systems, topologies, analog/digital 100 90 80 70 60 50 40 30 20 10 0 CPES MEMBERSHIP GROWTH Principal Members Plus Annual contribution $50K Principal Member Annual contribution $25K Annual contribution $10K Annual contribution <$10K/In-kind Affiliate Member WEMPEC members, small start-ups, in-kind donors Associate Member 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 N U M BER O F CO M PA N IES 3: CENTER PROGRAM OVERVIEW 3.42 control, advanced packaging and system integration techniques. Since 2006, PMC membership has grown significantly, with 20 companies participating. Intellectual property protection The Intellectual Property Protection Fund was implemented in 2002. Members teleconference quar- terly to discuss invention disclosures with CPES inven- tors, and jointly decide which to protect with patenting costs covered by the fund. Members have a royalty-free, non-exclusive license to use the technology. Industrial board workshops As graduation from ERC status neared, the CPES Industry Advisory Board organized strategy work- shops, the Chief Technology Officer Summit in 2006 and “From Success to Significance” in 2005. Interna- tional Rectifier contributed $100,000 and support for long-term technology roadmap development. With silicon carbide power devices on the brink of large- scale commercialization with a high potential to make a significant impact on future power electronics sys- tems, CPES-RPI organized the first SiC Symposium in 2003, followed by the second one in 2005, bringing together industry experts, suppliers and users to facili- tate the rapid development of SiC power devices. Industry sponsored research In addition to NSF core research, CPES research- ers conduct a substantial number of research projects funded by industry fellowships and industry and gov- ernment funded contracts that fit with the Center’s strategic plan. For the past 10 years, CPES has received $18 ABB, Inc. – Corporate Research ALSTOM Transport Analog Devices Boeing Company Crane Aerospace Inc./ELDEC Corporation Delta Electronics, Inc. FSP Group, Inc. GE Global Research Hipro Electronics Co., Ltd. Infineon Technologies International Rectifier Intersil Corporation Linear Technology Lite-On Technology Corporation MKS Instruments Monolithic Power Systems Murata Power Solutions National Semiconductor Corporation NXP Semiconductors Primarion Renesas Technology Corporation Richtek Technology Corporation Rolls-Royce Texas Instruments DRS Power & Control Technologies Eaton Corporation, Innovation Center Eltek Energy Emerson Network Power Groupe SAFRAN HR Textron, Textron Systems Corporation Maxim Integrated Products Rockwell Automation - Allen-Bradley CPES INDUSTRY MEMBERS (AUGUST 1, 2007 TO JULY 31, 2008) PRINCIPAL PLUS MEMBER PRINCIPAL MEMBER ASSOCIATE MEMBER AFFILIATE MEMBER SEW-Eurodrive GmbH & Co. KG Vacon, Inc. BAE Systems, Inc. Crown International Densei-Lambda KK Hitachi Computer Peripherals Co., Ltd. Intel Corporation Johnson Controls, Inc. L-3 Communications, Power Paragon, Inc. Microsoft Corporation NetPower Technologies, Inc. Nippon Chemi-Con Corporation Northrop Grumman Corporation OSRAM Sylvania, Inc. Panasonic Electric Works Lab of America, Inc. Schneider Toshiba Inverter Europe Semikron International GmbH Shindengen Electric Mfg. Co., Ltd. Toyota Motor Corporation ABB Drives and Power Products Group* American Super Conductor* Ansoft Corporation* AO Smith Corporation* Astronics Corporation* Baldor/ Dodge/Reliance – Rockwell Automation* Caterpillar, Inc.* Continental Automotive Systems* Cree* Curtis Instruments* Danfoss Drives* DTL Corporation * Emerson Electric Company* Ford Motor Company* Fuji Electric Advanced Tech. Co Ltd.* General Dynamics Land Systems* GM Advanced Technology Center* Hitachi America, Ltd. * Honeywell International Corporation* Ingersoll Rand Company* JRI Solutions* KEMET Kohler Company* LEM USA* Magnetek, Inc.* Miller Electric Manufacturing Co.* Milwaukee Electric Tool Company* Mori Seiki Company, Ltd. * MPC Products Corporation* National Instruments Nissan Motor Company, Ltd.* Oak Ridge National Laboratory* Oshkosh Truck Corporation* Pacific Scientific EKD* Phoenix International * Plexim GmbH Regal Beloit* Rockwell Automation – Kinetix* S&C Electric Company* Sauer Danfoss* Schneider Electric – Square D* Simplis Technologies TECO Westinghouse* Toshiba International Corporation* Trane Company * VPT, Inc. Whirlpool Corporation* Woodward Electric Power Systems* Yaskawa Electric America, Inc.* *WEMPEC members CPES 10 YEAR PROGRESS REPORT 2010 3.43 million overall in sponsored research funding. Since implementation of Principal Plus CPES partner mem- bership in 2002, additional research funding through industrial fellowships and the power management mini-consortium has exceeded $10 million. The nature of the sponsored research projects of- ten involves collaboration among multiple campuses, such as the work on silicon carbide power devices sponsored by the Army Collaborative Technology Al- liance, and electronic building block (PEBB) program sponsored by the Office of Naval Research. Overall, research efforts reflect the Center’s expertise in the areas of power supplies for pulse power applications, advanced power systems for aircraft and naval ships, power system controllers for utility power, motor drives, and SiC device development and applications. Academic collaborations CPES has also strengthened its technical alliance with researchers outside CPES, offering an active fac- ulty outreach program and incorporating the expertise of three research faculty members from other univer- sities in the areas of integrating microprocessors with its power management solution and module reliability and failure analysis. Through the years, CPES has col- laborated with many other power electronics faculty and students at 135 institutions globally via technical exchange visits, research projects, joint workshops, and joint publications. “The Industrial Collaboration Program of CPES can be held up as a model for other Engineering Research Centers.” —2001 NSF Site Visit Report 1999 $5 M $4 M $3 M $2 M $1 M $0 2000 2001 2002 2003 2004 2005 2006 2007 2008 Sponsored Research PM+ Fellowship $$ AFOSR Artesyn Compact Pwr Delta Face Ford GM - PNGV Harris Heart Interface Intel IR Kohler MEW NSC ONR Panasonic Power Quality SGS SPCO TCRD TI AFOSR Artesyn Bodine Compact Pwr Dawon Delft Delphi Delta Face GE GM - PNGV Hipro Hitachi Intel MEW NIST NSC ONR Power One Power Quality Raytheon Schneider SPCO SRC TDK TI Turbo Corp TVA AFOSR Airak Artesyn CIT DARPA-Penn DARPA-U of Mich. Delta Ecostar Eltek Energy Face GM - PNGV Hipro Hitachi Intel Intersil Leeson Electric Lockheed Martin MEW NSC ONR Pemco Potant Power One Raytheon Rutgers Sandia Schneider SRC TDK TECO TI TVA VPT AFOSR Agilent Airak Artesyn Avista BBG Crown DARPA-Penn DARPA-U. of Mich. Delta Ecostar Eltek Energy Face Hipro Hitachi Intersil Leeson Electric Lockheed Martin MEW NSC ONR Potant Power One Raytheon Rockwell Collins Rutgers Sandia Schneider SRC TDK Thales TI TVA VPT ACI AFOSR ARL Artesyn Crown International DARPA Delta Face Hipro IBM Infineon Intersil Intronics MEW NCSU NSC ONR Penn State Philips Power One Raytheon Renesas Sandia Schneider Toshiba SRC Thales TI TVA AREVA ARL Artesyn Boeing Delta HIPAC Hipro Infineon Intel Intersil IR Linear MEW NASA Glenn NCSU NSC ONR Power One Renesas Sandia Thales TI TVA VPT 3Y ARL Artesyn Boeing Delta Florida State Univ. Hipro Honeywell/CTA Infineon Intel Intersil IR Linear MEW NASA Glenn NSC ONR Raytheon Renesas Thales TI 3Y Aker Kvaerner ARL Boeing Delta Florida State Univ. Freescale Furukawa GE Hipro Honeywell/CTA Infineon Intel Intersil IR Linear MEW MKS Murata NSC ONR Raytheon Renesas Rolls-Royce Safran Thales UTRC 3Y ABB Analog Devices ARL Boeing Crane Delta FSP Furukawa GE Hipro Honeywell/CTA Infineon Intersil IR Linear MEW MKS Murata NSC NXP ONR Primarion Raytheon Renesas Rolls-Royce Safran TI Toyota VPT-DOE-SBIR 3Y ABB Analog Devices ARL Boeing Crane Delta FSP Furukawa GE Hipro Honeywell/CTA Infineon Intersil IR Linear Lite-On MEW MKS Murata NSC NXP ONR Primarion Raytheon Renesas Richtek Rolls-Royce Safran TI Toyota VPT-DOE-SBIR *Due to the varying research project funding levels, the num- ber of sponsors and overall funding do not correspond directly. CPES RESEARCH SPONSORS* (including PMC and Fellowships) 3: CENTER PROGRAM OVERVIEW 3.44 1998 1999 2000 2001 2002 YEAR 4YEAR 3YEAR 2YEAR 1 IPPF FOR EASY IP ACCESS CPES ANNUAL CONFERENCE NSF SITE VISIT INDUSTRY-STUDENT FORUM IAB policies and procedures working group Benchmarking working group SWOT analysis working group Second Reliability Workshop March 2002 IAB inaugural meeting: September 1998 Communications working group Research review working group G. Bruning Two pre-existing industrial consortia at VT & UW evolved into CPES members CPES Industry Membership Program: Major Events WEMPEC VPEC CPES MEMBERS Reliability working group: M. Shaw First Reliability Workshop October 1999 Champions working group: D. Adams J. Steel CPES IAB LEADERSHIP K. Phillips J. Steel P. Thollot VRM MINI-CONSORTIUM FOLDED INTO PRINCIPAL MEMBER PLUS • Delta • Hipro • Hitachi • IBM • Intel • Intersil • National Semiconductor • Power-One • ST Microelectronics • Texas Instruments • TDK R. Cuzner K. Phillips P. Thollot CPES 10 YEAR PROGRESS REPORT 2010 3.45 2003 2004 2005 2006 2007 2008 YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6YEAR 5 Manufacturability and produceability working group A. Kamp CPES SiC Symposium May 2003, June 2005 CTO Summit April 2006 IAB workshop: From Success to Significance April 2005 CPES short course offerings IR supports CPES technology roadmap development initiative Outreach Workshop October 2006 • AcBel Polytech, Inc. • Analog Devices • Crane Aerospace & Electronics • Delta Electronics • Emerson Network Power • FSP Group, Inc. • Hipro Electronics Co., Ltd. • Infineon Technologies • International Rectifier • Intersil Corporation • Linear Technology • Lite-On Technology Corp. • Monolithic Power Systems • Murata Power Solutions • National Semiconductor Corp. • NXP Semiconductors • Primarion • Renesas Technology Corp. • Richtek Technology Corp. • Texas Instruments PMC (FORMERLY VRM) TODAY NEW IAB LEADERSHIP T. Burns R. Zhang 3: CENTER PROGRAM OVERVIEW Leadership and Management 3.46 CPES — a five-university ERC — is orga-nized to effectively use assets and resources from diverse sources, including NSF, uni-versity cost sharing, industry consortium contributions, and research sponsors. The Center is structured to maximize communication and technol- ogy integration. Virginia Tech, the lead university, is responsible for the overall management and financial administration of the Center. Fiscal resources are dispersed to partner institu- tions based on annual analysis of the strategic plan, performance of the institution, and its expertise ca- pabilities, expectations, and infrastructure support needs. NSF has provided more than $30 million over the past 10 years while an additional $51 million was received in research cost-share funds. Through the years, CPES has received strong industrial consortium support, from $400,000 in 1998 to more than $1.6 mil- lion in 2008. Center faculty have devoted much effort to establishing a basis of funding opportunities after the conclusion of NSF ERC award funding. Leadership and management CPES is administered as a sub-organization in the College of Engineering at the lead university, Virginia Tech. CPES director Fred Lee reports to the dean, and together they identify initiatives to enhance the posi- tion and contributions of the Center within the uni- versity, industry, and world. They receive counsel from the CPES Governing Board and the CPES Stakehold- ers Council. The Governing Board is composed of the engineering deans of all five partner universities, three representatives from the Industry Advisory Board, three representatives from the Scientific Advisory Board, the president of the Student Leadership Coun- cil, and the Center director. The Stakeholders Council involves the Department Heads for the Departments of Electrical and Computer Engineering, Mechanical Engineering, and Materials Science, as well as repre- sentatives from the College of Engineering and the Office of Sponsored Programs, in order to enhance in- terdepartmental and inter-university communications and collaboration. Diversity The CPES Strategic Plans for Diversity were ini- tially developed with the input of the Governing Board, and Education Committee during the summer and fall of 2003. The Education Committee still plays an active role in updating and implementing both diversity pro- grams by assisting in identifying pools of candidates for positions, strategies of recruitment, creating new programs targeted for participation by underrepre- sented groups, developing retention strategies, estab- lishing benchmarks for progress within the Center and within CPES partner campuses, and monitoring the progress of each campus in achieving diversity goals. Campus directors and administrators are involved in these efforts when appropriate. Two strategic diversity plans were developed: a plan for diversity of faculty and graduate students within the Center, and a plan for diversity in under- graduate and pre-college recruitment and program participation within the CPES Education Program. Both plans are implemented, revised, and examined as a single initiative by the CPES Leadership and Man- agement Team. CPES 10 YEAR PROGRESS REPORT 2010 3.47 LEADERSHIP & MANAGEMENT Center Director F.C. Lee, VT Center Co-Director D. Boroyevich, VT D. Blackburn, ret. NIST R. Cavin, SRC J. Kassakian, MIT R. Steigerwald, ret. GE A. Tucker, ret. ONR J. Uceda, UPM, Spain CPES Scientific Advisory Board T. Lipo, UW T.P. Chow, RPI Campus DirectorsIndustry Advisory Board Co-Chair K. Phillips Chair J. Steel Secretary P. Thollot Technical Director F. Wang, VT Director, Admin & Education/ Outreach E. Tranter, VT Financial Director L. Long, VT Industry Liaison T. Shaw, VT Student Leadership Council C. Baisden, VT R. Benson, VT P. Peercy, UW A. Cramb, RPI J. Monroe, NC A&T M. Velez, UPRM A. Homaifar, NC A&T R. Vasquez, UPRM CPES Governing Board: Dean’s Council 4.0 OUTCOMES & IMPACTS CHAPTER 4 With 10 years of NSF foundational support, we succeeded in devel-oping the IPEM and a complete IPEM-based power electronics system. Numerous power electronics firms have profited from our IPEM vision and integrated approach. The opportunity and chal- lenge presented to industry by CPES have spurred innovation and resulted in a dramatic change in the state of the market in fewer than 10 years. CPES researchers have adapted the basic IPEM concept to applications at all power levels and a range of applications. We have also succeeded in educating stu- dents and professionals at all levels in integrated power electronics. As industry adoption of the IPEM technology continues, we will achieve the efficiency and energy savings of this technology. We are proud to have played such a role in devel- opments that will help all of society. CPES 10 YEAR PROGRESS REPORT 2010 4.1 CHAPTER 4 Major Milestones Intellectual Merit Expanding the IPEM Concept Transforming the Power Electronics Discipline Re-Energizing an Industry CPES Entrepreneurs CPES Business Leaders Academic Excellence Visiting Faculty Global Connections Academic Outreach Impact on CPES Universities 4.2 4.4 4.6 4.8 4.10 4.12 4.16 4.20 4.21 4.24 4.26 4.28 CONTENTS 4: OUTCOMES & IMPACTS First passive IPEM (1 kW) developed and combined with the active IPEM to create a 1 kW asymmetrical half bridge for dc–dc conversion 1998 1999 2000 2001 2002 YEAR 4YEAR 3YEAR 2YEAR 1 OUTCOMES & IMPACTS Major Milestones 4.2 93 percent reduction in volume for low-profile high-density power modules achieved using a flip–chip on flex package based on D2BGA technology New CPES multi-phase VRM developed DCR current sensing method by RC network Agreement on integrated power electronics curriculum signed by all 5 universities Curriculum integration implemented First version of an active IPEM (1 kW) The Power Management Mini-Consortium was created for industry sponsors to share research results and pool resources Augmented Phase-Leg Configuration invented and tested Flip-on-flex IPEM packaged Universal Controller for PEBB (IPEM) based power conversion systems was developed and adopted by US Navy Embedded Power Proposed 2-stage approach with bus inverter followed by a point-of-load converter that transforms the telecommunication industry Double-side cooling using embedded power packaging tech was first demonstrated Nonlinear coupled–inductor concept Proposed multi-phase VRM is adopted by the IT industry and powers every microprocessor Established pre-college summer camps at VT, RPI and NCAT PER Initiatives (precollege outreach) funded Power electronics options at VT, RPI Formation of working groups: • IAB Policies and Procedures • IAB Reliability • IAB Communications • IAB Research Champions • IAB SWOT Analysis • IAB Benchmark Formation of working groups: • IAB research Review • IAB manufacture-ability and produce-ability PMC mini-consortium wrapped into PMP Formation of Principal Member Plus (PMP) membership Formation of IPPF (Intellectual Property Protection Fund) CPES 10 YEAR PROGRESS REPORT 2010 2003 2004 2005 2006 2007 2008 YEAR 10YEAR 9YEAR 8YEAR 7YEAR 6YEAR 5 OUTCOMES & IMPACTS Major Milestones 4.3 First fully integrated front- end converter (1 kW) using IPEM technology Premium Member Plus industrial partnership category created Basic concept of the IMMD developed Nanosilver paste technology developed Fully integrated EMI RF Filter developed First completely IPEM based power processing system for commercializa- tion for HID lamp First Integrated EMI filter developed First demonstration of an enhancement-mode inversion type GaN MOSFET with the world best channel field-effect mobility of 167 cm2/V-s and also the first high voltage (up to 800 V) monolithically integrated GaN MOSFET/Schottky rectifier pier with reverse blocking capabilities Operation up to 250° C has been demonstrated using existing die-attach, substrate insulation, passivation and encapsulant materials Pilot current sensors have been successfully integrated into both the IGBTs as well as the accompanying ante-parallel diode in a monolithic device Device that can both carry and block positive and negative voltage at the same time Fully integrated point of load converter developed Significant advancement of GMR (Giant Magneto- Resistive)for integrated current sensing by developing optimization method which shows the promise of yielding MHz bandwidth of high linearity for the most practical interconnect busing structure Power electronics option at UPRM Short-term exchange program Power electronics con- centration at UW MS program at NCAT More than 100 students have participated in short-term exchanges and more than 700 stu- dents have participated in pre-college programs to date CTO Summit IR support of technology road map development initiative Success to Significance Workshop 4: OUTCOMES & IMPACTS 4.4 ELECTROMAGNETIC INTERFERENCE With ever increasing power density and switching frequency of power electronics equipment, electromagnetic interference (EMI) becomes an important concern. A good EMI filter is essential for ev- ery power converter circuit. However, high-frequency performance of EMI filters is affected by the parasitics associated with non-ideal components, referred to as “self parasitics,” and parasitics due to the undesirable electromagnetic field coupling between components, referred to as “mutual parasitics.” CPES researchers first identified the key mutual parasitics detrimental to EMI noises, and proposed cancellation techniques for these unwanted field couplings. CPES researchers then developed innovative techniques that mitigate the unwanted effects associated with the self parasitics. These solu- tions have led to more than 30 times improvement of the differential mode and the common mode noises. This latter work was recog- nized as the Best Transaction paper in 2006 by the IEEE Transactions on Power Electronics. The work has now been extended to address system-level EMI issues. INTEGRATED BUS FILTERS FOR EMI CONTAINMENT CPES demonstrated a major breakthrough in electromagnetic noise containment by pioneering the concept of integrated bus filters, based on transmission line principles. Combined with a filter IPEM, the development enables the construction of a filter IPEM with a cut- off band from around 100 kHz to 100 MHz. ELECTRIC WATER PUMP DRIVE CPES developed an automotive electric water pump drive that incor- porates a permanent magnet motor, IPEM-based controller, and the pump impeller into an integrated package that uses the pumped coolant to cool both the motor and the power electronics. IMPROVING HEAT REMOVAL CPES demonstrated a process for integrating micro-channels with semiconductor die to improve heat removal at the die level. INTEGRATED THERMAL MANAGEMENT CPES demonstrated the feasibility of integrated thermal manage- ment by embedding fluidic channels in the IPEM structure. DOUBLE-SIDED COOLING CPES developed, analyzed, and demonstrated the concept of using miniature heat pipes to achieve efficient double-sided cooling of IPEMs. LATERAL STRUCTURE FOR BLOCKING VOLTAGE OF 50-80 V CPES developed a novel silicon lateral trench RESURF MOSFET struc- ture that has been projected to have a specific on-resistance close to the ideal value for blocking voltage in the 50-80 V range. GaN DEVICE FOR BIDIRECTIONAL SWITCH Most, if not all, modern power devices and ICs are unidirectional and can only block voltage in one polarity. CPES developed gallium ni- tride (GaN) device technology that led us to identify a high-voltage MOS gate-controlled, bidirectional switch as the basic device build- ing block for power ICs. Performance of the GaN power switching device is expected to be 100 times higher than that of a silicon de- vice. It should improve system efficiency and increase power density, while simplifying power electronics circuit design. Successful com- mercialization of these GaN power ICs will allow power electron- ics deployment in applications that were not possible with silicon power devices and ICs. OUTCOMES & IMPACTS Intellectual Merit As shown by the worldwide enthusiasm for the integrated, modularized power electron-ics system, the very concept of the IPEM is the key intellectual achievement of the Center for Power Electronics Systems. The IPEM concept changed how researchers and electronics designers think about and develop electrical processing systems. This new perspective triggered significant advances in several disciplines that apply to power electron- ics and other fields of endeavor. SOME KEY BREAKTHROUGHS CPES 10 YEAR PROGRESS REPORT 2010 International Rectifier iP2001 (Vo = 1.6 V, Io = 60 A, fs = 1 MHz) Four Phase Two Phase 1.6 V 35 A 4.5 REPLACING CONVENTIONAL WIREBOND CPES developed several key technologies replacing the conven- tional wirebond with direct bonding, such as flip-chip-on-flex and embedded power technology. These integration approaches feature much reduced interconnect parasitics, improved thermal manage- ment due to double-sided cooling, and improved opportunities for functional integration. INVERTER IMMUNE TO SHOOT-THROUGH FAILURE In motor drives, a new phase-leg building-block topology for dc- ac power inverter circuits was invented that is inherently immune to shoot-through failures -- the destructive electrical failure mode known to threaten conventional voltage-source inverters since they were first developed nearly 100 years ago. The new phase-leg to- pology also eliminates the need for dead-time control that is used widely in conventional inverters. This makes it easier to deliver high performance sinusoidal control of ac machine drives down to very low speeds. ACTIVE THERMAL CONTROL TECHNIQUES Active thermal control techniques have been developed that act to limit the size of temperature excursions in power modules dur- ing normal operation. This provides opportunities to significantly improve the reliability of power electronics because of the serious detrimental impact of thermal cycling on mechanical fatigue and failures inside power module packages. INTEGRATED MODULAR MOTOR DRIVES CPES pioneered new architecture for future ac machine drives, known as integrated modular motor drives (IMMDs). IMMDs take drive integration concepts to a new level by integrating the power electronics and controller directly into the motor housing. SINTERING NANOSCALE PARTICLES CPES materials research made great strides in understanding the sintering mechanism of nanoscale particles; an in-depth knowl- edge has been gained on competing physical processes between coagulation and coalescence aggregation of nanoparticles. This un- derstanding led to the development of a nanoscale silver paste as an alternative lead-free die-attach material for interconnecting semi- conductor devices and a multiferroic nanocomposite for integrating passive elements. SMALL, FLAT MOTOR FOR DISC DRIVES Research on modular permanent magnet motors led to a new con- cept for a small, flat motor that is an attractive candidate for com- puter disc drives. The motor has an axial-flux configuration that evolved from a radial-flux design distinguished by its use of sinu- soidally-shaped stator pole faces. The topology is compatible with high-volume manufacturing and has fewer parts than the disc drive motor commonly used today. IMPROVED EMI ANALYSIS Researchers from the University of Padova in Italy, collaborated with CPES to develop a continuous wavelet transform to study EMI phenomena. The conventional method of analyzing signals in the frequency domain by using discrete Fourier transform provides complete information. However, the new technique offers better quantification of the frequency content variation during significant transients and shows how the harmonic peaks evolve in time. The deeper understanding of the evolution of the spectra can make it easier to provide the optimized EMI reduction or filter design. IPEM technology can reduce the footprint of the multi-phase voltage regulator module on the motherboard 4: OUTCOMES & IMPACTS Once industry and government agencies understood the IPEM concept, technol-ogy using integrated power electron-ics modules was introduced across the entire power range, from laptops to electric power delivery. Industry leaders have introduced integrated modules for motion control and automation in manu- facturing, commercial, and home applications. IPEMs had an even broader impact on the computer and tele- communications industry because an integrated mod- ular approach was practically nonexistent previously. Power supply industry The power supply industry has aggressively pur- sued standardization, modularization and integration. For example, the CPES multiphase VRM proposed in 1997 has been adopted as an industry standard for powering microprocessors and other applications that require point-of-load power supplies. All the major semiconductor firms have commercialized this tech- nology. For example, Fairchild, Siliconix, Texas Instru- ments, National Semiconductor, Semtech, Intersil, ON Semiconductor, Linear Technology, Maxim, Primari- on, Silicon Labs, Analog Devices, Volterra, Microsemi, and STMicroelectronics have all produced integrated control ICs for the multiphase solution. Other firms, such as International Rectifier, Renesas, Philips, Power One, Linear Technology, ON Semiconductor, and In- tersil also introduced the integrated module in a form similar to the IPEM developed at CPES. CPES started monolithic integration in lateral power ICs. Today, companies such as Analog Devices, Enpirion, Intersil, Linear Technology, Maxim, National Semiconductor, Texas Instruments, and Voterra have followed suit. Motor drives Although the motor drives industry started ex- ploring intelligent power modules (IPMs) at the same time as IPEMs, their widespread use of IPMs took hold only recently. Toshiba, Mitsubishi, Siemens, ABB, Fuji, IR, Semikron, Powerex, IXYS, Hitachi, Infineon, Eu- pec, and Rockwell Automation have introduced IPEM products. More than 40 percent of appliances now use module-based inverter drives in Japan. Mitsubishi, Al- stom, and Toyota have already introduced commercial products that have done away with wire bond. Low power Buck and multi-phase buck converters have moved beyond powering microprocessors. The buck converter today is widely used for low-voltage applica- tions such as telecommunications, PDAs, cell phones, MP3 players, digital cameras, and GPS. These repre- sent a growing $4 billion industry. Medium and high-power applications The Office of Naval Research (ONR) and defense firms championed the IPEM concept for medium and high power applications. Called the Power Electronics Building Block (PEBB) approach, the technology is applied to electrical power systems for cars, ships, air- planes, and electric utilities. Thales, Northrop Grum- man, Rockwell Automation, General Dynamics, ABB, and Bettis have been major players in this effort. Higher power In 2004, CPES developed the ETO thyristor for module power greater than 1 MW, primarily for utility applications. This has involved industrial collabora- tors, including DOE, Alstom, ACI, PEMCO, and TVA. INTELLECTUAL MERIT Expanding the IPEM Concept 4.6 CPES 10 YEAR PROGRESS REPORT 2010 PROMOTING IPEMS IN EVERY POWER RANGE 4.7 10-100 W IPEMs IR/POWIR™ TI SWIFT™ Philips PIP20x CPES Monolithic VRM IR*, Philips*, On Semi*, Intersil*, Linear Tech*, TI*, Renesas*, NSC*, Power One*, Infineon*, ST*, Maxim, Micrel, Volterra, Primarion, Fairchild, Analog 1-10 kW IPEMs ABB*, Hitachi*, IXYS*, Toshiba*, Semikron*, Fuji*, Infineon*, Eupec, Powerex Semikron IPM CPES Flip-Chip-On-Flex Phase Leg CPES Active IPEM CPES Integrated EMI Filter CPES Transmission Line Filter CPES Passive IPEM 10 kW - 10 MW IPEMs ONR*, DOE*, NSWC*, Thales*, Northrop Grumman*, Rockwell Automation*, General Dynamics, ABB*, Bettis, Alstom*, ACI*, PEMCO*, TVA* 1.8 kV, 60 A, 3-level ZVZCT phase-leg CPES 800 V, 40 A ZVZCT phase-leg CPES 4.5 kV, 4 kA Emitter Turn-off Thyristor (ETO) *CPES industry consortium members or research sponsors 4: OUTCOMES & IMPACTS 4.8 Until CPES developed the concept of the IPEM, electrical energy processing was a major roadblock in society’s efforts to con-serve energy and reduce the environmental impact of human activity. More and more activities — including recreation — are being accomplished using machines, but those very machines are not efficient, wasting a large amount of the electricity generated in the United States. Controlling electrical processing with electronic systems — power electronics — carried promise of solving this efficiency problem, but power electron- ics systems were expensive, unreliable, and not well accepted. We believed that power electronics could achieve dramatic improvements in performance, reli- ability, and cost-effectiveness by developing an inte- grated system approach based on advanced packaging of new generations of semiconductor devices, plus in- novative circuits in the form of building blocks with integrated functionality, standardized interfaces, suit- able for mass production, and application versatility. Changing the conversation With base funding from the NSF, CPES led the de- velopment of multidisciplinary education and research that triggered a shift of focus in power electronics. In- stead of focusing on topologies and control, the power electronics conversation has turned to materials, struc- tural, and electromagnetic synthesis of IPEMs. INTELLECTUAL MERIT Transforming the Power Electronics Discipline INTERNATIONAL POWER ELECTRONICS AND THE MOTION CONTROL CONFERENCE The International Power Electronics and Motion Control Confer- ence, established in 1994 has become a major technical event in Asia for the power electronics community, attracting many spe- cialists from all over the world. CPES director Fred Lee has served as General Chair since its inception and CPES faculty regularly present tutorials on IPEMs at the event. INTERNATIONAL SYMPOSIUM ON POWER ELECTRONICS TECHNOLOGY The first international symposium on Power Electronics Technol- ogy for “Distributed Generation Systems” was held in Hefei, Anhui, China and was chaired by Fred Lee. This was the first conference organized in China on power electronics for distributed power generation and alternative energy sources. FUTURE OF ELECTRONIC POWER PROCESSING AND CONVERSION CPES has been a leader in the IEEE International Workshop on the Future of Electronic Power Processing and Conversion (FEP- PCON). This workshop invites 50 to 60 of the leading power elec- tronics researchers worldwide to brainstorm on the roadmap of power electronics. CONFERENCE ON INTEGRATED POWER ELECTRONICS SYSTEMS CPES contributed to the founding and promotion of the only international conference focusing on integrated systems, the Conference on Integrated Power Electronics Systems (CIPS). CPES faculty members have served as chair and as invited speakers. CONFERENCES AND PROFESSIONAL MEETINGS CPES 10 YEAR PROGRESS REPORT 2010 4.9 CPES developed new academic courses and pro- grams, but the greatest impact on the discipline came via numerous lectures, presentations, tutorials, and publications at professional and education gatherings, where we explained and promoted the IPEM concept. As a result, advanced integration and packaging have become prominent topics in all major power electron- ics conferences and journals, and the number of pa- pers, sessions, committees, and authors involved has increased significantly. CPES earned global recognition as a leading power electronics organization and its fac- ulty have been invited to teach at many organizations worldwide. Lectures, tutorials, and short courses have been delivered to thousands of academics and researchers, engineers and industry leaders, graduate and undergraduate students on five continents. For ex- ample, Prof. T. M. Jahns (UW) presented a series of invited lectures to universities and engineering institutions in Australia, which addressed the future of power electronics and electric machines. These events culminated in his delivery of an invited plenary session to more than 300 attendees at the International Conference on Electrical Machines & Systems, Hagasaki, Japan, in November 2006. Professors Dushan Boroyevich (top left photo) and Ming Xu were among 10 faculty members that delivered a one-week short course organized by Xian Jiaotong University in Xi’an, China, in August 2006. In what could have been the largest-ever educational event focused solely on modern power electronics, the lectures attracted more than 300 graduate students, professors, teachers, and engineers from five universities and other organizations from across China. PROFESSIONAL EDUCATION The CPES model for industrial and academic col- laboration bolstered the domestic power electronics community so effectively that European and Japanese counterparts quickly imitated it. A few years after our ERC was formed, Europe and Japan each established power electronics research centers similar to CPES. They understood the power of the IPEM concept. European Center for Power Electronics (ECPE) The European Center for Power Electronics (ECPE) was launched in April 2003 to promote power electronics in Europe and tap the innovative potential of the technology in applications relevant to Europe. ECPE’s goal is to boost Europe’s competitiveness with North America and Asia by improving the region’s in- novative strength and its role in future key areas such as energy production, energy distribution, the use of energy and and energy conservation. CPES has helped ECPE get organized and some CPES industry mem- bers are founding members of ECPE. Power Electronics Research Center (PERC) Japan’s National Institute of Advanced Industrial Science and Technology modeled its Power Electron- ics Research Center (PERC) after CPES. PERC was formed in 2001 as a consortium of companies and uni- versities focusing on developing basic technologies for making advanced power components (SiC and GaN devices), and systems based on these devices. Their system research is similar to that of CPES, focusing on what they call i-Cubic: Intelligent, Integrated, and In- novative Power Electronics Modules. A GLOBAL MODEL 4: OUTCOMES & IMPACTS Historically, developments in power process-ing have taken about 20 years to make an impact on industry after being developed in the laboratory. However, the CPES IPEM concept began to make a noticeable impact in fewer than 10 years. Some of this can be explained by the accelerating speed of technological improvements, but industry experts say that CPES itself is largely re- sponsible for the relatively quick adoption of a new technology in power processing. Before the ERC was created, the domestic power electronics industry was fragmented and no single firm could afford the basic research to keep the in- dustry innovative and competitive. Funding from the DOD, DOE, NASA and related aerospace and defense industries, once robust, had shrunk. As a result, what little funding trickled into the industry was used to deploy existing technologies instead of funding basic research into the next generation of power electronics technologies. Firms joined for many reasons When CPES was formed as an ERC, industrial firms joined the Center for different reasons. John Steel of Artesyn Technologies, who served as chair of the Industry Advisory Board, described three major reasons for companies to sign up: “On an intellectual level, companies realized that by pooling knowledge through the NSF center, the technology could be devel- oped that would enable them all to thrive,” he said in an interview in early 2009. He identified other reasons as the profit motive and fear of being left behind. “We believed that participating in CPES would provide us with information that would allow us to make money and serve our customers and make our stakeholders happy.” CPES gives power electronics firms a neutral place to meet, which helps to strengthen the entire industry. “CPES allows the opportunity to influence the direc- tion and content of power electronics research. This attracts people who wouldn’t normally collaborate with each other” said Ken Phillips in a 2009 phone in- terview. “There is an acute understanding of the prob- lems in our industry,” he said, “and industry has the opportunity to influence what areas are targeted by identifying these problems.” He cited the CPES tech- nology roadmap as a boon to the industry. Creating good chemistry CPES also has contributed to the industry by creating good chemistry among participants, he said. Through interactions with each other as colleagues and with the research faculty and students, profession- als get to know each other. “By building these relation- ships, we are building a lifetime of interest... We are all interested in energy efficiency and efficient energy OUTCOMES & IMPACTS Re-Energizing an Industry “CPES allows the opportunity to influence the direction and content of power electronics research. This attracts people who wouldn’t normally collaborate with each other.” — Ken Phillips, IAB Co-Chair 4.10 CPES 10 YEAR PROGRESS REPORT 2010 conversion and new energy sources... CPES connects with our passion.” CPES industry members have shown their passion by their commitment of time and resources to the effort as described in Chapter 5. As NSF support was shrink- ing in the last couple years, industry stepped up its fi- nancial support and the Center enjoyed a growth spurt in membership. Understandably, the NSF has cited CPES as a model for industrial collaboration. Fast, effective technology transfer CPES also helped the industry by developing a model intellectual property process for moving tech- nology out of academic laboratories into the market- place. This IP process for academic research groups is almost as fast as the industry process and significantly improved academics’ ability to protect their work and get recognition, while also speeding up the process of technology transfer. (See page 5.63) Biggest Boon: IP With A Brain Many CPES industry partners believe the great- est impact CPES has had on the industry is through its graduates, who are sometimes referred to as “IP With a Brain.” The most effective form of knowledge/technol- ogy transfer to industry is the employment of CPES stu- dents. Over the 10-year life span, industry has hired 230 CPES graduates. Historically, CPES students are well trained, have a systems vision, and are accustomed to working in a multi-disciplinary team environment. Over time, CPES graduates have generated significant impact on the power electronics industry. Some member firms are successful with hiring a cluster of CPES graduates to help boost brain power in the company. Some gradu- ates decide to utilize their leadership and management skill to satisfy their entrepreneurial instinct and create successful start-ups. Others join academia to teach and train the next generation of engineers. A significant number have moved on to higher management posi- tions and serve as chief technology officers, vice presi- dents, technology managers and directors within their respective organizations. How big is the industry impact? IPEM power electronics systems can eventually im- pact most of the global economy. The market for semi- conductors used in power management exceeds $13 billion annually and is expected to grow to $70 billion annually by 2013. The computer, telecommunications, consumer electronics, utility, and transportation indus- tries that are adopting the IPEM mean that its impact will be immense. The IPEM is truly an enabling tech- nology. 4.11 The 2006 CTO Summit brought together 60 industry technology leaders from 47 organizations to address how CPES could maximize benefits to industry, prepare the next generation of engineers, align the CPES and industry technology roadmaps, and balance basic vs. applied research. 4: OUTCOMES & IMPACTS Wei Chen (Ph.D. 1998) joined Linear Technology upon graduation in 1998. In January 2004, he moved to Monolithic Power Systems (MPS) before it went public in November 2004. As Vice-President of Engineering at MPS, Wei recruited a cluster of CPES graduates to serve in key management roles, thus propelling the company to huge success. In February 2007, MPS was named “technology over-achiever” by Forbes Magazine, alongside Google, Amgen, and Dolby Laboratories, to become one of the top 25 technology deal makers from among 2200 public technology companies in the U.S. In June 2008, Wei founded Silergy. Based in San Jose, California, with offices in China and Taiwan, his start-up company now employs 50 people and develops products for computing, renewable energy and efficient lighting. 4.12 OUTCOMES & IMPACTS CPES Entrepreneurs Wei Chen (Ph.D.) Que Chen joined Lucent Tech- nologies upon graduation in 1994. When Tyco Electronics acquired Lucent Technologies in 2001, Que founded Innoveta, Inc. in Texas and served as vice president of en- gineering. TDK acquired Innoveta in 2003; Chen joined Astec Power/Emerson Network Power, where he was promoted to chief technology of- ficer in 2005. As top officer, Chen was responsible for technology development and the technology roadmap, supporting the Embedded Computing and Power Business Unit, with a revenue of $1.5B in 2007. In Fall 2009, he joined Delta Electronics. Que Chen (Ph.D.) Ming Xu joined CPES in Decem- ber 2000 as a visiting scholar and became a research scientist in 2001, conducting research as team leader of the VRM mini-consortium. In 2003, he became a research assis- tant professor and, in 2006, was appointed associate professor of Virginia Tech’s ECE Department. In 2009, he found- ed FSP-Powerland based in Nanjing, China. He has a dream team of CPES graduates: Julu Sun (Ph.D. 2008) as chief technology officer and deputy director of the General Product Center; Yang Qiu (Ph.D. 2005) as chief operating officer and director of the Generation Marketing Center; Chuanyun Wang (Ph.D. 2009) as business director of the Generation Technology Cen- ter; and Juanjuan Sun (Ph.D. 2007) as business direc- tor of the Generation Software Center. Ming Xu (Associate Professor)   CPES 10 YEAR PROGRESS REPORT 2010 4.13 G. Q. Lu received a double-major B.S. degree in Physics and Materials Science and Engineering from Carnegie- Mellon University in 1984. He then went on to Harvard University, where he earned M.S. and Ph.D. degrees in Applied Physics by 1990. Immediately afterwards, he worked as a staff engineer at ALCOA Electronic Pack- aging, Inc. for two years. Lu joined the faculty at Vir- ginia Tech in 1992 as an assistant professor in the Department of Materials Science and Engineer- ing. In 2003 he earned a joint ap- pointment in MSE and electrical and computer engineering and in 2005 he earned an NSF CAREER award for young faculty. Lu heads up the integrable materials effort for CPES. While working on a new, high-temperature ma- terial for attaching power devices, his team developed a metal paste made of silver nanoparticles. The nano- scale silver paste can be processed or sintered at low temperatures used for reflowing solder materials; but, the sintered silver allows devices to operate at tempera- tures as high as 600°C. Called nanoTach, the material was named one of the 100 top inventions of 2007 by R&D Magazine. Lu, who is now a full professor at Virginia Tech, has become an entrepreneur, starting up NBE Tech- nologies to develop and market the technology. His customers include power module manufacturers in Europe and the United States. Guo Quan Lu - Professor Ashraf Lotfi worked for AT&T and Lucent Power Systems upon graduation in 1993 and later trans- ferred to Lucent Bell Labs, where he became director of power man- agement. In 2001, he founded En- pirion and has served the compa- ny as its president, founder & chief technical officer. In 2006, Enpirion announced its EN5312Q series of ultra-integrated dc-dc converters that integrates silicon with magnetics. Chosen by Electronic Products Magazine as the “Product of the Year”, this fully inte- grated converter features very high power density, sim- plified design, reduced footprint and parts count, and superior noise performance. The device requires only two ceramic capacitors to create a complete power solution. These fully inte- grated solutions are in widespread use in diverse ap- plications such as servers, wireless, telecom, portable and high performance chip sets. Companies such as Linear Technology, National Semiconductor, and Fuji, have followed suit. Ashraf Lotfi (Ph.D.) R&D TOP 100 INVENTION 4: OUTCOMES & IMPACTS 4.14 Dan Sable, a 1991 graduate, found- ed VPT, Inc. in 1994. VPT produces high-density, high-reliability, and high-performance dc-dc convert- ers. Today, VPT is one of the lead- ers in power supplies for mission critical applications, such as air- craft, satellite and military power supplies. Working in partnership with Delta Electronics, the world’s largest commercial power supply manufacturer, VPT delivers its patented power solutions in a fast timeframe, with the highest certified quality, and at a comfortable cost. As VPT is a long-time CPES industry partner and sponsor, the company has six VPEC/CPES alumni on its team, with three in top leadership roles. They are Dan Sable, Arthur Ball, Steve Butler, Callaway Cass, Jeremy Ferrell, Leonard Leslie Sable also serves on Virginia Tech’s ECE Industrial Advisory Board, has served as its chair, and has been a guest lecturer at Virginia Tech on multiple occasions. Dan Sable (Ph.D.) Ray Ridley is president of Ridley Engineering, Inc., managing direc- tor of Ridley Engineering Europe, managing director of Ridley En- gineering, UK, president of Rid- ley Audio, Inc., and publisher of Switching Power Magazine. He received his Ph.D. in Elec- trical Engineering in 1990 from Virginia Tech. His dissertation, “A New Small-Signal Model for Current- Mode Control”, has become the industry standard for modeling power electronics circuits today. Prior to starting Ridley Engineering, Inc. in 1991, Ridley was assistant director of VPEC. At Ridley Engineering, Ridley developed the power electronics industry’s leading design software, POWER 4-5-6 in 1991. Today, it remains the most comprehensive package available for power supply designers worldwide. His international laboratory workshops are attended by top design engineers from companies seeking to take their design capabilities to the next level. Presently, Ridley is the only teacher for this level of advanced power electronics and magnetics design worldwide. His online resource center has over 14,000 subscribers in 70 countries, and is the leading source of design ideas and exclusive features on new technology for the electronics design community. Ray Ridley (Ph.D.) CPES 10 YEAR PROGRESS REPORT 2010 4.15 Glenn Skutt joined VPT, Inc. upon graduation in 1996 and was promoted to vice president of technology in 2001. In early 2008, Glenn founded VPT Energy Sys- tems, a new start-up company that develops power electronics and control devices for the smart-grid and distributed energy application areas. Glenn Skutt (Ph.D.) Companies Started By CPES Entrepreneurs Athena Energy, LLC, founded by Dimos Katsis (Ph.D. 2003) Enpirion, founded by Ashraf Lotfi (Ph.D. 1993) E-Power AND Inventronics Co. Ltd., founded by Gary Hua (Ph.D. 1994) FSP-Powerland, founded by Ming Xu in 2009 (Associate Professor) GES, Inc., founded by Richard Gean (M.S. 1990) Innoveta, Inc. founded by Que Chen (Ph.D. 1994) NBE Tech, LLC, founded by Guo Quan Lu in 2005 (Professor) NetPower Technologies, Inc., founded by Yimin Jiang, (Ph.D. 1994) with Hengchun Mao (Ph.D. 1996) joining top management Northwest Power Integrations, founded by Wojciech Tabisz (Ph.D. 1990) Power Hub Ventures, LLC acting as VPT Energy Systems, founded by Glenn Skutt (Ph.D. 1996) Ridley Engineering, founded by Raymond Ridley (Ph.D. 1990) Silergy, founded by Wei Chen (Ph.D. 1998) VPT, Inc., founded by Dan Sable (Ph.D. 1991), with Glenn Skutt (Ph.D. 1996) and Steve Butler (M.S. 1993) joining top management team Gary Hua co-founded VPT in 1994 upon graduation and served as its VP of Engineering until he founded E-Power in Hangzhou, China in 1999, where he served as founder and general manager. (E- Power was acquired by Bel-Power in 2001.) In 2007, Hua started another company, Inventronics Co. Ltd., where he is founder and CEO. Inventronics has its headquarters in Hangzhou, China. It employs cutting-edge circuit de- sign and packaging technologies and specializes in the design, manufacture, marketing, and sales of high-end AC adapters. Guichao (Gary) Hua (Ph.D.) Wojciech Tabisz Wojciech Tabisz received an M.S. in Electrical Engineering, from the Department of Electronics Engi- neering, Warsaw Technical Univer- sity, Poland in 1984, and his Ph.D. in Electrical Engineering, from Virginia Tech in 1990. He then worked as a Research Scientist at Virginia Power Electronics Center until 1993, when he joined OECO Corporation as Staff Engineer. Since 1995 he has been the President and CEO of Northwest Power Integrations, a company he started in coopera- tion with Vicor Corporation. Operating as a subsidiary of Vicor, NPI designs and manufactures high-end elec- tronic power supplies, systems and solutions utilizing Vicor technology. 4: OUTCOMES & IMPACTS 4.16 OUTCOMES & IMPACTS CPES Business Leaders MPS, an IC company that went public in November 2004, was soon recog-nized as a “technology over-achiev-er.” In February 2007, it was selected by Forbes Magazine, alongside Google, Amgen, Dolby Laboratories, and others, as one of top 25 technology deal makers from among 2200 pub- lic technology companies in the U.S. The criteria for this achievement is based on the company’s 10 percent annual growth in five consecutive years, as well as 10 percent estimated annual profit growth in the next three to five years. To date, 10 CPES-VT alumni have served in key management roles at MPS, making significant contributions to the company. In February 2007, MPS was named “technology over-achiever” by Forbes Magazine, alongside Google, Amgen, and Dolby Laboratories, to become one of the top 25 technology deal makers from among 2200 public technology companies in the U.S. Eric Yang has been work- ing for Monolithic Power Systems and is now the Vice President of Technical Mar- keting. He received his Ph.D. in 1994 from Virginia Tech and began his career at Har- ris Semiconductor, where he became Manager of System Engineering. In 1998, he joined Semtech and served as the Director of Applica- tions Engineering. Today, MPS employs more than 550 employ- ees worldwide, located in the United States, Tai- wan, China, Korea, Japan and across Europe. CPES-VT alumni who joined MPS’s team include: Frank Ren (Ph.D. 2005) — manager of MPS’s new R&D Center in Hangzhou, China; Jinghai Zhou (Ph.D. 2005) — ap- plications manager; Yuxin Li (Ph.D. 2000) — princi- pal designengineer; Peng Xu (Ph.D. 2002) — design manager; Gary Yao (Ph.D. 2004) — staff system engineer; Haifei Deng (Ph.D. 2005) — staff design engineer; Yan Dong (Ph.D. 2009) — senior design engineer; Honggang Sheng (Ph.D. 2009) — se- nior applications engineer; Bo Yang (Ph.D. 2003) — senior design engineer. MPS hired several other CPES/VPEC grad- uates: Wei Chen (Ph.D. 1998) — was VP of En- gineering and recruited several CPES graduates to serve in key management roles of MPS (see 4.12). “T EC HN OL OG Y OV ER -A CH IE VE R” Frank Ren Jinghai Zhou Monolithic Power Systems (MPS) CPES 10 YEAR PROGRESS REPORT 2010 4.17 Shaoan Chin, a 1985 graduate, currently serves as VP – Corpo- rate Marketing of Quanta Com- puter, one of the largest notebook computer ODM companies in the world. In 2005, Quanta had 30% of worldwide market share of notebook computers under Tier-1 brand names. It is expanding into other areas such as cellular phones, LCD TVs and other emerging technologies, all on the ODM basis. In 2006, Quanta was recognized by Fortune maga- zine as one of the Global Fortune 500 Enterprises. Chin was in charge of worldwide ODM programs at Global Supply Management of Cisco prior to join- ing Quanta. Prior to that he served with Philips Semi- conductor, Apple Computer, Kendin Communica- tions and Cisco Systems as IC Design Engineer, Design Engineering Manager, Notebook Computer Project Manager, Computer Core Technology Manager, Direc- tor and Vice President for Manufacturing Operation, Marketing and Sales. Shaoan Chin (Ph.D.) Michael Zhang joined Intel in Or- egon as a research scientist upon graduation in 1997. After serving the company for three years, he quickly advanced to the position of engineering manager. After three more years, he became the director of Intel’s System Design Center in Shanghai. Four years later he was appoint- ed general manager of emerging market platforms in Shanghai. As general manager, Zhang was responsible for helping the company define and develop computer systems for the next one billion new users in emerging markets. In 2008, Zhang was promoted to marketing direc- tor of mobile initiatives for Intel in Beijing, China, re- sponsible for drive strategies and marketing programs to continue promoting mobile PC growth in China. In 2009, he returned to Shanghai to serve as Intel’s PRC general manager for the PC Client Group, where he was responsible for the development of leading edge notebook, netbook, and desktop products and support for local customers in the People’s Republic of China. Michael T. Zhang (Ph.D.) Milan Jovanovic joined Virginia Power Electronics Center (VPEC) at Virginia Tech as research faculty upon graduating in 1988. In 1991, he joined Delta Power Electronics Lab., Inc. in Blacksburg, Virginia as director of R&D. In 1997, he was promoted to vice president for research and development of Delta Products Corporation in Research Triangle Park, NC. Beginning in May 2004, he also served as the chief tech- nology officer (CTO) of Delta’s Power Supply Business Group. As CTO, Jovanovic provides leadership in de- fining and executing Delta’s long-term technology-re- lated vision aimed at ensuring Delta’s competitiveness and leadership position in the marketplace. His responsibilities also include coordinating the worldwide Advanced R&D and Advanced Prod- uct Development to eliminate overlapping activities, maximize technology R&D efficiency, and shorten the technology transfer time to product development. Delta Electronics was No. 1 in worldwide OEM power supply sales for 2006. Milan Jovanovic (Ph.D.) 4: OUTCOMES & IMPACTS Vlatko Vlatkovic (Ph.D.) Vlatko Vlatkovic received his PhD from Virginia Tech in 1994 and joined the GE Global Research Center as a researcher in the field of power electronics. In 1998, Vlatkovic became the manager of the Power Controls Program and was responsible for leading a broad range of R&D projects, whose applications include lo- comotive traction, electrical machines, motor drives and controls. In 2001, Vlatkovic became the Global Technology Leader for Electronics and Energy Conversion. His organization is conducting research in areas of alter- native and renewable energy, green transportations, power transmission and distribution, power electron- ics, controls and advanced electronics and photonics systems. Since 2008, Vlatkovic has served in Italy as Gener- al Manager for Control, Electronics and Electrification of GE Oil & Gas Engineering. 4.18 Goran Stojcic (M.S.) Goran Stojcic received his M.S. in Electrical Engineering from Virginia Tech in 1995. Between 1995 and 1999, Goran worked as a Design Engineer at Martek Power, where he designed custom power solutions for instrumen- tation and high-end computing and networking applications. He joined International Rectifier in 1999, where he managed the Applications Department for dc-dc products, and was responsible for establishing IR’s leadership position in low-voltage and mid-voltage power MOSFET technology. For his contribution to the development of proprietary Di- rectFET® Power MOSFETs, Goran received the 2003 International Rectifier Founders Award. Goran also pioneered intermediate dc bus power conversion architecture and development of industry’s first single-chip family of IC controllers for isolated dc bus converters. Goran was appointed Director of Applications for the Computing and Communications Business Unit in 2005. He was responsible for high-performance Power Stage products and later on for Point of Load (POL) dc-dc power conversion products. He also envisioned and developed high-performance, integrated, and highly scalable SupIRBuck POL Voltage regulators. Goran is currently Executive Director of the En- terprise Power Business Unit and is responsible for ap- plications and technical marketing for POL products. He is interested in developing advanced energy-savings technologies and products for data center applications. Henry Zhang Henry J. Zhang received his B.S. degree in electrical engineering from Zhejiang University, China in 1994. He received his M.S. and Ph.D. degrees in 1998 and 2001, respectively, in Electrical Engi- neering from Virginia Tech. From 1996-2001, he was also a graduate research assistant in the Center for Power Electronics Systems (CPES), focusing on advanced Power Factor Correction and distributed power system techniques. In 2001, Zhang Joined Linear Technology Corpo- ration (LTC) in Milpitas, California as an applications engineer for power products. He became the applica- tions group Section Leader in 2004 and led his team supporting LTC’s high performance dc-dc control- ler and integrated power module products. In 2008, he became the applications engineering manager for power products at Linear Technology Corporation. CPES 10 YEAR PROGRESS REPORT 2010 Richard Zhang is an executive of GE Company and the Global Electrification Leader of GE Oil & Gas. He received his Ph.D. from CPES, Virginia Tech. Before mov- ing to GE Oil & Gas, he was with GE Global Research Center for ten years, where he was the lab man- ager of the Electronic Power Conversion Lab for the last seven years. He has led power electronics research serving all GE industrial businesses including Oil & Gas, Energy, Aviation, Healthcare, Transportation, and Enterprise Solutions, as well as government agencies such as DARPA, the Office of Naval Research, Army Research Lab, the Air Force Research Lab and the De- partment of Energy. The advanced power electronics research programs that he leads range from systems, circuits, and controls to packaging and SiC switches for a wide range of applications, such as large drives for Oil & Gas, wind and solar power converters, air- craft and ship power conversion, and medical power electronics. Richard has won a Best Paper Award for a publica- tion in IEEE Transactions on Power Electronics and one IAS prize paper award. He has served as an Associate Editor for IEEE Transactions on Power Electronics and currently serves on the Industry Advisory Board for CPES and the IEEE PELS Adcom. Richard Zhang (Ph.D.) Jinrong (John) Qian earned his Ph.D. in October 1997 and joined Philips Research as Senior Mem- ber of Technical Staff upon gradu- ation. In 2001, he joined Maxim Integrated Products as Senior Corporate Applications Engineer. In 2002, he joined Intersil Corpo- ration as Senior Principal Applications Engineer, and soon became Applications Manager. In 2005, he joined Texas Instruments as Senior Member of Technical Staff and Battery Management Applications Manager. He was elected Distinguished Member of the Techni- cal Staff for the Battery Power Management group in 2007 and has been Business Sector Manager of Bat- tery Charge Management at Texas Instruments since 2009. Jinrong has published a myriad of peer-reviewed power electronics transactions and power manage- ment papers, and holds 22 U.S. patents. He also served as Associate Editor of the IEEE Transactions on Power Electronics from 1998 to 2000. Jinrong Qian (Ph.D.) 4.19 4: OUTCOMES & IMPACTS OUTCOMES & IMPACTS Academic Excellence 4.20 Dushan Boroyevich (Ph.D. 1986) American Electric Distinguished Professor, Virginia Tech and CPES co- director. Bo H. Cho (Ph.D. 1985) professor, Seoul National University. Ray-Lee Lin (Ph.D. 2001) associate professor, National Cheng Kung University. Ching-Shan Leu (Ph.D. 2006) assistant professor, National Taiwan University of Science and Technology. Douglas Hopkins (Ph.D. 1989) research professor, University of Buffalo. Richard Tymerski (Ph.D. 1998) associate professor, Portland State University. Ramesh Oruganti (Ph.D. 1987) associate professor, National University of Singapore. Sudip Mazumder (Ph.D. 2001) associate professor, University of Illinois at Chicago. D. Jeff Shortt (Ph.D. 1982) associate professor, Cedarville University. CPES 10 YEAR PROGRESS REPORT 2010 4.21 Bahawodin Baha (1992) Brighton Polytechnic, England Josep Bordonau (1996, 2000– 2001), Universitat Politecnica de Catalunya, Spain Sergio Busquets-Monge (2009), Universitat Politecnica de Catalu- nya, Spain Colin Campbell (2000, 2002) McMaster University, Canada Yue Chang (2006–2007) Shanghai Jiaotong University, China Sehn-Yaur Chen (1990–1991) National Yunlin Institute of Tech- nology, Taiwan Wei Chen (1996–1998) Fuzhou University, China Gyu-Ha Choe (1998–1999) Konkuk University, South Korea Zarko Cucej (1995) University of Maribor, Slovenia G. K. Dubey (1984–1985) IIT, India Zi-Duan Fang (1982–1983, 1997–1999), Chinese Academy of Sciences, China Qing Fu (2009) Sun Yat–Sen University, China Qiongxuan Ge (2008–2009) Institute of Electrical Engineer- ing, Chinese Academy of Sciences, China Eugenio Gubia (2005) Universidad Publica de Navarra, Spain Rongtai Hao (1989–1990) Northern Jiaotong University, China Fengying Huang (1995) Nanjing University of Aeronautics & Astronautics, China Shi-Peng Huang (1991–1992) Zhejiang University, China Laszlo Huber (1992) University of Novi Sad, Yugoslavia Seong-Jeub Jeon (2001–2002, 2004), Pukyong National Univer- sity, South Korea Xiaochuan Jia (1999, 2000–2001) Taiyuan University of Technology, China Jianzhong Jiang (1992) Shanghai University of Technol- ogy, China Ke Jin (2006–2009) Nanjing University of Aeronautics & Astronautics, China M. Kazimierczuk (1985–1986) Warsaw Technical University, Po- land Hee Jun Kim (1991–1992) Hanyang University, South Korea Marn-go Kim (2003–2004) Pukyong National University, South Korea Visiting Faculty 4: OUTCOMES & IMPACTS Yang Mo Kim (1989–1990) Chung-nam National University, South Korea Bong-Hwan Kwon (1990–1991) Pohang Institute of Science & Technology, South Korea Soon Kurl Kwon (1998) Kyungnam University, South Korea Shi Lan (1986–1987) Shanghai Institute of Process Au- tomation, China S.R. Lee (1997–1998) Kunsan National University, South Korea Yongdong Li (1996, 2007) Tsinghua University, China Yuling Li (2008–2010) Zhejiang University, China Zhenxian Liang (1999–2001) Xian Jiaotong University, China Jinjun Liu (1999–2002) Xian Jiaotong University, China Zhigang Liu (1999, 2002–2003) Northern Jiaotong University, China Ziguo Liu (2003–2004) Chongqing University, China Shiguo Luo (1997–1998) Chongqing Engineering Institute, China Paolo Mattavelli (2004) University of Udine, Italy Tamotsu Ninomiya (1993–1994), Kyushu University, Japan Yunqing Pei (2006–2007) Xian Jiaotong University, China Jose Renes Pinheiro (2001– 2002), Universidade Federal de Santa Maria, Brazil Josep Pou (2001–2002, 2005– 2006), Universitat Politecnica de Catalunya, Spain Abraham Sanchez-Claudio (2000, 2002–2003), CENIDET, Mexico Toshihisa Shimizu (1998) Tokyo Metropolitan University, Japan Luca Solero (2001–2002) University of ROMA TRE, Italy Giorgio Spiazzi (1992) University of Padova, Italy Zeng Tao (1984–1986) Anhui Coal Mining Design Insti- tute, China Ying-Yu Tzou (1991–1992) National Chiao–Tung University, Taiwan YiYi Tu (1982–1985) Chinese Aeronautical Establish- ment, China Wang Liang (1997–1998) Northern Jiaotong University, China 4.22 CPES 10 YEAR PROGRESS REPORT 2010 Lide Wang (1999) Northern Jiaotong University, China Shijie Wang (1997–1998) Changchun Institute of Optics and Fine Mechanics, China Yuandong Wang (1995–1998) Wuhan Industry University, China Rongguang Wu (1988–1989) Shandong Institute of Mining & Technology, China Yiding Wu (1991–1992) Wuhan University of Hydraulic & Electrical Engineering, China Shaojun Xie (2008–2009) Nanjing University of Aeronautics & Astronautics, China Yan Xing (2006–2007) Nanjing University of Aeronautics & Astronautics, China Dehong Xu (2001) Zhejiang University, China Xu Yang (2006) Xian Jiaotong University, China Yugang Yang (2006–2007) Liaoning Technical University, China Abdul H.M. Yatim (1992) University of Malaysia Bo Zhang (1996–1999) University of Electronic Science & Technology, China Fanghua Zhang (2009–2010) Nanjing University of Aeronautics & Astronautics, China Harvey Zhang (2010) Xian University of Technology, China Jinfa Zhang (1995, 1998–1999) Zhejiang University, China Weiping Zhang (2000–2001) North China University of Tech- nology, China Xiaogdong Zhang (2001) Nanjing University, China Zhang Xingzhu (1995–1998) Zhejiang University, China Z.S. Zhang (1984–1985) Guangdong Institute of Technol- ogy, China Yuanfu Zhao (1996–1997) Shaanxi Microelectronics Research Institute, China Tong-Chi Zheng (1985–1987) Shanghai Institute of Railway Technology, China Trillion Q. Zheng (1999) Beijing Jiaotong University Xingsheng Zhou (1997–1999) Nanjing University of Aeronautics & Astronautics, China Lizhi Zhu (1997–1999) Tsinghua University, China Xinfu Zhuang (1991–1992, 1994–1997), Nanjing Aeronautics Institute, China 4.23 4: OUTCOMES & IMPACTS OUTCOMES & IMPACTS Global Connections Lead Institution Core Partner Collaborating (Outreach) Institutions Non-ERC Institutions Providing REU Students DOMESTIC PARTICIPATION IN THE CENTER FOR POWER ELECTRONICS SYSTEM NSF-ERC | 1998-2008 4.24 CPES 10 YEAR PROGRESS REPORT 2010 1-10 NUMBER OF ERC COLLABORATIONS 31-4011-20 FOREIGN LOCATION OF LEAD, CORE PARTNER, OUTREACH AND REU & RET PARTICIPANTS INSTITUTIONS 4.25 4: OUTCOMES & IMPACTS EDUCATION & OUTREACH Academic Outreach Over the years, CPES has collaborated with many power electronics faculty and students around the world via long-term and short-term technical exchange visits, research projects, joint workshops and symposia, and joint publications. Shown below are the academic institutions with which CPES has collaborated. Aachen University of Technology Germany Aalborg University Denmark Academy of Sciences of the Czech Republic Czech Republic Beiing University PR China Beijing National Lab PR China California Lutheran University USA Centro Federal de Educação Tecnológica do Maranhão Brazil Centro Nacional de Investigación y Desarrollo Tecnológico (CENIDET) Mexico Chalmers University of Technology Sweden Changwon National University Korea Chinese Academy of Sciences PR China Chonbuk National University Korea Chongqing University PR China City University of Hong Kong Hong Kong Concordia University Canada Dartmouth College USA Delft University of Technology The Nether- lands Dong-Eui University Korea Dresden University of Technology Germany Eindhoven University of Technology The Nether- lands Florida State University USA Gazi University Turkey Georgia Institute of Technology USA Gyeonsang National University Korea Hangyang University PR China Hanyang University Korea Harbin Institute of Technology PR China Hefei Institute of Technology PR China Helsinki University of Technology Finland Hong Kong Polytechnic University Hong Kong Hong Kong University of Science and Technology Hong Kong Hoseo University Korea Huazhong University of Science and Technology PR China Ilmenau Technical University Germany Iowa State University USA India Institute of Science India Kagoshima University Japan King Mongkut’s University of Technology Thailand Konkuk University Korea Korea Electrotechnology Research Institute Korea Korea University Korea Kuwait University Korea Kyungpook National University Korea Kyungsung University Korea Laboratoire d’Electrotechnique de Grenoble France Liaoning Technical University PR China Lund Institute of Technology Sweden Manitoba HVDC Research Centre Canada Massachusetts Institute of Technology USA Mazandaran University Iran McGill University Canada McMaster University Canada Michigan State University USA Miyakonojo National College of Technology Japan Monash University Australia Nagaoka University of Technology Japan Nanjing University of Aeronautics and Astronautics PR China National Cheng Kung University Taiwan National Taipei University of Technology Taiwan National Taiwan University of Science and Technology Taiwan National Tsing Hua University Taiwan North Carolina State University USA North China Electric Power University Korea Northeastern University USA 4.26 CPES 10 YEAR PROGRESS REPORT 2010 Northern Jiaotong University PR China Northwestern Polytechnical University PR China Norwegian University of Scienceand Technology Norway The National University of Singapore Singapore Ohio State University USA Penn State - Center for Dielectric Studies USA Politecnico di Milano Italy Polithecnical Naval Academy Chile Polytechnic Federal University of Lausanne Switzerland Polytechnic University of Puerto Rico (PUPR) USA Pukyong National University Korea Royal Institute of Science Technology KTH Sweden Rutgers University USA RWTH-Aachen, ISEA Germany Seoul National University Korea Shandong University PR China Shanghai Jiaotong University PR China Shanghai Maritime Unviersity PR China Shanghai University of Technology PR China Sharif University of Technology of Tehran Iran Shibaura Institute of Technology Japan Swiss Federal Institute of Technology (ETH) Zurich Switzerland Taiyuan University of Technology PR China Technical University of Berlin Germany Technical University of Denmark Denmark Technical University of Munich Germany Tianjin University PR China Tokyo Denki University Japan Tokyo Institute of Technology Japan Tokyo University of Agriculture & Technology Japan Tsinghua University PR China Tyndall National Institute Ireland Universidad de Carlos III de Madrid Spain Universidad de Granada Spain Universidad de Oviedo Spain Universidad Politécnica de Madrid Spain Universidad Pública de Navarra Spain Universidade Federal da Santa Catarina Brazil Universidade Federal da Santa Maria Brazil Universidade Federal de Campina Grande Brazil Universidade Federal de Paraiba Brazil Universidade Federal de Pernambuco Brazil Università Degli Studi di Padova Italy Università di Bologna Italy Università di Catania Italy Università di Parma Italy Universität der Bundeswehr München Germany Universitat Politecnica de Catalunya Spain Universiti Teknologi MARA Malaysia University of Adelaide Australia University of Applied Science, Karlsruhe Germany University of Applied Sciences Cologne France University of Belgrade Serbia University of Bremen Germany University of Central Florida USA University of Concepcion Chile University of Electronic Science and Technology of China PR China University of Federal Defense Germany University of Florence Italy University of Florida USA University of Hanover Germany University of Johannesburg/Rand Afrikaans University South Africa University of Manchester England University of Maribor Slovenia University of Maryland - CALCE USA University of Naples “Federico II” Italy University of Novi Sad Serbia University of ROMA TRE Italy University of Rome ‘La Sapienza’ Italy University of Seoul Korea University of Sheffield England University of Siegen Germany University of Stellenbosch South Africa University of Texas at Dallas USA University of Tokyo Japan University of Toronto Canada University of Udine Italy University of Wales Swansea England University of Warwick England University of Wisconsin-Milwaukee USA University of Zaragoza Spain University Politehnica of Timisoara Romania Wuppertal University Germany Xian Jiaotong University PR China Yeungnam University Korea Yonsei University Korea Yosu National University Korea Zhejiang University PR China 4.27 4: OUTCOMES & IMPACTS Power Electronics Curriculum When CPES was established as an ERC, more than 70 universities in the U.S. offered some form of power elec-tronics curriculum. Unlike other dis- ciplines in which the curricula were well established, most of these 70 universities taught/offered power electronics in a somewhat parochial manner, pertain- ing only to their faculty members’ specialization and interests. Consequently, students who specialized in power electronics were not fully equipped to meet the diverse challenges of the workplace. In the last 10 years, CPES worked to connect cam- puses and to make power electronics research and ed- ucation truly multidisciplinary. By facilitating student exchanges and virtual courses, CPES helped power systems education become more comprehensive and effective at preparing students for the complex design trade-offs required to optimize a power electronics system. This qualitative advance generated new B.S., M.S., and Ph.D. programs (listed in Chapter 5) and led to quantitative growth in the number of students en- rolled in power electronics options. Changes at Virginia Tech The decade of ERC support changed programs at all of the CPES universities. Virginia Tech, the lead CPES university saw its power electronics educational and research programs gain significant strength in power electronics integration technology and high- temperature electronics (power) with state-of-the-art power electronics packaging facilities and the new Liv- ing Laboratory. Research on SBI, renewable energy, and microgrids began. University of Wisconsin-Madison The University of Wisconsin-Madison also saw its laboratories and curriculum strengthened. Already a powerhouse in power electronics for motor drives, UW is now one of the strongest groups in the field. Work on the IMMD and water-pump drive and flat motor drive have cemented its reputation. Rensselaer Polytechnic Institute RPI’s semiconductor research group was strong before its involvement in CPES, but now it leads the field, having made its reputation in wide bandgap materials. RPI is now poised to develop a very strong, industry-based program, based on its experience with CPES and its continued strong ties across the field. North Carolina A&T NCA&T has been able to develop its graduate pro- gram in electrical engineering, thanks to mentorship from CPES universities. The school has four power electronics graduate students, two of whom are Ph.D. students. Thanks to the strong REU program, NCA&T undergraduates are now more inclined to pursue de- grees in electrical engineering and to consider gradu- ate school. Power electronics courses are now offered in two consecutive semesters and at two different lev- els for graduate and undergraduate students. This is in addition to the distance-learning courses made avail- able by the CPES universities. NCA&T’s program has developed to the point where the school had plans to hire a power electronics professor in 2007. OUTCOMES & IMPACTS Impact on CPES Universities 4.28 CPES 10 YEAR PROGRESS REPORT 2010 It is, perhaps, UPRM that changed the most as a result of its participation in the ERC. With CPES funding and experience, UPRM was able to re-vise its curriculum, add new programs and infra- structure, bolster the standing of its faculty members, and pursue new sources of funding. CPES helped UPRM develop the human resources, infrastructure, experience, and credibility to create a sustainable trend towards excellence in the power electronics, power engineering, and electrical and computer en- gineering. At UPRM, participation in CPES enabled the Power Engineering Group to drive a major under- graduate curricular revision and was a major factor in developing UPRM’s Electrical and Computer En- gineering Department’s human, academic, and re- search infrastructure to justify and support a Ph.D. in Electrical Engineering. One metric of the success of these efforts is the steady stream of UPRM students continuing their graduate studies at CPES partner institutions and other institutions in power electronics. In the past two to three years, five UPRM students have pursued graduate studies at Virginia Tech (2), UW (2), and RPI (1). UPRM faculty members capitalized on the op- portunity provided by CPES, helping UPRM gain visibility and credibility. UPRM CPES faculty mem- bers Dr. Miguel Vélez-Reyes and Dr. Efrain O’Neill were awarded the 1998 and 2005 IEEE Walter Fee Outstanding Young Engineer Award from the IEEE Power Engineering Society. Dr. Veléz-Reyes served as Region 9 representative in the IEEE Power Electron- ics society Adcomm for two years and chaired the 2002 IEEE Workshop in Computer Applications in Power Engineering held in Mayagüez, Puerto Rico. In 2005, Dr. Miguel Vélez-Reyes was inducted in the Puerto Rico Academy of Arts and Sciences. His lead- ership in developing the CPES other ERCs at UPRM was among the key elements in his election. Dr. O’Neill used initial support from CPES to compete for and win an NSF CAREER award. He was also honored as a Puerto Rico Distinguished Electri- cal Engineer in 2004. Their experience gained in CPES has helped UPRM faculty and administration become more ef- fective in its pursuit of funding and participation in major research projects. CPES was the first ERC in which UPRM participated as a core partner. Now, UPRM is involved in four ERCs and has one of the largest programs in the US. UPRM led a major ef- fort to establish an energy center through the NSF’s Science and Technology Center program. CPES has helped UPRM establish the credibility, standing, and experience to aim at higher goals and leave a mark in the energy field. The UPRM–NIST collaboration in electrother- mal modeling of power electronics packages be- tween Dr. Miguel Veléz-Reyes from UPRM and Dr. Allen Hefner from NIST was particularly fruitful. It resulted in three master degree student theses, tech- nology transfer from NIST to UPRM, three student internships, and three full time positions for UPRM graduates. University of Puerto Rico - Mayagüez 4.29 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 00 01 02 03 04 05 06 07 08 09 10 5.0 ACHIEVEMENTS With 10 years, five core universities, dozens of industry members, and hundreds of students, CPES made progress on many fronts. While the major goal was the research and develop- ment of electronics-based power processing systems in the form of IPEMs, the Center also excelled at industrial collaboration, education, and global outreach. The following pages describe the highlights of our accomplishments in research, industry collabo- ration, education, and infrastructure. We are now poised to build on this work and continue to de- velop power electronics technology, power electronics engineers and scientists and make an impact on industry, the environment and the economy. HIGHLIGHTS • 312 graduate degrees • 1700+ technical papers, theses, and dissertations • 250 technology transfer activities • Hundreds of advances • IPEM systems & technology CHAPTER 5 PERG VPEC CIT/TDC VPEC NSF ERC CPESSponsored Research Partnership University NSF CIT - $3 million RESEARCH FUNDING 1977–2009 CPES 10 YEAR PROGRESS REPORT 2010 5.1 CHAPTER 5 RESEARCH & TECHNOLOGY TRANSFER Voltage Regulator Modules Integrated Power Conversion Systems Integrated Motor Drive Systems Power Electronic Integration Technology Semiconductor Power Devices and ICs Commercializing the IPEM Technology Transfer Table Best Paper Awards Publications Patents Awarded INDUSTRIAL RELATIONS Industry Members Program Technology Transfer IP Program Industry Involvement Post-ERC Planning EDUCATION & OUTREACH Curriculum Development New Courses Developed Boosting Undergraduate Experience Developing Student Leaders Student Experience Pre-College Outreach Professional Courses What Industry Says About CPES Graduates INFRASTRUCTURE People Facilities Financials 5.2 5.3 5.11 5.19 5.27 5.35 5.43 5.47 5.54 5.55 5.56 5.59 5.60 5.63 5.64 5.66 5.68 5.70 5.72 5.74 5.76 5.78 5.80 5.82 5.84 5.86 5.86 5.88 5.98 CONTENTS 5: ACHIEVEMENTS5.2 RESEARCH & TECHNOLOGY TRANSFER Hundreds of advances were made in de-veloping IPEM technology that will ulti-mately make electricity use more efficient. These advances were the result of com- bined efforts at the engineered systems level, enabling technology level and in fundamental knowledge. We present our featured research advances cate- gorized by the general research area that will capitalize on the advances as we move forward. Many of these advances were commercialized or integrated into com- mercial technology. Our technology transfer success are also described in this chapter. Integrated Motor Drive Systems Power Electronics Integration Technology Integrated Power Conversion Systems Semiconductor Power Devices and ICs Power Distribution Systems Sustainable Building Initiative Integrated Modular Motor Drives Control and Sensor Integration Thermal- Mechanical Integration High-Density Integration Integrable MaterialsAdvanced Power Semiconductors Low-Frequency IPEMs Passive IPEMs High-Frequency IPEMs Integrated Power Supply (Voltage Regulator Module) GRADUATION 2007 2008 AND BEYONDYEAR 11YEAR 10YEAR 9 Research & Technology Transfer Areas 1. Integrated Power Conversion Sys- tems & Voltage Regulator Modules 2. Integrated Motor Drive Systems 3. Power Electronics Integration 4. Semiconductor, Power Devices, ICs 5. Commercializing the IPEM RESEARCH THRUSTS GROUPED INTO AREAS AT GRADUATION CPES 10 YEAR PROGRESS REPORT 2010 Voltage Regulator Modules (VRM) One of the major CPES achievements was triggered by the Intel roadmap for microprocessors. Intel’s roadmap has generally followed Moore’s Law, which predicts that transistor density for integrated circuits doubles roughly every two years and performance about every 18 months. As predicted, the 486 proces- sor sported 1 million transistors and the Pentium du- al-core processor contained more than 1 trillion. The 486 power demand was roughly 10 A to 12 A, whereas present demand nears 120 A and 140-160 A is on the horizon. Power supply voltages went from 5 V to about 1.1 V, while clock rates went from 200 MHz to today’s multi-GHz. A roadblock to these aggressive performance improvements has been delivering and managing power from the power source to the micro- processor – an issue Intel calls, “the power wall.” The power conundrum Transistor integration leads to better computing performance. However, packing more transistors into smaller spaces, and pushing higher computing perfor- mance, leads the microprocessors to consume more power. The power consumed by the microprocessor is transferred to heat eventually, posing stringent chal- lenges for thermal management. If the development of processors continued without improvements in power management, a power loss density of tens of thousands of watts per square centimeter was predicted. Incomplete solutions Researchers and industry introduced several new power management technologies, which helped in the short term, but would not meet long-term needs. One answer was to decrease the microprocessor supply voltage and, starting with the Intel Pentium, micro- processors began to use a non-standard power supply of less than 5 V. Supply voltages have continued to de- crease since the Pentium was introduced. Another solution introduced a voltage regulator (VRM), a power supply dedicated to the microproces- sor. Power delivered from the VRM had to go through the motherboard and the processor socket to a high- density multi-layer PCB, then to the microprocessor. This created a path strewn with interconnect parasit- ics that slowed down the rate of power transfer. It was simply too slow. The next solution was to use a large number of capacitors in parallel, which increased volume and cost and was not scalable. An enormous amount of capaci- tors would still not meet the transient requirements when the microprocessor switches faster and faster. 5.3 IN DU ST RY IM PA CT CPES VRM technol-ogy impacted applications in microprocessors, servers, and tele- communications. 5: ACHIEVEMENTS At the request of Intel, in 1997, CPES established a mini-consortium, including In-tel, International Rectifier, National Semiconductor, Texas Instru- ments, STMicroelectronics and Delta, to address power management issues for future generations of microprocessors. The mini-consortium tapped interdisci- plinary experts from the member com- panies and from within CPES. Multi-phase buck Within six months, CPES research- ers quickly identified a possible solution to meet future challenges and proposed using multiple smaller converters, which are interleaved together and in parallel. The multi- phase buck converter technology could scale up for future needs by paralleling more circuits. There is no need to parallel semiconductor devices, which elimi- nates worries about current sharing. In addition to easy scalability, control algorithms could share current among the different converter modules. In addition, by phase-shifting and interleaving these mini-con- verters, we could cancel much of the ac current ripple on both the input and output. This reduces the induc- tor size, which speeds up the transient response and reduces the amount of capacitors needed. CPES 4-phase VRM Within a few months of developing the multi- phase buck, CPES developed a prototype of a 4-phase buck converter. Compared to existing practice at the time, the prototype improved power density by a fac- tor of 6, reduced the profile by a factor of 3, reduced the output cap by a factor of 10, reduced the output inductor by a factor of 10 and reduced the output ca- pacitor by a factor of 6. The transient response was in- creased 400 percent. The four-phase converter could deliver 2 V at the 30 A level, while the current practice was only able to deliver 2 V at 15 A. Birth of the 4-Phase VRM 5.4 IN DU ST RY IM PA CT This new multi-phase VRM has been adopted by the entire industry as standard practice and has evolved into a multi- billion-dollar market. All major IC companies have come up with integrated power semiconductor devices and controls to support the multi-phase concept. Today, every computer containing the Intel microprocessor uses the multi-phase VRM ap- proach developed at CPES CPES 10 YEAR PROGRESS REPORT 2010 Conventional industry standard VRM CPES 4-phase VRM The proposed multi-phase converter appeared to be considerably more complicated than the cur- rent practice, simply because it used multiple, iden- tical converters instead of a single converter. Once it was demonstrated how controllers could be integrated into a single chip, industry quickly adopted the con- cept and the multi-phase VRM approach became the industry standard. PRODUCTS THAT INCORPORATE CPES VRM TECHNOLOGY 5.5 INDUSTRY IM PACT Mutli-phase VRM technology has enabled U.S. industry to continue maintaining the leadership role in both technology and market position, and has enabled new job creation and job retention in the United States. Without this CPES technology, the U.S. power electronics industry would have lost its market position to overseas low-cost providers. 5: ACHIEVEMENTS COUPLED INDUCTOR Once CPES had developed integrated power technology and inte- grated controllers with current sensing, the team attacked the prob- lem of bulky magnetics. Problem: Each phase employs an energy storage inductor to per- form the needed power conversion. Inductors store energy as mag- netic fields and are large and expensive. For this application, a larger inductance is preferred for steady-state operation and to minimize current ripples. At the same time, a smaller inductor is preferred for faster transients, such as from “sleep mode” to “wake mode.” Solution: In 1999, CPES proposed a coupled-inductor concept that creates a nonlinear inductor and satisfies these conflicting require- ments providing a large inductance value during steady state and a small value during transient states. Until then, nonlinear inductors had not been feasible for such applications. When the inductors are coupled in a multi-phase buck converter, by virtue of magnetic cou- pling in the switching network, they behave like nonlinear inductors. The concept generated great interest in the field as a method that not only reduces magnetic size, but also improves the conversion efficiency and transient response. Result: a reduced footprint and lower costs. The picture below shows a two-phase coupled inductor, three- phase coupled inductor and a six-phase coupled inductor. 5.6 TWISTED CORE COUPLED INDUCTOR FOR THE MICROPROCESSOR VRM US patent 7,649,434 The coupled inductor was a big breakthrough, but it has a long winding path, which is not ideal for low-voltage, high-current appli- cations, such as microprocessors. To solve this issue, CPES developed the twisted core coupled inductor. Instead of wrapping a winding around a straight core, the twisted core keeps the winding straight and wraps the core around it. This minimizes the winding length and total inductor energy loss. Magnetic core Copper Two-phase N phase coupled inductor HIGH-DENSITY SWITCH-CAPACITOR VOLTAGE DIVIDER Problem: In two-stage systems, a buck was used as the first stage, creating unwanted bulk. Solution: A novel ultra-high power density voltage divider with a fixed conversion ratio eliminates the magnetic component and im- proves power density by an order of magnitude. The duty cycle is fixed at 50 percent and all voltages on the capacitors are near half of the input voltage. Two voltage sources can be in parallel if they have the same voltage level and no inductor is needed as a buffer. The voltage divider can achieve zero voltage switching turn-off and zero current switching turn-on for all switches, leading to very high efficiency. VRM & POL ADVANCES Although CPES developed the multi-phase coupled inductor for the public domain, Volterra and Advanced Energy (AE) patented their specific implementations and have licensed the technology to other firms. CPES has developed a second, alternative coupling implementation that dem- onstrates further performance improvement and does not conflict with the patents. Patents are pending. The coupled inductor concept quickly gained significant interest throughout the industry as a method that can not only reduce magnetic size, but also improve conversion efficiency and transient response, resulting in reduced footprint and cost. IN DU ST RY IM PA CT HIGH-EFFICIENCY SIGMA VR Patent pending Problem: Laptops and server farms require efficiencies greater than 90 percent, which is difficult for multi-phase buck technology. Solution: CPES developed a novel architecture composed of a tiny, regulated buck converter paired with an unregulated resonant dc- dc transformer. The inputs of the two converters are in series, while the outputs are in parallel. The dc-dc converter is always operated for highest efficiency while the output regulations are executed by the tiny regulated converter. A 96 percent overall efficiency has been demonstrated in a 400 kHz 200 V/12 V dc-dc design. At this point, the original VRM had been improved with multiphase, integrated magnetics, new topologies, and the sigma converter, but the microprocessor road map continued to impose challenges. As the current continued to increase, CPES began to look at a different system architecture. 5.7 CURRENT SENSING METHOD BY RC NETWORK US Patent 6,414,469 One of the major issues in paralleling a number of converters to- gether is insuring that the current is equally shared between the modules. Current sharing requires a method of current sensing, plus a controller. Sensing current is a tough issue and the conventional method of sensing the inductor current or switch current is not eas- ily implemented in a control IC. CPES proposed a unique technology for current sensing that uses a small RC network that emulates the current in the original converter circuit. The small RC network is easily incorporated into an IC. SELF-DRIVEN ZVS VRM US patent 6,859,372 CPES technology improves efficiency of high-frequency voltage regulators and eliminates the need for rectifier components. Problem: In conventional high-frequency 12 V input voltage regula- tors, the extreme duty cycle impairs efficiency and imposes obsta- cles for the transient response. Large gate driver loss and body diode conduction loss also raise crucial challenges. Solution: Switching loss is reduced with all the MOSFETs achieving zero voltage switching (ZVS). By adding a transformer, the proposed topology extends its duty cycle so that both switching loss and body diode reverse recovery loss are further reduced. Shown here: a 1U 1 MHz VRM for server applications has an 88 per- cent overall efficiency at 1.3 V/100 A output, which is about 5 per- cent higher efficiency than conventional technology. Since 2000, many firms, including Volterra, Intersil, Linear Technology, Texas Instruments and Enpirion, introduced products using this concept. Many integrated all the con- verter functions, while some, like Enpirion, included the magnetics and others excluded the passive components. Lateral Power IC for Monolithic Integration CPES sought more integration for the multi-phase VR and developed lateral power ICs that could integrate the power device, control device, driver and control IC in one structure (see p. 5.36). RC network current sensing was quickly adopted by industry and is referred to as the DCR current sensing method. INTERMEDIATE BUS CONVERTERS To further improve the two-stage architecture, CPES developed sev- eral high-density Intermediate Bus Converter (IBC) topologies. The CPES IBC topologies no longer require the energy storage inductors of commercially available bus converter configurations. Also, with the switch semiconductor device on both the primary and second- ary sides operating at zero voltage and near zero-current switching condition, switching losses are minimized. In addition, there is al- most no body diode loss in the similar synchronous rectification on the output stage. Prototype hardware demonstrated 500 W output power in a quarter brick size. Power density is two to three times higher than current industry practice. SINGLE-STAGE VS. TWO-STAGE FOR 12 V VRM US Patent 7,071,660 Problem: State-of-the-art VR design is based on the single-stage, multi-phase buck converter, operating at around 300 kHz at a de- signed bandwidth around 50 kHz. To reduce the output capacitance, the switching frequency should be increased. For single-stage bucks, however, the efficiency drops as switching frequencies are raised. Solution: VR efficiency can be improved if the input voltage is op- erated at a low level. CPES took advantage of this observation and developed a two-stage approach. The first stage is designed at a relatively low switching frequency to step down the input voltage from 12 V to around 6 V. With the lower input voltage, the switching loss of the second stage, which is proportional to the input voltage, is dramatically reduced — thus yielding higher efficiency at even higher switching frequencies. This two-stage design can eliminate the bulky capacitors while satisfying the transient response require- ment with a total cost reduction of about 30 percent. TWO-STAGE ARCHITECTURE FOR INTEL ITANIUM US Patent 7,254,047 Intel sought VRM solutions that could be used to power the Itanium processor, which is used in high-end computer servers. The Itanium consumes much power and current and takes a 48 V input and a converter 1 V output. The VRM, called the Power Pod at that time, was highly custom-designed and Intel sought a lower cost, high density, high performance solution. CPES proposed replacing the Power Pod with a novel two-stage approach using a bus converter to serve as a dc-dc transformer to convert 48 V to an intermediate voltage, perhaps 12 V. A multi-phase buck converter would serve as a non-isolated point-of-load voltage regulator converting the 12 V to 1.2 V or the required voltage. The two-stage power step-down, with the first stage employing a standard modular converter, showed promise for server applications. The first stage is a 5-7 V conversion and the second stage operates at much higher frequency, such as a 4 MHz multi-phase VRM. By plac- ing the second stage directly on or very close to the Olga board or LGA board, CPES demonstrated greatly reduced impedance. This re- sults in significant reduction in capacitors and unwanted parasitic impedances. Shown here, a 2-stage approach evaluated by Intel for server appli- cations. 5.8 Celestica 1-stage L=1uH, C=16mF CPES 2-stage L=150nH, C=1mF 94% reduction in output capacitors & 60% reduction in size Telecommunications Point-of-Load The two-stage concept was quickly adopted for telecom- munications point of load converters. Industry figures indicate that this practice saves 25 percent of the cost of switchboards, in addition to the efficiency and perfor- mance improvements. The telecommunication point of load converters have a potential market size even greater than VRM. + Bus Converter: 48 V to 12 V Point-of-load Buck 12V to 1~2 V A $1 BILLION INDUSTRY!Although a significant benefit was demon- strated, this 2-stage concept was not adopted for powering the microprocessors for server applications 5.9 TWO-STAGE POWER ARCHITECTURE FOR LAPTOPS Problem: The next challenging application for the two-stage con- cept is laptops. Laptops work within a wide range of voltages – from 8.7 V to about 19 V. To meet battery efficiency requirements, voltage regulators can only run at 200-300 kHz switching frequency. The low operating frequency typically meant the use of bulky output induc- tors and numerous output capacitors, leading to low power density and high cost. Solution: Applying a special two-stage architecture, laptops can operate at low power and still improve efficiency. If all the voltage regulators share the same first stage, the thermal design power can be as low as 70 W. For high power density, the first stage employs a switching-capacitor voltage divider with 2000 W/in3 power density and 98 percent efficiency. LIGHT LOAD EFFICIENCY ENHANCEMENT FOR LAPTOP US Patent 7,161,335 Problem: About 90 percent of the time, a laptop CPU is in various stages of “sleep mode” to save power consumption. By improving this light-load efficiency, 50 percent of the computer’s energy con- sumption can be saved. Solution: CPES applied the two-stage power architecture and in- novative control strategies that prolong battery life up to 10 percent. In this strategy, the number of working phases of the second stage is dynamically adjusted with the load current, the intermediate bus voltage is adaptively controlled at the optimum voltage points that correspond to different load currents, and the switching frequency of the second stage is reduced proportionally with the load current. LDO I/O power Keep alive CPUMain Power Graphics DDR LCD CPES 10 YEAR PROGRESS REPORT 2010 Intel adopted a power management structure called extended battery life (EBL) as an industry standard for future laptop computers. This structure is similar to what CPES proposed. The two-stage power management solution for laptops has become a strong coalition force as Intel continues pushing mobile computing technology. Intel has specified the strategy of shaping phases according to the load condition as the standard power management for its mobile microprocessors. The phase shading strategy is now broadly used in all microprocessor products. INDUSTRY IM PACT 5: ACHIEVEMENTS MODELING OF CONSTANT ON-TIME CONTROL (V2 TYPE) A constant on-time current mode control is widely used in power converters. There is typically no instability issue for the current loop, however, this changes when the equivalent series resistance (ESR) of the capacitors is used as the sensing resistor. Capacitor ripple, which can result in sub-harmonic oscillation, must be considered. CPES developed a describing function method to model this effect. The model shows that there are double poles a half switching frequency and that capacitor parameters will change the position of the poles, creating instability issues in the loop. 5.10 Today, many highly integrated products use the lateral integration technology proposed by CPES more than a decade ago. More re- cently, industry has started integrating magnetics with silicon. This is a significant challenge because magnetics are usually bulky, while silicon is small. Using the CPES “power supply-on-a-chip” concept, these products operate for very low-power applications, such as 1-2 W or less. CPES is actively working on such integration at power levels greater than 10 W. CPES developed a novel packaging technology called “stacked power” that allows for low-voltage active devices to be embedded inside a ceramic layer of high thermal conductivity. This vertical integration frees up the top and bottom sides for the in- tegration of other circuit parts allowing for layout with low circuit parasitics – an efficient high-frequency operation. High operating frequency reduces the size of the passive components needed, thus increasing power density. The stacked layers are made using direct bonded copper, which inte- grates the thermal management. This eliminates the need for a heat sink, yet only very modest airflow is necessary. The passives are integrated with the active layer by means of low-temperature co-fired ceramic, a technology that enables the integration of low- profile inductors with high current capabilities. We believe this technology is scalable to higher power applications. PREDICTING LARGE BEAT-FREQUENCY OSCILLATIONS CPES developed a multi-frequency model that incorporates an ad- ditional modulation signal centered on the switching frequency. This incorporates a side-band effect, helping the model predict both the magnitude and phase with accuracy close to the switching fre- quency. Using this model, we identified a problem in beat-frequency oscil- lations that explained a blue-screen issue Intel was experiencing. In some applications, such as video games, the battery can run fast and the sleep-wakeup frequency can be pushed such a high level that the protection circuit is triggered. The output voltage waveform does not see this beat-frequency oscillation and conventional aver- aging models cannot be used, because there is no information on this frequency component in the typical models. M OD EL IN G A COMPLETE 3D INTEGRATION OF POWER SUPPLY FOR NON-ISOLATED POINT-OF-LOAD APPLICATIONS EXTENDING UP TO 30 W Power Management Consortium (PMC) Early work on the multi-phase VRM was made possible by a combination of CPES researchers and industry partners. Their results have spawned a billion-dollar industry. The group has grown from six partners to 20 and been renamed the Power Management Consortium. PMC Goals The PMC seeks to improve the power management of computers, servers, and portable electronics. The goal is to make power man- agement more cost-effective, more energy efficient and to have a higher power density. (See p. 6.28) AcBel Polytech, Inc Analog Devices Crane Aeorospace & Electronics Delta Electronics Emerson Network Power FSP Group Hipro Electronics Infineon Technologies International Rectifier Intersil Corporation Linear Technologies Lite-On Technology Corp. Monolithic Power Systems Murata Power Solutions National Semiconductor NXP Semiconductors Richtek Technology Corp. Primarion Renasas Technology Texas Instruments INDUSTRY IM PACT CPES 10 YEAR PROGRESS REPORT 2010 Integrated Power Conversion Systems The growing need for a highly reliable supply of electrical energy for critical applications, such as hospitals, telecommunications, Internet in-frastructure, the semiconductor industry, de- fense, and homeland security, is spawning the develop- ment of very complex local power distribution systems and massive use of power electronics converters. The next generation vehicular electrical systems for land, sea, air, and space vehicles have very similar structures. Additionally, all of the emerging energy sources must be interfaced to the existing power systems through power electronics converters due to their very different dynamic characteristics. One of the major efforts and successes of CPES has been applying an integrated system approach to the design of these electric energy processing systems. Impacting systems of all sizes This thrust has focused on developing concepts for integrated electronic power distribution systems that can impact applications from computer servers to data centers, from cars to airplanes and ships, and from homes to distributed energy sources. We envision a future in which all power flows will be electronically controlled by using separate source converters, power distribution converters, and load converters. Interactions and trade-offs Before this vision becomes reality, we must un- derstand and quantify the complex interactions and trade-offs that develop in power systems with wide- spread use of power electronics converters. Moreover, we must change from conventional high-cost, low effi- ciency and low reliability converters to affordable, reli- able, efficient devices. CPES has been tackling these challenges through four efforts: electronic power distribution system ar- chitecture and design; power management and con- trol, high-density converter integration, and electro- magnetic interference (EMI) modeling, analysis, and management. This section discusses achievements in the first two efforts. Low power to high power CPES has applied the integrated system approach at all power levels. The highly successful CPES volt- age regulator module (VRM) technology is being used for microprocessor, server, and telecommunications applications. This low-power technology is discussed in the previous section. Concurrently with VRM re- search, the Center made inroads in smaller, lower-cost, more efficient, and faster power processing for mid- power and high-power applications. 5.11 A major goal of CPES is to promote the use of IPEM technol- ogy in different power ranges and applications. 10-100 W IPEMs 1-10 kW IPEMs 10 kW-10 MW IPEMsIN DU ST RY IM PA CT 5: ACHIEVEMENTS Key advances in integrated power conversion systems 5.12 MHZ HIGH EFFICIENCY HIGH POWER DENSITY LLC RESONANT CONVERTERS WITH SR Problem: Performance per watt requirements are driving higher energy efficiency metrics in server and telecom equipment designs for both idle and active power states – and increasing the overall efficiency of power delivery systems. Unfortunately, bulky capacitors are needed to provide the energy during hold-up time. Solution: CPES demonstrated that a wide operating range dc-dc converter can reduce the holdup time capacitance and, therefore, the size and cost of the capacitors. Our MHz LLC resonant converter technology can achieve very high switching efficiency and a very wide input voltage operation range. Result: high efficiency and high power density. 1 kW, 1 MHz, 400 V/48 V, LLC Resonant Converter with Synchronous Rectifiers Power density: 96 W/in3 IN DU ST RY IM PA CT 10-100 W IPEMs IR Philips On Semi Intersil Linear Tech TI Renesas NSC Power One Infineon ST Maxim Micrel Volterra Primarion Fairchild Analog 1-10 kW IPEMs ABB Hitachi IXYS Toshiba Semikron Fuji Infineon Eupec Powerex 10 kW IPEMs ABB Bettis Thales ACI Northrop Grumman Rockwell Automation General Dynamics Alstom PEMCO TVA CPES 10 YEAR PROGRESS REPORT 2010 5.13 NOVEL MULTI-ELEMENT RESONANT CONVERTERS Patent Pending Problem: LLC resonant converters are gradually being adopted for the high efficiency and high frequency capabilities. There are still issues to be resolved before they can achieve their full promise. Conventional res- onant converters have some inherent problems, such as higher circulat- ing energy than their PWM counterparts. This problem reduces power conversion efficiency and reduces the over current protection that is needed during overload and short-circuit conditions. Solution: CPES developed a novel, multi-element resonant converter that can achieve natural overload, startup and short output protection and significantly reduces circulating energy. The CPES topology can achieve zero voltage switching over all load ranges. Moreover, the sec- ondary side rectifiers can achieve zero current switching. Result: Extremely low switching loss. Plus, the voltage gain can be de- signed high to achieve holdup time operation without impacting ef- ficiency at nominal conditions. A NOVEL DRIVING SCHEME OF SYNCHRONOUS RECTIFIERS SUITABLE FOR LLC RESONANT CONVERTERS Problem: Optimizing the rectifier stage is an ideal way to gain efficiency improvements in resonant converters. One method is to replace diodes with synchronous rectifiers that feature a lower voltage drop. However, unlike the PWM converter, the turn-on time of a synchronous rectifier and the turn-on time of primary side switches are not exactly in phase for resonant converters and typically do not use the same driving signal. Solution: CPES developed a novel driving scheme that utilizes the drain-to-source voltage of the synchronous rectifier. The synchronous rectifier can then be switched close to the zero current transition. How- ever, accuracy is affected by package inductance, leading to reduced synchronous rectifier conduction time. CPES uses an active phase com- pensation network that allows the generated voltage to exactly reflect the conduction period of the synchronous rectifier. Result: Much higher efficiency. HIGH-VOLTAGE FRONT-END DC-DC CONVERTER FOR DISTRIBUTED POWER Problem: Currently, the front-end of distributed power systems is re- alized by a highly customized design with multiple outputs using the PWM converter technologies. These topologies suffer significantly, with poor efficiency due to hold-up time requirements. Solution: Encouraged by the success of the 48 V, two-stage architec- ture for servers and telecom applications (see p. 5.8), CPES is investigat- ing 400 V to 48/12 V converters for higher power applications. This new generation of converter is based on the LLC-type of resonant converter topology. CPES has successfully demonstrated a 1 kW LLC resonant converter operating a 1 MHz, with efficiency approaching 96 percent and power density of 116 W/in3. VD Vgate VS Signal process MULTI-CHANNEL INTERLEAVED PFC In high-power applications, devices are paralleled in order to handle the high current stress. CPES developed a technology that harnesses current sharing and parallels the converters instead of the devices. The concept also employs interleaved phases. The multi-channel interleaved power factor correction (PFC) technology reduces both the input and output current ripple due to the ripple current cancellation effect. The reduced output ripple current will extend capacitor lifetime because less heat will be generated. The reduced input ripple current will lower the differential EMI noise, allowing a smaller EMI filter, as well as significantly improving the light-load efficiency. INDUSTRY IM PACT The efficiency and power density of the CPES high-voltage front- end dc-dc converter are significantly better than the state-of- the-art industry practice. Companies such as Intel, IBM, and HP are pushing the change of distributed power architecture to a more simplified approach. 5: ACHIEVEMENTS5.14 Power Electronics Building Block (PEBB) is a broad concept that incor- porates individually or collectively progressive integration of power devices, gate drives, and other components to functional blocks for multiple applications resulting in reduced cost, losses, weight and size, and engineering effort for the application of power electronics. By integration into building blocks, a designer addresses device stresses, switching speed, losses and thermal management, etc., cre- ating a block taking into consideration stray inductances and capaci- tances, with functional specifications that relate to the performance requirements of intended broad set of applications. Adoption of functional building block(s) that can be used for multiple applica- tions results in high volume production, and reduced engineering effort, design testing, on-site installation, and maintenance work for specific customer applications. Supported by the Office of Naval Research (ONR), CPES pioneered work in developing advanced PEBB technology. A three-level, neu- tral-point clamped (NPC) phase-leg PEBB was the first to operate at 20 kHz switching frequency and 80 kW power level due to the use of advanced soft-switching technologies developed at CPES. This PEBB was demonstrated in an experimental 250 kW superconductive magnetic storage system (SMES) to evaluate possible applications for ships and electric grid stabilization. Next generation smart PEBBs developed at CPES allowed for simpler integration and self configuration of power electronics converters, combining the intelligence and high efficiency of the soft-switched phase leg into a 33 kW ZV-ZCT smart PEBB. 33 kW ZV-ZCT PEBB80 kW 3-level NPC - PEBB 30 kW PEBB POWER ELECTRONICS BUILDING BLOCK High-power advances POWER ELECTRONICS BUILDING BLOCK (PEBB) AND SYSTEM INTEGRATION Virginia Tech F.C. Lee D. Boroyevich, J. Lai RPI & Virginia Tech T.P. Chow A. Huang UW T. A. Lipo Advanced Power Semiconductory Devices PEBB-Based Inverter for Motor Drive Flexible System IntegrationPE BB PEBB ideas and technologies developed at CPES formed the technical basis for the Working Group within the IEEE Power and Energy Society that developed the guide to Power Electronic Building Blocks concepts. Industrial participants in the working group were highly influenced by CPES, as these ideas were transferred to them via working group interactions. Participating companies included ABB, L-3 Communications, Raytheon, Siemens, and others. IN DU ST RY IM PA CT 5.15 UNIVERSAL CONTROLLER In an effort to standardize all control platforms in future generation Navy more-electric ships, CPES developed a digital universal control- ler. The brainchild of both ONR and CPES, the controller incorporates a hardware manager with an application manager that enables use by system engineers without specialized expertise. The controller is a digital board that communicates with any power stage through just two serial fiber-optic rings. It features a hybrid DSP/ FPGA digital architecture, allowing for fast implementation of appli- cation-level controls in the DSP, while implementing all main power electronics-specific functions on the FPGA. The controller is based on a distributed-control architecture for modular power electronics systems, featuring completely decoupled system-level control functions in the DSP-based application control and FPGA-based PEBB systems. CPES developed a “black-box” modeling approach for designing new power electronics-based electric energy distribution systems. The new method diverges from the conventional “white-box” approach, which requires detailed knowledge of the converter structure and parameters. However, the growing use of power electronics in distribution systems has made design more complicated: the size and complexity of future sys- tems alone make white-box modeling difficult. Another complication is that converters are commercially available from numer- ous different vendors, who provide little or no information about the internal structure of their products. The CPES approach is based entirely on the terminal characteristics of power converters, using a simple set of small-signal measurements to construct the low-frequency model without requiring any knowledge of the converter structure or any of its internal parameters. Called the black-box modular-terminal-behavioral modeling methodology, the model captures the information without neglecting parasitics or simpli- fying the converter internal operation, as is common with conventional reduced-order models. The CPES approach is modular, enabling com- putationally efficient analysis of all electrical phenomena in the system. LOW-FREQUENCY BLACK-BOX MODULAR-TERMINAL BEHAVIORAL MODELING M ODELING During the ONR work, CPES developed numerous PEBB-based power electronics conversions systems to explore different topologies, soft- and hard-commutation techniques, control architectures, trade-offs between semiconductor and passive devices, and – most important – the functional, spatial, and temporal partitioning of PEBB-based systems. Ultimately, CPES developed a two-dimensional hierarchical reference model for analysis and design of power electronics systems, covering not only electromagnetic, thermal, and mechanical interactions from semiconductors up to complete power systems, but also their associ- ated controls, modeling, and communications at every level of the hier- archy. The model verified the capabilities and flexibility of the standard- cell approach power electronics. STANDARD-CELL, OPEN-ARCHITECTURE POWER CONVERSION SYSTEMS The modular high voltage power systems, and the control and analysis techniques that CPES developed for the more-electric naval ships, have applications in many other areas, including aircraft, land vehicles, and power distribution systems. PEBB ideas and technologies developed at CPES formed the technical basis for the development of IEEE Standards P1676, “Control Architec- ture for High Power Electronics (1 MW and greater) used in Electric Power Transmission and Distribution Systems.” Industrial participants in the working group were impacted by CPES via technology transfer. Participating companies included ABB, L-3 Communications, General Atomics, General Electric, Hydro Quebec, and others. EMITTER TURN-OFF THYRISTOR CPES developed the world’s highest power handling solid-state switch, which can turn off 4,000 A in less than 5 microseconds, while block- ing up to 4,500 V. The Emitter Turn-off Thyristor (ETO) can withstand 16 MW of instantaneous power and can handle a peak current of 10,000 A and continuous current of 1,500 A. During the transition, it handles both high current and high voltage simultaneously. ETO integrates low- cost GTO devices with low voltage power MOSFETs in a low inductance housing, leading to low cost and high reliability. It was developed with funding from DOE’s Energy Storage Program managed by Sandia Na- tional Laboratories. The Tennessee Valley Authority also provid- ed significant fund- ing and the American Competitiveness In- stitute worked with CPES on the manu- facturing process. 5.16 ETO received an R&D 100 Award and has been licensed to Solitronics. This technology has the highest potential to affect power electronic applications in the electric power grid. The ideas and technologies generated from CPES high power research have led to the establish- ment of The Future Renewable Electric Energy Delivery and Manage- ment (FREEDM) Systems Center, an NSF ERC led by former CPES faculty member, Alex Huang, at North Carolina State University. AIRCRAFT ELECTRIC SERVICE STATION In 1995, CPES developed the three-dimensional space-vector modula- tion concept. Three years later, a prototype system based on the con- cept was demonstrated. By 2001, the technology was commercialized by Northrop Grumman in an aircraft electric service station and in 2002, the technology was installed aboard an aircraft carrier built at Newport News Shipbuilding. With funding from ONR, the new technology en- ables reduced size of the electric equipment and improved stability of the electrical power systems on ships. CONCEPTS 1995 TECHNOLOGY 1998 PRODUCT 2001 DEPLOYMENT 2002 PEBB ideas and technologies developed at CPES formed the technical basis for the development of IEEE Standards P 1662 & 1709, “Recom- mended Practice for 1 to 35 kV Medium Voltage DC Power Systems on Ships.” Industrial participants in the working group were impacted by CPES via technology transfer. Participating companies included ABB, L-3 Communications, General Atomics, Northrop Grumman, Raytheon, and others. ADVANCED HIGH POWER CONVERSION SYSTEMS FOR EMALS/EARS Propulsion and actuation systems for marine applications are a grow- ing area in high-power, multi-megawatt power electronics systems. A CPES team, including Principal Member Rockwell Science Center, inves- tigated various topologies for a reliable, 200 MW linear motor and IPEM- based power conversion system for electromagnetic aircraft launch and recovery. We developed various plug-and-play strategies that can be used in a modular fashion for high power converters for traction, propulsion, and utility functions. We identified the dc-link capacitors as the key bottleneck and developed modulation strategies that minimize their size. Next step: advanced motor topologies that employ supercon- ducting systems. Electro-magnetic aircraft launch system (EMALS) concept 5.17 THALIPEM With sponsorship from Thales Avionics Electrical Systems (France), CPES developed a 60 kW, three-phase IPEM called THALIPEM. This high- power IPEM is an ultra-high reliability three-phase power conversion module for use on board commercial aircraft. The system is capable of operating from different fixed- and variable-frequency ac and dc volt- age networks, in both ac-dc and dc-ac modes, and in parallel for higher power applications. CPES followed a reliability-orient- ed strategy and replaced alumi- num electrolytic capacitors with film capacitors, increasing the lifetime of the converter 400 per- cent. We also employed FPGA/ DSP-based digital controls, en- abling application-specific con- trol algorithms for the required system flexibility. THALIPEM is an ideal example of the standardiza- tion, flexibility and simpler opera- tion and maintenance provided by the IPEM/PEBB concept. HIGH VOLTAGE DISTRIBUTED PULSE POWER SYSTEM CPES developed high-voltage, distributed-power technology so a standard battery system can provide enough instantaneous energy for the pulse power system to generate extremely intense electric or magnetic fields. The high-frequency resonant technology dramati- cally reduces the weight and volume of the system. The pulse power system uses an intense electrical discharge to cre- ate a powerful, pulsed electric field and magnetic field. Electric fields can be used to accelerate charged particles, which in general lead to thermal, chemical, mechanical or break-down effects. Magnetic fields together with electric fields transfer energy as electromagnetic waves; X-rays and microwaves for medical and military applications are typical examples. Using a pulsed power system, the CPES tech- nology converts 24 V battery input to charge the load to 10 kV, which is more than 410 times higher than the input. The system takes five to 10 seconds to recharge the load for respective events. In each charging cycle, 100 kJ of energy is delivered in a two-stage step-up. First, front-end converters boost voltage to 600 V, then load convert- ers raise the voltage to 10 kV. The front-end converters use a high-frequency, soft-switching tech- nique and a newly developed, amorphous magnetic material. Power density is 45 W/in3 with 91.3 percent efficiency and the switching frequency of 200 kHz is two-to-four times higher than state of the art. The amorphous material helps cut the magnetic size by 80 per- cent of conventional transformers. The load converter also achieves greater than 90 percent efficiency and 35 W/in3 power density. DIGITAL GENERATOR CONTROL UNIT Although digital control has been common in most power electronics applications, its application for military and commercial aircraft is rela- tively recent. Aircraft designers are increasingly incorporating power electronics systems to reduce weight and maintenance, while increas- ing the reliability of secondary power systems — formerly mechanical, pneumatic and hydraulic systems. Sponsored by Thales Avionics Electri- cal Systems, CPES developed a digital generator control unit (GCU) for high-speed aircraft generators. The project validated the advantages of digital control and all new GCUs are expected to employ digital control. CPES 10 YEAR PROGRESS REPORT 2010 In November 2006, CPES conducted a seven-day technology demonstration at the Thales Avionics Electrical Systems (TAES) facilities in Chatou, France. The THALPEM power converter, digital control of permanent magnet electrical machines, advanced minimum-loss space vector modulation and deadtime compensation strategies were all part of the technology transfer event. INDUSTRY IM PACT 5: ACHIEVEMENTS The Boeing Company has been involved with CPES on high-power energy conversion projects related to the “more electric aircraft” and improvements in stability, safety and reliability. Through additional sponsored research projects, CPES has impacted aerospace firms including SAFRAN (France), Rolls- Royce (UK), Northrop Grumman, and United Tech- nologies/Hamilton Sundstrand (USA). INDUSTRY IM PACT 5.18 TESTBED FOR SUSTAINABLE POWER SYSTEMS CPES developed a flexible, autonomous hybrid power system tes- tbed for future nano-grid applications that can demonstrate how power electronics can help save energy, protect the environment and improve people’s lives. The testbed incorporates renewable sources, power converter-based loads, and a grid-interfaced, con- trollable distribution network. The testbed is a self-contained, 3 kW, autonomous hybrid power system for data communications in remote locations. It is designed to provide uninterrupted energy supply to the data servers and air- conditioning as electrical loads. It is also a scaled-down, generic elec- tronic power distribution system that can demonstrate applications such as future homes, hybrid electric cars, aircraft, and ships. The testbed includes a solar photovoltaic source simulator, a wind turbine, and an ac grid con- nection as energy sources. Lead-acid batteries, a battery charger, ac transfer switch, dc- ac inverter, and mixed ac-dc power distribution with com- puter-controlled measurement and supervision comprise the energy management system. This has led to the formulation of the CPES Sustainable Build- ing Initiative, as described in Chapter 6. The experimental electric power system testbed is a 3 kW autonomous hybrid power system for studying emerging electric systems in data centers, sustainable homes, ships, aircraft and hybrid electric cars. SUSTAINABLE POWER SYSTEMS $225 billion projected market The renewable energy technology market was almost $60 billion in 2006 and is projected to grow to $225 bil- lion by 2016. The potential impact of sustainable power systems has led CPES to formulate the SBI initiative. SYSTEM STABILITY AND ANALYSIS In a project starting in 2004 and funded by The Boeing Company, CPES has developed design criteria and analysis tools for integrating ac and dc distributed power electronics conversion systems for the stable, safe, and reliable operation of future aircraft electrical power systems. These systems combine numerous and different types of power converters, which when interconnected can easily interact with each other if no precautionary measures are taken. These inter- actions can lead to instabilities and system faults. Therefore, it is im- portant to study the operation of the system carefully as part of its design process. As a demonstration testbed, CPES modeled a large electrical distribution system where it addressed the actual model implementation several com- ponents. CPES also evaluat- ed the testbed correct op- eration by means of Lyapunov’s indirect method — local as- sessment of large signal stability, study- ing as well the effect of faults in the sys- tem providing in- sight into the choice of models for the studies conducted. ADVANCED MOTOR CONTROLLER DEVELOPMENT The CPES universities are currently developing motor drives for next- generation aircraft. The project, sponsored by Boeing, is pushing mo- tor drive technology into high-density, lightweight converters and electrical machines capable of operating under harsh environmental conditions and high temperatures (200- 300° C). The team is identifying key technologies, barriers, and needed breakthroughs that will enable the “more electric aircraft” vision. We are also developing mod- els, modeling tools, and design guidelines that can eventually be transferred to future commercial projects. CPES 10 YEAR PROGRESS REPORT 2010 Integrated Motor Drive Systems Electric motors consume more than 50 per-cent of all electricity. We are developing the technology for economically viable adjust-able-speed motor drives that integrates the necessary power electronics with a minimal impact on size, weight, and robustness. The long-term goal is to develop adjustable-speed electric motors that display little apparent evidence of the drive electronics pack- aged internally. These motors must have performance, cost, and reliability characteristics that approach or ex- ceed those of conventional motors today, while deliv- ering the power, cost, and environmental savings that adjustable-speed drives promise. Several major technical challenges must be over- come to achieve these goals: 1. Successful adoption of integrated motor drives requires that they be both reliable and low cost. The need for reliability also requires a robust method for interconnecting IPEMs with each other and with the power terminals. 2. Heat from the motor and from power losses in the packaged drives imposes a harsh thermal environ- ment for the electronic drives. 3. The modularization of power converter, mo- tor, and controller creates challenges to efficiency that must be overcome by proper partitioning into mod- ules. 4. The packaging of multiple power electronics circuits inside a single IPEM creates problems with electromagnetic interference. CPES made great strides towards these goals with advances in low-frequency IPEMs, motor drives and integration, and control and sensor technology. Control and Sensor Integration The CPES benchmarking study conducted soon after the creation of the Center identified control and sensor integration as a key step to solve two problems in power electronics: thermal-mechanical failures, which were the principal reliability problem, and the cost of current sensing, which was the most costly sin- gle component. CPES set out to intelligently integrate current and temperature sensors and active controls into power electronics, with the goal of significantly improving both functionality and reliability, while re- ducing costs at the same time. Low-Frequency IPEMs Motor drives, as well as other applications, require active IPEMs with switching frequencies of 20 kHz or less. CPES has sought to develop new features and packaging technologies. This research can be divided into two main channels. On the one hand, CPES built and tested motor drive IPEMs using cutting-edge tech- nologies. On the other hand, CPES developed many of these cutting edge technologies, including a new phase-leg topology, control techniques for di/dt and dv/dt, and a prototype phase-leg capable of operating at up to 175° C. 5.19 5: ACHIEVEMENTS INTEGRATED CURRENT SENSING Current sensors were the most costly individual component in conventional motor drive designs, and they did not lend themselves to easy in- tegration. CPES investigated the technology to find a suit- able alternative that could be easily integrated in an IPEM and reduce costs, and selected giant magneto-re- sistive (GMR) current sensors as the best suited to fabrication and integration in semiconductors. Finite element analysis identified regions with >1 MHz flat magni- tude bandwidth that would allow zero phase-lag current sensing in an integrated module. The design involved a flex-mounted GMR placed to sense the current running in the direct-bonded copper layer below the flex. 5.20 CONTROL AND SENSOR INTEGRATION INTEGRATED MULTI-POINT CURRENT SENSING The integration of power devices into the usual 3-phase modules requires multi-point current sensing. An inexpensive array of GMR detectors is able to make measurements of the current of different conductors in a single IPEM, without traditional magnetic shielding. The cross-coupled signals interact deterministically, and so can be decoupled and separated into the original individual waveforms. This technology is also suitable for isolating and measuring external fields, allowing bias field compensations as well as obtaining mag- net position information for motors. INTEGRATED GMR-BASED INTERCONNECT TEMPERATURE SENSING GMR field detectors have a high sensitivity to temperature, and were identified as suitable for integrated interconnect temperature sens- ing to improve active thermal mechanical control. Current source excitation allows a GMR bridge circuit to separate temperature and current signals with no additional terminals or interconnections. As a GMR device would already be placed over the interconnect, rather than the silicon die, it permits use of a transient thermal model that is a key element in the thermal-mechanical strain controller. Axis of Sensitivity Output Trace on DBC Sensed Current GMR field detection -DC+DC Output A Gate Signals GMR GMR Output B Gate SignalsThermal Strips CPES 10 YEAR PROGRESS REPORT 2010 5.21 INTEGRATED GMR-BASED JUNCTION TEMPERATURE SENSING Since junction temperature affects forward voltage drop and dissi- pation, estimation of it is necessary to manage the device. A high frequency turn-on signal “ringing” occurs in current and voltage for hard-switching circuits, and it decays in accordance with the dissi- pation that results from the junction temperature. Combined with knowledge of the switching time, the ringing can be determined by a GMR field detector array without needing any other detectors. This method allows a very high level of multi-functionality when com- bined with multi-physics, finite element analysis. CPES continues to develop models to improve our ability to use this ringing signal for robust temperature sensing. INTEGRATED PILOT CELL CURRENT SENSING AND CURRENT REGULATED CONVERTERS High-performance current control for IGBTs and MOSFETs requires the estimation of total device current and reconstruction of the phase current. CPES explored two alternative approaches for using pilot current sensors to divert a small fraction of the main current to provide a high-fidelity measurement from within the device itself. The first approach involved new designs for power semiconductor devices that would integrate pilot current sensors. One design inte- grated pilot sensors into the free-wheeling diodes, in addition to the IGBT switches, providing more complete current feedback informa- tion. The other approach improved the robustness of reconstruction methods to enable pilot sensors to be used in high-performance control. The new algo- rithms allow high-qual- ity current regulation of both field-oriented induction machines and permanent mag- net synchronous ma- chines, even if only three IGBTs in the low- er leg of the inverter phase are equipped with pilot sensors. View of Pilot Cells in a PT IGBT ACTIVE TEMPERATURE CONTROL TO MAXIMIZE RELIABILITY AND DEVICE UTILIZATION A key factor in rating all power conversion devices is thermal limits. As the mean and delta temperatures rise, the life of a power semi- conductor grows shorter. Since power devices have very fast time constants, control of temperature is critical. CPES developed active thermal control of the switching frequency and current limit that enables control of the mean device tempera- ture and the delta temperature through manipulation of loss terms in the power device. The ultimate goal is to control reliability, while allowing full thermal device capability. VALIDATING THERMAL-MECHANICAL STRAIN FOR ACTIVE TEMPERATURE CONTROL Power devices fail from thermally-induced mechanical strain and CPES made significant progress in understanding the relationship between mechanical strain and temperature. Researchers analyzed the temperature-strain relationship by using near infrared reflection photoelasticity to measure the strain in-situ during normal IGBT switching operation. The results permitted the calibration of finite element analysis of the strain and demonstrated that junction or interconnect temperature measurement provides a valid basis for effective thermal-mechanical strain control. The GMR current, inter- connect, and junction temperature sensing methods were shown to be sufficient for the needs of thermal observation and control. FEA NIR Comparison of FEA calculated strain and NIR measured strain RELATIVE JUNCTION TEMPERATURE CONTROL FOR THERMAL-BASED LOAD SHARING CPES integrated current and temperature sensing into a controller for parallel devices, in order to allow load sharing between them while maintaining an acceptable overall mean temperature. The controller utilized a vir- tual heat sink to enable the parallel devices to increase or decrease in junction or mean temperatures while maintaining homogeneous temperatures. Interleaved switching allows a GMR to assess individual junction temperatures using an indi- vidualized ringing signal. Relative temperature control based on a “virtual heat sink” THREE-PHASE UNIPOLAR INDUCTION MOTOR DRIVE WITH THREE SWITCHES (2001) CPES developed a three-switch inverter configuration for three- phase motor drives – a significant reduction from the conventional six-switch configuration. The system achieves full speed control at a low comparative cost, while maintaining good efficiency. The new configuration requires only minor modifications to the stator windings of a standard three-phase induction drive. The phase b winding is magnet- ically reversed and connected with parallel windings. All three phase currents are unidirection- al, and each includes a funda- mental component plus dc and triplen harmonics. SINGLE PHASE MOTOR DRIVE WITH REDUCED SWITCH COUNT (2000) To lower the cost of adjustable-speed drives, CPES developed a new inverter topology that reduces the required number of power semi- conductor switches from six to two. The technology allows standard single-phase induction motor drives, such as those that are inexpen- sively produced for fixed-speed HVAC blowers and compressors, to be equipped with the circuitry to act as adjustable-speed drives. The switch current is rated at about 50 percent of the machine current, which helps lower cost. At the rated speed and power, the inverter leg excites only the auxiliary winding of the induction machine, with the main winding directly connected to the 60 Hz utility line. At re- duced speed, the inverter leg excites both main and auxiliary wind- ing at lower frequency, with an ac capacitor connected in series. CPES also developed an alternate topology that, while using six semiconductor switches, eliminates the need for a bulky inductor (used in the boost chopper) by using pulse-width modulation of the inverter switches to maintain control. The control algorithm makes possible the use of a three-phase inverter to generate a two-phase voltage with a 90-degree phase shift between the two phases, and an arbitrary amplitude ratio. A voltage doubler provides the required voltage, which goes up to about 600  V dc, while using fewer com- ponents than the boost converter. MOTOR DRIVE SYSTEMS 5: ACHIEVEMENTS5.22 Prototype packaged drive Drive power circuit topology Calculated Current Waveforms CPES aimed to develop low-cost adjustable-speed motor drives as energy-efficient replacements for the constant-speed drives used in many energy-intensive applications, including heat, ventilation, and air conditioning (HVAC), which alone represents 20 percent of total electrical consumption in the U.S. LOW-COST CURRENT SOURCE DRIVE SYSTEM (2001) CPES developed a low-cost current source drive for both synchro- nous and induction motors. A three-switch buck rectifier replaces the standard six-switch bridge, and supplies constant power to a dc link without triplen harmonic content, while a LC input filter absorbs the harmonics generated by the switching action. A small link induc- tor replaces the bulky and unreliable electrolytic dc link capacitor that is standard in conventional drives. Its inductance (less than 1 mH) is designed to be as small as possible, depending on switching frequency. The drive’s inverter consists of six thyristor switches operating in standard six-step mode to supply the motor with three-phase line currents with permissible switching harmonic content. Simulation and laboratory experimental results showed that the motor exhib- ited high input power quality and very good motor control char- acteristics. Voltage Doubler Rectifier Stage 6-Switch Inverter Stage Single- Phase Induction Motor AXIAL-FLUX PERMANENT MAGNET MACHINE WITH FIELD-WEAKENING CAPABILITY (2006) CPES has developed a novel concept for a small, flat motor to be used in computer disc drives. The motor uses an axial-flux configuration with sinusoidal-shaped sta- tor pole faces, which create a “flower petal” shape. The poles are linked with the sinusoidal flux emanating from the ro- tor permanent magnets, allowing the machine to produce a nearly constant torque. The topology is suitable for high-volume manufacturing and has fewer parts than motors commonly used in disc drives. MATRIX CONVERTER USING VOLTAGE LINK PRINCIPLE WITH REDUCED NUMBER OF SWITCHES (2002) Problem: The large dc link capacitor in conventional designs creates size and reliability problems for motor drives. Solution: An alternative dual-bridge matrix converter topology that is compatible with matrix-based switching equations. CPES devel- oped a nine-switch topology that uses half of the 18 switches re- quired in a classic ac-ac matrix converter. The topology retains the substantial advantages of the classical converter, especially high in- put and output power quality. Although it is unable to allow power to flow from the machine back to the line, this is not a serious draw- back for use with the many applications that only require motoring operation, such as pumps and fans. 9-switch dual-bridge matrix converter motor drive configuration SHORT-CIRCUIT FAULT-TOLERANT COMPENSATION FOR PMAC MACHINES (2006) Problem: The adoption of machines using permanent magnets for variable-speed drive applications has been hindered by the difficulty in handling internal short-circuit winding faults. Solution: CPES developed a new technique that suppresses the effects of a short-circuit fault by tailoring the current to adjacent healthy motor windings. This tailored current diverts the magnetic flux from the shorted-out winding, significantly reducing the short- circuit current and the resulting braking torque. The motor can pro- vide a significant percentage of average torque, while minimizing the short-circuit current. ABOVE: Flower petal stator pole configuration of new axial-flux PM machine LOW-COST POWER ELECTRONICS PACKAGING TECHNOLOGY FOR AUTOMOTIVE APPLICATIONS (2001-2002) Automotive manufacturers are electrifying many existing accessory systems that previously relied on hydraulic, pneumatic, or mechani- cal operation. CPES sought to provide an example of how its power electronics research could be successfully linked with the drive-by- wire system development efforts taking place worldwide. The op- portunity for integration of motor, controller, and pump in the same package suggested that a water pump that would take full advan- tage of integrated power electronics. Electric water pumps offer sev- eral vehicle advantages, including increased fuel economy because the pump can be run at optimum speed at all times. CPES packaged the power electronics in IPEMs that used flexible polyimide films for interconnections and eliminating wire-bond modules. The IPEM prototype cut interconnect resistance by 65 per- cent and parasitic inductance by 60 percent. Research identified an interior permanent magnet synchronous motor as the best candi- date for use in an electric water pump. The final design combines the permanent magnet motor with an IPEM-based converter and an impeller pump. The water pumped through the outer housing cools both the motor and power converter. Electric water pump configuration integrating PM motor and power electronics controller 5.23 INTEGRATED MODULAR MOTOR DRIVE (IMMD) (2003) The development of an Integrated Modular Motor Drive (IMMD) combines all the basic CPES concepts and many of the technological ad- vances. The IMMD prom- ises reduced costs and in- creased reliability through an emphasis on modu- larity and integration of drive components. The motor itself is composed of a number of modular phase-drive units inter- connected in a ring shape to form the electrical core of the motor. Each drive unit includes an iron pole piece, winding, and an IPEM attached to the end of the pole inside the motor hous- ing. The integration of motor and converter eliminates the separate drive electronics enclosure and its additional wires and connections. The modular phase-drive units offer several advantages over con- ventional designs, allowing for standardization, high-volume pro- duction, and cost reduction. The simple concentrated windings eliminate the use of expensive winding machines. The risk of short circuits is reduced drastically by separating the windings and mini- mizing direct contact; and the modularity of the IMMD allows the drive to continue operating despite a failure in one or more phase- drive units. Concept 5-phase IMMD DISTRIBUTED CONTROL ARCHITECTURE FOR IMMD (2005) Problem: The innovative design of the IMMD requires a special con- troller architecture, with a local controller for each separate pole- drive unit. The controllers coordinate the waveforms of each drive unit to manage the flux and torque of the motor. Solution: CPES developed a control configuration in which each phase module runs the coordination algorithm in addition to its lo- cal control algorithm, and then determines its actions in coordina- tion with the calculated needs of other modules. The smart opera- tion of the controllers allows them to compensate for a failure in one or more phase-drive units, as well as optimize the operation of the entire system to extract maximum post-fault average torque with reduced ripple torque. Integrated modular 5-phase motor drive Demonstrator inverter INTEGRATED MODULAR MOTOR DRIVE 5.24 5.25 ENGINEERED SYSTEMS MARKET PLACE ENABLING TECHNOLOGIES FUNDAMENTAL KNOWLEDGE Integrated modular motor drives Microprocessor and Converter Integration Standard-Cell Active IPEMs Standard-Cell Passive IPEMs High-Density Integration Thermal-Mechanical Integration Integratable Materials Advanced Power Semiconductor Control and Sensor Integration Motor and Converter IntegrationIPEM Synthesis 2. This required simplication of the power converter topologies. Several new topologies of single-phase induction motor drives were developed to reduce the number of active switches in order to reduce the power electronics cost. 4. Novel motor drive topologies use both current-source inverters and dual-bridge voltage-source matrix converters. 5. An e­ort to combine the motor and power electronics into a single physical structure triggered the basic concept of the IMMD. 3. Developments in advanced power semiconductor knowledge were tapped 13. Prototype IMMD was constructed incorporating all these e­orts. The IMMD prototype uses the CPES high-temperature inverter phase-leg can operate continuously in a 175 °C environment. 1. Electric motors consume more than 50 percent of all electricity, much of which could be saved if power electronics-based motor drives are more widely accepted. This means they must be less expensive and more reliable. 6. A ve-phase permanent magnet machine was designed and fabricated that uses soft magnetic composite SMC material for the stator poles, instead of conventional steel laminations. 9. Control and sensor integration, packaging, and thermal-mechanical integration knowledge contributed to the development of the active IPEMs needed for the prototype. 10. The nal prototype will use IPEM packaging advances to combine devices and components into single, pole-drive units. 11. Electrolytic capacitors have been replaced by lm capacitors that can better tolerate the elevated temperatures that are expected inside the IMMD because of the motor losses. 12. Thermal design concepts are being incorporated in order to protect the controller electronics from the elevated temperatures exceeding 150 °C that are typical inside conventional machines. 8. Design features and characteristics for phase-leg inverters were needed to excite each pole. 7. Soft magnetic composite material was developed and chosen for maximum ˆexibility in conguring each stator pole with 3D feature. RESEARCH EVOLUTION OF IMMD CPES 10 YEAR PROGRESS REPORT 2010 5: ACHIEVEMENTS5.26 LOW-FREQUENCY IPEMS 1ST GENERATION HIGH-PERFORMANCE DRIVE IPEM (1999) In its first year, CPES developed a benchmark prototype IPEM based on conventional chip-and- wire techniques. This first genera- tion IPEM was capable of switch- ing 75 A from a 600 V bus in its phase leg, and demonstrated turn-on and turn-off switching times of less than 1 microsecond, with an inductive load simulating the motor winding. FLIP-CHIP-ON-FLEX ACTIVE MOTOR DRIVE IPEM (2001) Key CPES advances were integrated into motor drive IPEMs, includ- ing the flip-chip-on-flex interconnect technology; GMR and integrated pilot current sensors; and active gate drives that included adjustable dv/dt control and self-boost power supplies. A half-bridge phase-leg test vehicle, consisting of two switches in a totem- pole configuration, was used, since this phase-leg configuration is the basic building block for nearly all voltage- source inverter topologies. For the demonstration unit, the active gate drive card was mounted adjacent to the Econo3 package that con- tains the flip-chip-on-flex power module. CPES examined the inte- gration of both Si PiN and SiC JBS diodes in the IPEM to measure the difference in electrical performance, and found the SiC diodes reduced current overshoot. The dissipated energy during the turn- on was reduced by factors between 2.5 and 3. ACTIVE DV/DT & DI/DT CONTROL TECHNIQUES (2002) CPES developed techniques to flexibly adjust the dv/dt and di/dt of MOS-gated power switches in hard-switched inverters, without depending on changes in passive component values. The use of the Miller capacitance effect enables the active control of dv/dt during turn-on and turn-off: current mirrors and emitter-coupled pairs in the gate drive circuit flexibly amplify or cancel the effect of a Miller capacitor between the gate and collector of the IGBT switch. Adjust- able dv/dt ranges of at least 5:1 have been demonstrated. This tech- nique also reduces the conducted common-mode EMI of a hard- switched inverter with less loss than brute-force techniques such as increasing the gate resistance. A small inductor placed in series with the switch’s emitter, electroni- cally adjusts the turn-on and turn-off di/dt values. The dv/dt and di/ dt control circuits do not interfere with each other, making it pos- sible to independently adjust the switching rates with a minimum of AUGMENTED PHASE-LEG CONFIGURATION (2002) Patent 6,909,620 CPES developed a new augmented phase-leg configuration to solve the problem of shoot-through failures in standard dc-to-ac convert- er designs. Shoot-through failure occurs when two semiconductors connected in series are turned on simultaneously, causing a high current flow that destroys both de- vices. Unlike the conventional so- lution, which requires the insertion of distortion-inducing “dead time” into switch control algorithms, the new configuration eliminates both shoot-through failures and “dead time.” The new topology is inher- ently immune to shoot-through failure, without the need for special protection features. APLC circuit topology, identifying current paths and elimi- nation of shoot-through path HIGH-TEMPERATURE INVERTER PHASE LEG (2006) Standard inverter phase-legs are not suitable for operation at high temperatures: most are designed for industrial ambient environ- ments of less than 80°C. CPES developed a unit with commercially- available components that operates in ambient temperatures of up to 175°C. The design uses a discrete gate drive circuit, designed for high temperatures, that uses bipolar silicon transistors paired with high-temperature passive components. The design also incorpo- rates a half-bridge fabricated from SiC Schottky diodes and proto- type SiC DMOSFETs provided by Cree, Inc. The gate drive circuit and complete phase leg were tested at tem- peratures up to 175° C and maintained efficient operation across the full temperature range. The project confirms that no fundamental barriers exist to high-temperature inverters, although cost and size reductions and reliability improvements will be necessary for com- mercial deployment. interactions. These techniques are applicable to MOS-gated power switches over a wide power range from at least 10 A to at least 500 A. CPES 10 YEAR PROGRESS REPORT 2010 Power Electronic Integration Technology This research focuses on the technology needed to package and integrate all the functions of power converters into modules. At the mod-ule level, the electromagnetic, mechanical, and thermal properties of the structure are considered in combination with appropriate materials. The technologies and materials must be selected for how they integrate at the process level, such as re- ducing the number of steps in the system, multitasking materials, or improving manufacturing efficiency. Our integration research encompasses high-den- sity integration, integrable materials, and thermal- mechanical integration. This includes developing the methods and materials for manufacturing IPEMs, investigating process yield, operational reliability and other manufacture-related issues, and designing tools for integrating IPEMs into systems. Challenges to integration Several challenges and barriers exist for successful manufacture, system integration, and operational de- ployment of IPEMs. These fall under four categories: identifying appropriate materials, developing infor- mation about material characteristics, predicting the behavior and performance of an increasingly complex and integrated system, and creating and refining pro- duction methods to enable successful integration. Materials Integrated power electronics require materials suitable for operation at high temperatures, in the vicinity of high electromagnetic fields, and materials that can be used to integrate electromagnetic, switch- ing, structural, and thermal functions. Materials selec- tion involves characterizing the electromagnetic, ther- mal, and mechanical behavior of materials under the conditions that they experience in integrated modules. Modeling Accurate modeling of the thermo-mechanical and electromagnetic behavior and characteristics of ma- terials in integrated modules is necessary to discover predictable failure modes and successfully analyze the reliability of an IPEM design. Behavior patterns are complicated by the intersection of multiple coupled materials. Laboratory integration Finally, for successful laboratory testing and fu- ture large-scale industrial deployment of IPEMs, labo- ratory integration processes must be improved. This includes avoiding problems arising from the mutual influence of integration processes, as well as improve- ment of the yield per process step (quality), character- ization, and resolution of integration processes. 5.27 INTEGRATION TECHNOLOGY Integration research ranges from the theoretical to the very applied aspects of manufactuability. As a result, a number of new processes and materials were developed that were quickly adopted by industry. Integration technology and had a major impact on commercial products. IN DU ST RY IM PA CT 5: ACHIEVEMENTS5.28 INTEGRATED DOUBLE-SIDED COOLING Embedded power technology presents the opportunity for double- sided cooling, in which an additional direct-bonded copper (DBC) layer is soldered on top of the metallization layer. The DBC provides electrical isolation as well as a good heat path. Commercial sub- strates plus combinations of ceramic materials were numerically investigated for the DBC layer to improve thermal performance. A commercial substrate, Thermal Clad™, improves the thermal perfor- mance by 36 percent, but an aluminum nitride DBC ceramic pro- vides an additional 5 percent enhancement over that. Experimental investigations conducted to demonstrate the benefits of double- sided cooling with heat sinks on both top and bottom substrates improved thermal performance by 62 percent. EFFICIENT HEAT EXTRACTION BY FLUIDIC CHANNEL COOLING CPES researchers designed a first- ever double-sided channel cool- ing structure. The novel structure is capable of extracting heat at the astonishing flux of 200 W/cm2. A channel is created on top of the chip surface by using a sacrificial polymer method. A copper layer is inserted between the chan- nel and the chip surface to obtain uniform heat distribution. On the backside of the chip, a series of channels are etched to allow fluid cooling. A thin copper layer is then deposited on the chan- nel surface, which reduces the time required to reach stable heat extraction. This represented the first time a copper layer was used in channel fluidic cooling. Concept of double-sided cooling for IPEM Temperature distributions on top-side metallization of standard-cell IGBT IPEM. Single sided cooling Double sided cooling TH ER M AL -M EC HA NI CA L IN TE GR AT IO N THERMAL-PASSIVE INTEGRATIONHeat extractors can im- prove the power den- sity of passive modules without affecting the electromagnetic per- formance. An optimum volume of heat-extract- ing material reduces the amount of electromag- netic energy that is pro- cessed, but more efficient heat removal yields higher levels of both electromagnetic stress and losses per unit volume in the remaining material. CPES investigated the feasibility of embedding ceramic dielectric heat extractors into ceramic magnetic cores for use with passive IPEMs and found that the process doubles the loss-handling capability. Researchers evaluated the concept, focusing on the electromagnetic design, loss, temperature distribution, and design constraints and optimizations. Of all the factors that influence overall thermal performance of the IPEM, the relative volume occupied by the heat extractors dominated. In the design example, CPES showed that application of heat extraction reduces the maximum tempera- ture of the module to 85 percent of the original value. Correspond- ingly, heat extraction increases the throughput power capability by 118 percent. CPES 10 YEAR PROGRESS REPORT 2010 SOFTWARE INTEGRATION FOR DESIGN OF IPEMS CPES promoted an integrated design methodology for power converters combining commercial software for circuits, electro- magnetics, thermal, structural, and system optimization within a unified environment. The integration greatly enhances power electronics research and development while drastically reducing design and analysis cycles. Software packages such as I-DEAS™, Maxwell 3D, and Saber™ can be linked for a multi-disciplinary design. This concept has been adopted by Ansoft, which offers the comprehensive set of packages. Ansoft offers Maxwell® for electromagnetic and electromechanical analysis; Simplorer® for circuit-based time-and frequency-domain analysis, block dia- gram, and state machine simulation languages; and ePhysics™ for thermal and stress analysis, with the use of RMxprt™ and PEx- prt™ for electrical machine and magnetic component design. HIERARCHICAL MODELING OF DISTRIBUTED POWER CONVERSION SYSTEMS CPES has promoted a modular and hierarchical modeling and simulation approach, encompassing thermal, electrical funda- mental (average), medium frequency (ripple, harmonics), and high frequency (EMI) sub-models for the design and analysis of IPEM-based power conversion systems. CPES promoted this mod- eling approach through the Office of Naval Research (ONR) in the past and more recently through the ERC. As a result, industrial and academic researchers pursuing similar fields of studies have embraced and benefited from this methodology. Affected com- panies include ABB, F&H Applied Sciences Associates, Northrop Grumman, L3, Thales, Hamilton Sundstrand, Boeing, and BAE. MODELING EQUIVALENT CIRCUITS FOR EFFICIENT MODELING OF ELECTRO-THERMAL BEHAVIOR CPES developed powerful analysis tools to aid in the design of complex integrated power electronics systems. For multi-dimensional ther- mal analysis, CPES used system identification and model reduction of linear systems to obtain detailed RC equivalent circuits from finite element (FE) simulations of transient and steady-state thermal behavior. Software to generate the topology of the equivalent circuit auto- matically from the FE simulation data was also developed. The team applied the algorithm and software to a three-dimensional model of an electron- ic chip installed on a printed circuit and cooled by air flowing at the top. The chip has 16 pins, each of which are considered a different domain. There are an additional three solid domains — the board, silicon chip, and the plastic package. The resulting model contains 34,585 tetrahedral elements. Using the model, the chip geometry was decomposed with about 70 nodes per region. The partitioning algorithm returned 131 regions. The topology of a 131-node equivalent circuit was then developed where conductances were assumed only between adjacent regions. The black dots shown in the figure indicate some of the centers chosen. 5.29 INDUSTRY IM PACT CPES has promoted this modeling approach through ONR in the past and recently through the NSF ERC. As a result, industry developers and academic researchers have em- braced the approach. Affected companies include ABB, F&H Applied Sciences Associates, Northrop Grumman, L3, Thales, Hamilton Sundstrand, Boeing, BAE and more. Ansoft adopted and further developed this concept and offers the comprehensive set of integrated software packages, including Maxwell®, Simplorer®, and ePhysics™, with the use of RMxprt™ and PExprt™. PACKAGING 5: ACHIEVEMENTS5.30 Conventional power electronics packaging is achieved by connect- ing power semiconductor device in the form of bare dies with alu- minum bonding wires for functional interconnect. This approach generated a significant amount of interconnect parasitics, which impedes high-frequency operation. It would be trouble-prone with unacceptable switching losses if the operating frequency were to grow to the hundreds of kilohertz or higher. The wirebond approach is also prone to failure as the wires detach. CPES proposed replacing wirebond with embedded power technol- ogy, where silicon dies are interconnected by directly bonding the die to the metal layers. This improved thermal management and re- duced unwanted parasitics resistance and inductance. IMPROVED PACKAGING: NON-WIRE BOND INTEGRATED Key advances in packaging and integration By layering interconnections on co-planar power chips that are em- bedded in a ceramic frame, CPES developed a packaging technol- ogy that greatly reduced the footprint, parasitic capacitance and peak junction temperature of the power stage. Called Embedded Power, the integrated power stage is similar to ICs. It is fabricated us- ing a thin- and thick-film approach, which is actually an extension of wafer-level process technology. The compact interconnection elimi- nates the bond wires and one side contact interface. Other compo- nents can be mounted directly on this stage, leading to a solid, three dimensional power electronics subassem- bly. The development was first made public in 2001. The design of a 1 kW half-bridge module measuring 1.1 x 1.2 x 0.4 in3 was pub- lished in 2003. EMBEDDED POWER CPES achieved a minimum 93 percent reduction in volume for low- profile high-density power modules using a flip-chip on flex pack- age based on the D2BGA technology. The chip-scale devices are flip soldered to a patterned flexible substrate. An organic underfill mate- rial is introduced into the gap between the packages and the sub- strate to distribute stresses caused by the mismatched coefficients of thermal expansion between the chip and substrate. The backsides of the power chips are soldered to a patterned direct bond copper sub- strate and the power stage is encapsulated. Gate driver and control circuits are built on top of the flex circuitry. FLIP-CHIP ON FLEX IN DU ST RY IM PA CT Industry quickly adopted this non-wire bond concept, start- ing with International Rectifier’s 2002 packaging technique called DIRECTFET. Product claims included significant reduc- tion in interconnect resistance and parasitic inductance and much improved thermal managment. CPES promoted the idea of replacing the conven- tional wirebond with direct bonding and introduced a number of techniques, including Flip-chip on flex and embedded power to encourage adoption of the technology. In 1999, CPES developed a 3-D packaging technology that uses the direct- bonding of cop- per posts, instead of bonding fine aluminum wires for interconnecting power devices. The Metal-Post- Interconnect-Parallel-Plate Structure (MPIPPS) was demonstrated in a 7 kW full-bridge power module with some integration of gate drive components. Short, thick metal posts are used for the interconnec- tions, which offer the ability to conduct large current with negligible parasitics, plus better thermal management due to the additional thermal paths. Dynamic cooling is also possible by flowing a dielec- tric fluid between the plates. Additional advantages include easy integration of passive components because multiple plates can be stacked; and better reliability due to low thermal stresses with the use of identical plates. METAL-POST-INTERCONNECT-PARALLEL-PLATE STRUCTURE CPES applied flip-chip technology to power semiconductor dies in 2000, developing a technology that boosts power-handling capabil- ity and dramatically improves thermal efficiency and heat transfer compared to equivalent devices in wire-bonded package. Called the die-dimensional ball grid array (D2BGA), the package consists of a power chip, inner solder bumps, high-lead solder balls, and molding resin. The surface of the package has an array of solder bumps connected to the chip pads by inner solder bumps and met- als under the bumps. Solder-bumped chips have the same lateral dimensions as the starting power chips, but has short pad-to-circuit connections, leading to reduced coupled noise, low capacitance and low inductance. The bump contacts provide a larger contact area between the devices and outside circuitry and a thick solder bump can conduct a larger current than thin wire bonds. The lower voltage drop/on-resistance and superior heat-transfer at higher power levels make the transistor attractive for higher-efficien- cy dc-dc power converters. DIE-DIMENSIONAL BALL GRID ARRAY In 2007, CPES researchers developed FlexPower as an additional strategy to help alleviate potential problems with packaging schemes in which the joints are exposed to stresses due to CTE mis- matches. With FlexPower, flexible metal straps are used to intercon- nect the tops of the mounted devices, IGBTs and diodes. The straps can be plain copper or copper plated with silver or tin. The joints are formed by reflowing solder to form an hourglass shape with height controlled by a high-temperature solder ball in the middle. The in- creased height and hourglass shape of the joint, combined with the flexibility of the straps enhance reliability. Moreover, the joints are relatively easy to fabricate as the procedure follows traditional join- ing processes, resulting in a technique that is conducive to automa- tion in manufacturing. FLEXPOWER 5.31 Shortly after, a number of companies followed suit and in- troduced similar prodoucts, including Fairchild’s bottomless and BGA packaging, Great Wall Semiconductor’s Flip Chip Lateral, Renasas’s lead-free packaging (LFPAK), International Rectifier’s FlipFet, and STMicroelectronics’s Power FLAT package and Siliconix’s PowerPAK. Thin Cu metal straps (Ag plated) DBC (Ag plated) Diode IGBT cap Base (DBC + Ag/Ni plating) Diode Metal strap IGBT Embedded caps DBC Driver circuit plane Power device plane Complete module The dimensional ball grid array has been accepted by the power semiconductor industry, as evidenced by the avail- ability of the package on the market. HIGH-TEMPERATURE PLANAR MODULE In high-temperature power electronics, the materials in the module are exposed to temperatures that range from ambient to greater than 200°C. Different materials have different coefficients of thermal expansion (CTE) leading to stresses at high temperatures from the mismatch. For good electric conduction, power electronics modules need a high CTE conductor, such as copper, which exacerbates the mismatch of the low CTE of a high-temperature semiconductor, such as SiC. CPES broke this barrier with a packaging technology using a com- posite layer of high CTE copper electroplated to low CTE chromium, which serves as a buffer layer with the SiC. Although chromium has a high electrical resistance, the increase in the composite layer is negligible, while mechanical stresses are reduced by half an or- der of magnitude. In addition, the metalized interconnects enable construction of a mechanically balanced structure, which leads to a total reduction of a full order of magnitude in thermally induced mechanical stresses. LOW-TEMPERATURE CO-FIRED CERAMIC POWER INDUCTOR Researchers developed a thick-film, low-temperature, co-fired ce- ramic (LTCC) power inductor for a single-phase buck converter op- erating at a switching frequency exceeding 1 MHz. When tested on a prototype buck converter, the inductor’s performance surpassed similar-value commercial inductors. The LTCC inductor handled more than 10 times the power of the on-chip inductors designed to operate at similar circuit conditions. The LTCC inductor uses a distributed air-gap design, which improves the light-load efficiency of a synchronous rectifier buck converter without the typical additional control circuitry. With the distribut- ed air gaps, the inductance is higher a light load and the inductor current ripple is reduced. This reduces the switching losses in the MOSFETs at light load. When the converter operates at full load, the inductances falls to the designed value to meet the transient requirements. Wide band gap semiconductor devices, such as SiC or GaN diodes and transistors, have superior switching characteristics and the ability to function at temperatures up to 350°C. Interconnecting and packaging these devices for high-temperature use poses chal- lenges. The conventional interconnection technique involves attaching one terminal of the semiconductor die to a heat-sinking substrate with a solder alloy or with an electrically conductive epoxy, while the other terminals are attached by aluminum wire-bonds. Such inter- connections cannot function at the temperature of wide bandgap devices because of the low melting temperatures of solder alloy and low decomposition temperatures of epoxies and the susceptibility of aluminum wire to electromigration-induced failure at high temperatures. HIGH-TEMPERATURE PACKAGING Integrating the electric capacitors and magnetic inductors energy storage, plus the transformers into a single generic unit was a major CPES goal. The integration needed to consider construction technol- ogies and materials in addition to system design. In 2000, CPES suc- cessfully tested the first integrated LCT prototype, which sported a 1 kW, 1 MHz operating capability. A laser-cutting process implement- ed the machining, the cutting of material layers, and the creation of holes and paths between layers (vias). The conductive windings required that metal be connected to the dielectric through a process comprising contact- ing, metallization, masking, and etch- ing. The integrated LCT was also encap- sulated for improved reliability. During construction, special care was taken to avoid possible degradation of the ma- terial characteristics, such as increased losses in the dielectric due to moisture contamination during electroplating. Technology demonstrator with LCT components before final assembly. INTEGRATED INDUCTOR, CAPACITOR, AND TRANSFORMER3D ACTIVE/PASSIVE/THERMAL INTEGRATION In 2007, CPES demonstrated the first module that integrated active, passive, and thermal functions. The 3D prototype was a point-of- load converter operating at 1.3 MHz, delivering 25 A, sporting a pow- er density of 260 W/in3 and reaching 88 percent efficiency. No heat sink was required, even at full power, thanks to integrated thermal management at die and package level. In 2008 a two-phase coupled module successfully delievered 40 A with a 500 W/in3 power density. INTEGRATION 5.32 5.33 NANOSCALE SILVER PASTE Problem: Conventional technology for attaching power semiconductor devices to substrates involves lead-free solder alloys. Such interconnections serve a dual duty: electrical connectivity and heat dissipation paths. Solder is used because most processes can be done below 300° C. Solders, however, have low electrical and thermal conductivity, plus die-attached solder layers are susceptible to fatigue failure and growth of voids during thermal cycling. Solution: CPES researchers developed silver paste made from nanoparticles. The 30-nm silver particles allow a low-temperature, low-pressure sintering process for attaching devices. The sintered attachment has excellent electrical, thermal, mechanical, and thermo-mechanical properties. The nanosilver paste technology spurred a spin-off company and was selected by R&D Magazine as one of the 100 most technological- ly significant new products of 2007. MULTIFERROIC NANOCOMPOSITE Problem: A major CPES goal has been to reduce the bulk of passive components in integrated modules. Inte- grating the components into the substrate creates stresses and reduces reliability. So, CPES pursued developing a single material with both ferroelectric and ferromagnetic properties. One approach was to mix dielectric and magnetic powders and sintering them into single EMI filters. The drawback was the high sintering temperatures in excess of 1000° C, which precluded the use of metals such as silver or copper. Solution: CPES synthesized multiferroic nanocomposites using a sol-gel colloidal technique that allows uniform mixing of the individual components. The nanostructures can be sintered at lower processing temperatures (below 1,000° C), which reduces the potentially adverse reaction between the compo- nents and enables it to be used with commonly used metal conductor pastes or inks, such as silver or silver palladium. The figure below illustrates the basic pro- cessing steps developed for making the multiferroic nanocomposite of NiZn fer- rite and barium titanate. MATERIALS CPES 10 YEAR PROGRESS REPORT 2010 INDUSTRY IM PACT The silver paste inspired the founding of NBE Technolo- gies, LLC, a start-up company established by CPES faculty member, G. Q. Lu. The company recently received financial support from the Running-Start fund managed by the Corporate Research Center at Virginia Tech. NBE is constructing a production facility in the VT KnowledgeWorks building, a business inubation cradle at the CRC. NBE specialized in manufacturing nanoscale materials for electronic packaging and biomedical applications. 5: ACHIEVEMENTS SUPER PASSIVES Passive building blocks with improved behavior are possible through integration technology. In 2004, an embedded layer was integrated into an EMI filter to cancel out parasitics effects, resulting in broader bandwidth. EMI FILTER IPEM: INTEGRATED MAGNETICS AND DIELECTRICS CPES investigated several meth- ods for integrating EMI filters into passive IPEMs. The integrated de- sign of the filter enabled it to sur- pass conventional discrete EMI filters in the reduction of parasitics in the winding capacitors. In ad- dition, the control over the three-dimensional structure of the power module opens the way to superior attenuation of high-frequency electromagnetic noise. Cancellation of the undesired electrical field is achieved through both the geometrical configuration of the IPEM, as well as the interleaving of different materials. These techniques are not replicable in discrete components, and so the EMI filter IPEM is superior in behavior, profile, and power density. ELECTROMAGNETIC NOISE CONTAINMENT WITH INTEGRATED PLANAR POWER CONNECTION Conventional methods for reducing system interference required the addition of a fil- ter to each power converter. This was an expensive and inefficient solution. CPES has demonstrated a major breakthrough in this area: the integrated bus filter, a simple low-cost planar metal-ceramic sandwich structure that connects the outside power terminals with the converter inside the box. Although clas- sical filters are unable to attenuate the radio noise in this position due to their parasitic interactions with the components, CPES’s new design utilizes these parasitics to enhance the noise attenuation. Furthermore, lower-frequency attenuation can be further enhanced by designing for the interactions between the connection structure and input power line. Further enhancements to this technology will obviate the former need for addi- tional EMI noise filters, thus provid- ing drastic improvements to power density and the ease-of-manufac- ture of electronic power converters. CANCELING THE EQUIVALENT SERIES INDUCTANCE (ESL) OF CAPACITORS The equivalent series inductance (ESL) of capacitors limits their high- frequency performance. Yet, in power electronics applications, high- frequency filtering of capacitors is critical for noise suppression and current ripple reduction. Typically two or more capacitors are paral- leled to reduce the effects of ESL, but performance improvement is limited and internal resonances remain in the capacitors. CPES researchers devised a cancel- lation technique based on network theory that reduces ESL by 20 times. Instead of paralleled capacitors, two small trace loops, whose inductance is equal to ESL, are inserted between two capacitors. The capacitors are di- agonally connected and the resulting circuit is a T-type filter without ESL effects. Experimental results show a 26 dB improvement in high frequency filtering performance and greatly reduced EMI and high frequency current ripples. ELECTROMAGNETIC INTERFERENCE (EMI) Switching-mode power electronics systems generate significant conducted electromagnetic interference (EMI) in a broad spectrum. This EMI can be detrimental to the normal operation of other electronics systems The EMI must be suppressed to an acceptable level before it can propagate to other systems. As IPEMs and power electronics systems grow commonplace, EMI management is becoming a major challenge. 5.34 CPES 10 YEAR PROGRESS REPORT 2010 Semiconductor Power Devices and ICs Historically, innovations in semiconduc-tor power devices drove advances in the power electronics industry. The invention of transistors in the 1950s not only created today’s $1 trillion microelectronics industry, but also created the power electronics industry. The transistor was effective primarily with low- power applications, while thyristors, which were also developed in the 1950s, were intended for higher pow- er applications. The development and maturation of both devices spurred the automation and robotics that boosted manufacturing capabilities in the 1970s and 1980s. Power MOSFETs The invention of power MOSFETs in the late 1970s and IGBTs in the late 1980s were major mile- stones in power electronics. These devices were user- friendly and triggered the widespread use of power electronics solutions for applications ranging from IT to high-power industrial drives and even light-rail and high-speed trains. Researchers at CPES expect this trend to continue and that power devices will trigger the next revolu- tionary technology that will help modern society use energy more efficiently and develop applications that today are only in the dreams of inventors. Pushing the capabilities of power devices During the first five years, CPES researchers pushed the capabilities of power semiconductor devic- es. We focused in two areas: 1) further improving the silicon devices, including smart power discrete devices and integrable power devices; and 2) investigating oth- er wide bandgap materials, such as silicon carbide and gallium nitride that showed potential of significantly improving performance. During the second five years of the ERC, we focused more on wide bandgap materi- als and added gallium nitride to the list of candidates. Throughout the ERC period, researchers continued to provide more integrated solutions for power devices, drivers, and control ICs. 5.35 5: ACHIEVEMENTS5.36 HIGH-VOLTAGE TRENCH SIDEWALL OXIDE-MERGED PIN/SCHOTTKY RECTIFIER (1999) The first silicon power device devel- oped by the CPES ERC was a high- voltage trench merged PiN/Schottky (MPS) rectifier. This novel device employs closely spaced, interleaving Schottky and p-n junction regions, created with VLSI process technolo- gies anisotropic etching and poly- silicon refill and planarization. The device features both the low forward drop similar to that of a pin rectifier, but with a small stored charge and hence fast switching speed, similar to that of a Schottky rectifier. Simulations and prototype 600  V, 10  A devices have shown that the device provides up to four times smaller charge storage and three times smaller reverse peak current, depending on the Schottky region width and percentage. Since about 2004, Qspeed Semiconductor has marketed advanced silicon rectifiers (up to 600 V, 8 A) based on this ap- proach.Schematic view of TSOX-MPS rectifier Top view of TSOX-MPS rectifier Seeking devices for IPEM technology Prior to 1998, low-voltage and high-voltage IT applications were dominated by VDMOS power semiconductor devices — also called vertical devices. These devices, however, were not suitable for integration with driver circuits and control ICs, and therefore, not compatible with IPEM technology. Realizing these fundamental in- tegration issues, CPES from the outset pursued alternative solutions. CPES teams sought to develop lateral power de- vices that would integrate monolithically with drivers and control ICs. This would greatly enhance the performance of the overall system and enable operation at a significantly high switching frequency. LATERAL POWER IC FOR MONOLITHIC INTEGRATION With the development of the multi-phase voltage regulator, CPES sought a more integrated solution. Researchers and pursued devel- opment of lateral power ICs that monolithically integrated the pow- er devices, the control device, the driver and the control IC. These efforts extended throughout the 10 years of the ERC. As a result, many companies today have developed products using these fully integrated lateral power IC technologies in applications, including computers and handheld battery-operated equipment, such as cell phones, PDAs, GPS, MP3 players and more. Today, this power IC product industry is estimated at $4 billion. It is generating growing interest in the technical community as evi- denced by new workshops around the world. In September 2008, the “International Workshop on Power Supply on Chip” was held in Cork, Ireland with more than 140 participants. In January 2009, the U.S. Army organized a workshop on “Integrated Micro-Power Sources,” in Washington, D.C. At APEC 2009, a roadmap for “Power Supply on Chip” was developed jointly between CPES and the Power Sources Manufacturers Association to identify the technical barriers and challenges that in further development of this concept. TI Monolithic Power IC (fs = 700 KHz) 2002 LTC Monolithic Power IC (fs = 2 MHz) 2005 Intersil Monolithic Lateral Power IC Volterra Monolithic Lateral Power PC CPES Monolithic Multi-MHz VR Enpirion Module (fs = 5 MHz) 2005 Polymer insulation Via CMOS insulation Bottom magnetic core Spiral inductor Top magnetic core CPES 10 YEAR PROGRESS REPORT 2010 5.37 Power MOSFETs are the workhorse for many applications in the IT industry. However, MOSFETs have a para-sitic body diode that has a very bad reverse recovery current, which can put higher current stress on other devices or create additional loss in the circuit. In 1999 CPES started developing a DMOS/MPS rectifier diode – an integrated fast recovery diode with a MOSFET to circumvent the problems associated with the inherent body diode. Commercial versions of this smart power device are available today, such as the one marketed by Fairchild Semiconductor. In 2000, CPES also started a development effort combining an IGBT with an anti-parallel fast recovery diode, the integrated IGBT/MPS rectifier device. Commercial IGBTs with monolithically integrated diodes, such as the Infineon ILA03N60, are now commercially available. MONOLITHIC IGBT/DIODES WITH PILOT CURRENT SENSORS With IGBT growing in importance in the high-power industry, CPES researchers initiated research into IGBTs and pilot current sensors. We successfully integrated the pilot current sensor into not just the IGBT, but also the accompanying anti-parallel diode in a monolithic device. Industry had been using a bulky and expensive discrete cur- rent sensor to protect IBGT devices from over current stress. The CPES technology enabled us to eliminate these discrete current sen- sors for many inverter applications, including motor drives. In fur- ther work, researchers demonstrated techniques for delivering high- performance sinusoidal current regulation for motor drives using incomplete current feedback measurements provided by integrated pilot current sen- sors installed only in the low- side inverter switches. View of pilot cells in IGBT/MPS rectifier device Illustration of basic concept for integrating pilot current sensing cells into TGBTs and diodes. IGBT Pilot Sensor Diode Pilot Sensor INTEGRABLE SILICON LATERAL TRENCH MOSFETS In 2003, we sought to capture the benefits of both lateral and verti- cal devices in order to integrate the driver and the control IC, while carrying a greater amount of current at low loss. This started a seven- year development effort of lateral trench devices either as discrete devices or as output devices in power ICs for high-frequency dc-dc converters. Foundry prototypes have been fabricated with the gate and ox- ide trenches etched in separate steps. A process module similar to shallow trench isolation was used to implement the oxide re-filled trench and both 1 µm deep poly-silicon and oxide trenches were planarized using chemi-mechanical polishing. The prototypes have demonstrated blocking voltages of 50-80 V and superior Ron x QG product (300 mΩ-nC). Several companies are currently exploring lateral trench MOSFETs, including Ciclon and Advanced Analogic Technologies. The Ciclon lateral trench MOSFET device, which has a trench as a p-body short, is targeted for low-voltage (<20 V), high-current (>10 A) applications and has demonstrated superior performance when compared with trench vertical MOSFETs and conventional lateral MOSFETs. POWER MOSFETS While continuing to improve silicon devices, CPES from the beginning also conducted research in wide band- gap materials such as silicon carbide and gallium nitride. SILICON CARBIDE LATERAL CHANNEL - JUNCTION BAR- RIER SCHOTTKY (LC-JBS) RECTIFIER At elevated temperatures, commercial high-voltage silicon carbide Schottky rectifiers have a delicate trade-off between forward volt- age drop and leakage current density. CPES researchers employed an epitaxial re-growth over p+ implanted buried regions to develop shielded Schottky junction regions. The prototype 1 kV advanced sili- con carbide Schottky rectifiers show leakage current density as low as that of silicon carbide pin junction rectifies, with a minimal (about 0.2 V) increase in forward drop, but with increased over-current ca- pability. The technology promises dramatic improvement over its conventional counterpart — the silicon diode. SILICON CARBIDE DIODE FOR POWER FACTOR CORRECTION In 2002, CPES successfully demonstrated the use of a silicon carbide diode for a power factor correction circuit, with no reverse recovery current observed. Today, the silicon carbide diode is widely used for commercial power factor correction circuits, with significant improvement of conversion efficiency. W ID E BA ND GA P SILICON CARBIDE 5: ACHIEVEMENTS5.38 N channel N drift-region N drift-region N channel N+ N+ Cathode Cathode Ws/2 Wo/2 Tepi Oxide P Schottky Schottky LC-JBS CPES began work on gallium nitride (GaN) power devices in 2002, when most research in wide bandgap devices was focused on silicon carbide devices. Gallium nitride is a promising wide bandgap material as it has been successfully commercialized in photonic and high-frequency amplification applications. Most important, manufacturing GaN devices is compatible with silicon foundry capabilities. Production of GaN devices can use the large-diameter silicon CMOS foundries because GaN epitaxial layers have been successfully grown on silicon substrates. CPES efforts initially emphasized two paths: device-related and process-related. For devices, researchers focused on a GaN MOS-gated bidirectional switch that we considered a basic device building block for power elec- tronics. The switch would be constructed of n-channel and p-channel GaN MOSFETs, with their respective serially connected Schottky diodes to realize reverse blocking. On the process front, we identified GaN MOS optimization as the most critical technical barrier, identified the optimal process conditions and developed process technology for n-channel GaN MOSFETs with field-effect mo- bilities that still hold a world record today. CPES also demonstrated high-voltage lateral RESURF-type MOSFETs with breakdown voltages as high as 2.5 kV and low specific on-resistance. An integrated GaN MOSFET/Schottky diode pair with bi-directional blocking was developed. Finally, an integration of AlGaN/GaN heterojunction led to the world’s first hybrid GaN MOS-HEMT for high-voltage power MOS devices. At present, CPES is working with several companies to transition our GaN MOS process for the prototype demonstrations of vertical and lateral high-voltage GaN power MOS devices. GALLIUM NITRIDE Most power devices and ICs are unidirectional and can block voltage in only one polarity. In tapping GaN device technology for power electronics CPES identified a high-voltage MOS gate-controlled, bi- directional switch as the basic, or generic, device building block for power ICs and a lateral GaN MOS process on insulating substrates for its implementation. The team optimized the MOS process to result in the best electrical properties (in terms of interfacial state density) ever reported. These GaN power-switching devices are expected to perform at least 100 times better than silicon devices. GaN power switches can improve system efficiency and increase power density, while signifi- cantly simplifying power electronics circuit design. New processing technology will not be needed, as GaN devices can take advantage of the material and processing technology infrastructures that are being developed for GaN photonic and microwave devices. Success- ful commercialization will allow power electronics applications to be applied in areas that are not currently possible with existing silicon power technology. GND NMOS PMOS JBS Diode n+ p + p- p- ±V G ±V D p+ n+ n- n- 5.39 INTEGRABLE MOS-GATED BI-DIRECTIONAL SWITCHING DEVICES FOR GaN POWER ICS GaN MOSFETS In the search for semiconductor power devices that can operate at increased frequencies and temperatures suitable for IPEM integra- tion, CPES researchers have demonstrated the world’s best ion-im- planted, enhancement mode, n-channel GaN lateral MOSFETs on p and n GaN epi on sapphire substrates. The maximum field-effect mobility of 167 cm2/Vs, minimum sub-threshold slope of 170 mV/ decade and blocking voltage up to 1 kV have been measured. The CPES GaN MOS gate oxide process achieved an excellent silicon ox- ide/gallium nitride interface. As a result, the output 1 V characteris- tics strongly resemble those of silicon MOSFETs. The improved MOS properties were first obtained on GaN capacitors with opti- mized oxide deposi- tion and annealing conditions. Research- ers discovered that unlike in silicon and silicon carbide, the in- terface state densities are much lower near the conduction-band edge than those near the valence-band in GaN. This trend implies that it is more difficult to demonstrate p-channel devices than n-channel devices. In addition, by placing a lightly doped drain region, CPES demon- strated high-voltage RESURF-type MOSFETs. The breakdown voltage rises with increasing drift length. The highest breakdown voltage achieved to date is 2.5 kV. This n-channel progress is a major step forward in ultimately demonstrating high-voltage MOS-gated bi- directional switches in gallium nitride. HIGH-VOLTAGE, REVERSE-BLOCKING, INTEGRATED GaN MOSFET/SCHOTTKY RECTIFIER To demonstrate the high- voltage MOS-gated bi-direc- tional switch, a complemen- tary pair of reverse blocking MOSFETs must be connected in parallel. This was achieved with a high-voltage, mono- lithically integrated GaN MOSFET/Schottky rectifier pair. This integrated device has forward and reverse blocking and conduction capabilities as high as 770 V and 1050 V respectively. Schematic cross-section of the ion-implanted, enhance- ment mode GaN MOSFET. Microphotographs of circular and linear devices. Sapphire Substrate p or n-GaN Source Drain Gate n+ n+n Oxide Source Drain Schottky Field Oxide Gate n n-GaN buffer layer Sapphire Gate Oxide 5.40 ENHANCEMENT-MODE GaN HYBRID MOS-HEMT GaN high electron mobility transistors (HEMTs) have attracted much attention with their impressive trade-offs between specific on-resis- tance and breakdown voltage. For high-voltage power switching applications, however, GaN MOSFET has the advantages of normally off operation and a large conduction band offset, which makes it less susceptible to hot electron effects and other reliability issues. CPES researchers combined the best features of both with the first-ever hybrid GaN MOS-HEMT. By incorporating AlGaN/GaN heterostructure into the RESURF region of GaN MOSFETs, the new hybrid MOS-HEMT has the benefits of both MOS channel and high mobility 2DEG, hence low on-resistance, in the AlGaN/GaN drift region. The process compatibility is achieved by lowering the novel CPES GaN MOS process temperature to 900° C and by our newly developed wet etch process to remove the dry etched damage GaN surface. 1998 1999 2000 2001 2007 2002 2006 2003 2005 2004 2008 L FP 5.41 Source Drain Sapphire p or UID GaN UID AlGaN Semiconductor Power Devices and ICs 1998 – present SiC and GaN Power Devices and Processes Photograph of 30 m thick SiC SiC Epi Reactor Implanted Emitter BJT Planar JBS Rectifier Superjunction JBS Rectifier Lateral Channel JBS Rectifier Regrown Base BJT Lateral RESURF MOSFET Integrated MOSFET/Schottky Pair MOS-Gated Bi-Directional Switch JFET Device Cross-Section GND NMOS PMOS JBS Diode Sapphire Substrate p or n-GaN Source Drain Gate n+ n+n Oxide Collector Cathode Cathode N+ N P O xi de Schottky Schottky Schottky Barrier Metal JT JTP+ P+P+ W S N epitaxial layer N substrate N+ P+ P-base ( 2 1017 cm-3), 1 m N- drift ( 4 1015 cm-3) N+ substrate ( >1019 cm-3) Source Oxide N+Gate Gate P+ Poly P+ P+Sidewall Oxide N- epilayer N+ substrate Drain p+ n- n- p- n+ p+ p- n- ±V G ±V D Source Drain Schottky Field Oxide Gate n+ RESURF(n) Lch LFP LRESLRES Epilayer (n-) (5x1013 cm-3, 3 m) Sapphire P N channel N drift-region N+ CPES 10 YEAR PROGRESS REPORT 2010 5: ACHIEVEMENTS ENGINEERED SYSTEMS MARKET PLACE ENABLING TECHNOLOGIES FUNDAMENTAL KNOWLEDGE IPEM-based Power Conversion Systems (IPEM-PCS) Microprocessor and Converter Integration Standard-Cell Active IPEMs Standard-Cell Passive IPEMs High-Density Integration Thermal- Mechanical Integration Integratable Materials Advanced Power Semiconductor Control and Sensor Integration Motor and Converter Integration IPEM Synthesis 1. Researchers and companies seek to make power electronics systems more ecient, less expensive, smaller, and more reliable. Such advances have historically been driven by advances in power semiconductor devices. 2. CPES is developing smart power discrete devices and integrable power devices within the IPEM concept. 3. Multi-phase VRM prompts CPES to develop lateral power ICs that monolithically integrate the power devices, control device, driver and control IC. “Power Supply on a Chip” gains interest worldwide. 7. This eliminates bulky, expensive discrete current sensors for many inverters, such as motor drives. 4. Power MOSFETs are the workhorse for the IT industry, but have reliability and energy loss issues. CPES developed a DMOS/MPS recti‰er diode to circumvent these problems 6. CPES integrates a pilot current sensor into an IGBT and the accompanying anti-parallel diode in a monolithic device. 8. CPES develops GaN bi-directional power-switching devices that are expected to perform at least 100 times better than silicon devices. 5. Commercial versions of the smart power DMOS/MPS device are designed and manufactured for the marketplace. 13. CPES is working with companies to transition GaN MOS process for prototype demonstrations of vertical and lateral high-voltage GaN power MOS devices. 12. CPES uses novel GaN MOS process to incorporate AlGaN/BaN heterostructure into the RESURF region of GaN MOSFET to create the ‰rst-ever GaN hybrid MOS-HEMT. 11. CPES integrates pair of high-voltage GaN MOSFET/Schottky recti‰er pair to demonstrat a high-voltage MOS-gated bi-directional switch. 10. CPES demonstrates the world’s best ion-implanted, enhancement mode, n-channel GaN lateral MOSFETs on p and n GaN epi on sapphire substrates. CPES also demonstrates high voltage RESURF-type MOSFETs. 9. Search for semiconductor power devices that can operate at increased frequencies and temperatures suitable for IPEM integration. 5.42 RESEARCH INTERACTIONS OF SEMICONDUCTOR POWER DEVICES AND ICS THRUST CPES 10 YEAR PROGRESS REPORT 2010 5.43 Commercializing the IPEM CPES’s research vision is to develop an in-tegrated approach to power electronics systems via the Integrated Power Elec-tronics Modules (IPEMs) to improve per- formance, reliability and cost effectiveness of power electronics products. IPEMs integrate power devices, inductors, capacitors, drivers, control and sensors, circuits and functions in a form of modular building block that can be further integrated into customized system solutions. IPEM integration enables a para- digm shift in power electronics industries. It replaces the customized design practice and labor-intensive as- sembly process with standardized modular building blocks suitable for automation. IPEM-based system integration boosts performance, reliability, cycle time, and cost effectiveness of power electronics products. IN DU ST RY IM PA CT Since 2002, a number of semiconductor companies have been introducing products based on the IPEM, starting with International Rectifier’s “DR.MOS.” These products are used to power computers, telecommunications equip- ment, and network equipment. Other commercial IPEMs, such as intelligent power modules (IPM) are widely used for motor drives. 10 W 100 W 1 kW POL VRM IPM Power Supply IPEMs Motor Drives IPEMs 5: ACHIEVEMENTS One of the critical achievements of the first five years was the continuous de-velopment of a power conversion test-bed for distributed power systems for telecom and server applications. Basic configuration included a single-phase power factor correction con- verter, followed by an isolated dc-dc converter. At the beginning of the testbed in 1998, the best industry converters supplied 1 kW, 48 V dc power from a 120 V, 60 Hz source, with a 2.6 inch profile and 5.8 W/in3 power density. Baseline design CPES improved on industrial configurations us- ing an asymmetrical half-bridge topology for high efficiency and simplicity. Researchers also used an asymmetrical transformer turns ratio to increase duty at 400 V input and added a range switch to reduce the transformer turns ratio during hold-up time. This improved efficiency more than 2 percent at full load. CPES also added an active IPEM with wire-bonds to demonstrate a prototype dc-dc converter. For the power factor converter, CPES used a new- ly developed SiC diode and CoolMOStm devices, and reduced loss by more than 35 percent. This enabled us to increase the switching frequency from 100 kHz to 400 kHz and reduce the size of the boost induc- tor by 200 percent and the EMI filter by 15 percent. Compared to state of the art at the time, the overall footprint and profile were reduced by 30 percent with a 7.5 W/in3 power density. From DPS testbed to integrated IPEM system 5.44 CPES 10 YEAR PROGRESS REPORT 2010 CPES front-end baseline converter with discrete devices. 400 kHz power factor converter and 200 kHz asymetrical half bridge. 7.5 W/in3 Improvements via IPEMs The testbed provided a baseline for the develop- ment and testing of IPEMs to replace the discrete pow- er components in the front-end converter. CPES developed the first version of an active IPEM (1 kW) in 2000 that used embedded packaging techniques. In 2001, a passive IPEM was developed and combined with the active IPEM to create a 1 kW asymmetrical half bridge for dc-dc conversion. This IPEM-based design had a fourfold improvement in power density in comparison to the benchmark dc-dc converter. The active IPEM was improved in 2002 with the inclusion of the CoolMOS™ power factor correction switches, the SiC boost diode, two MOSFET switches with their gate drivers, and high frequency bus clamp- ing capacitors. The simplification of system intercon- nections minimized parasitic inductance among the major commutation paths in the circuit. Improve- ments were also made to the passive IPEM design. Evaluation of an LLC resonant converter in 2002 demonstrated efficiency superior to the asymmetri- cal half bridge converter. Further improvements were made in 2003 by increasing the switching frequency of the resonant converter to 400 kHz from 200 kHz and saving 40 percent of the volume by using an integrated magnetic structure. The EMI filter was also converted into an IPEM. CPES first made several strides towards better un- derstanding of EMI noise generation and suppres- sion mechanisms in a front-end converter. As a result, two improvements were proposed: reduction of the equivalent series inductance of the capacitors, as well as reduction of the equivalent parallel capacitance of the filter inductors. These methods lead to about 10 dB more attenuation than the conventional filter compo- nent arrangement. In 2003, CPES used its new under- standing, as well as its experience in passive IPEMs, to develop an EMI filter IPEM which integrated all differ- ential- and common-mode capacitors and inductors into a single electromagnetic structure. Fully integrated converter By 2003, CPES developed a combination of an EMI filter IPEM, an active IPEM, and a passive IPEM that replaced all the key components of a front-end converter with a smaller 1.75 inch profile and a much higher power density: 11.7 W/in3. This breakthrough 1 kW front-end converter processed more than 75 percent of its energy through IPEMs. Two versions of this front-end converter were developed, one using the asymmetrical half bridge dc-dc converter, and the other using the LLC resonant converter. The same ac- tive IPEM was able to interface with either converter because of topology similarity. CPES testbed prototype of the same converter. a 6-fold decrease in the number of components and a two-fold decrease in size. 11.7 W/in3 5.45 5: ACHIEVEMENTS This compact HID lamp is aimed at replacing the popular fluorescent lamps with higher energy efficien- cy and longer life time. INDUSTRY IM PACT 5.46 C PES has designed an ultra- compact ballast for low- wattage High-Intensity- Discharge (HID) lamps to demonstrate the com- mercial potential of the IPEM concept. About 90 percent of the ballast volume is occupied by passive power compo- nents, including the EMI filter. The tradi- tional discrete EMI filter occupied a large amount of real estate and was meant to reduce both CM and differential mode (DM) switching noise. CPES adapted this filter into a single module constructed by standard semiconductor processing and packaging techniques. The new IPEM integrates the windings for the CM inductor and capacitor into a sin- gle hybrid structure with an embedded conductive layer inserted to cancel the equivalent parallel capacitor. An addition- al low permeability magnetic material is layered between to increase the leaked inductance, which is used to cancel the DM noise. An integrated LC winding serv- ers as the DM capacitors, and their equiv- alent series inductance is minimized by a four-terminal transmission line method. The integrated EMI filter provides a significant performance improvement over the discrete filter in the 10-20 Mhz range, and the size of the filter is reduced by 41 percent. INTEGRATED IGNITOR FOR HID BALLAST This is the first commercial integration of a fully integrated IPEM, including active, passive and EMI filter IPEM technology. CPES 10 YEAR PROGRESS REPORT 2010 Technology Adopting Company Date Use in Company (1) Double gate MOS turnoff thyristor; (2) High voltage turnoff thyristor; (3) Thermal stability of large area power semiconductor devices Silicon Power Corporation 1999-2001 Directly used in manufacturing; used in design guidelines and new product assessment. (1) Soft-switching inverter; (2) Four-phase converter control; (3) Modeling and analysis of frequency changers in AC systems Northrop Grumman, Newport News Shipbuilding (via ONR- AESS project) 1999-2002 Build Navy ships; used in developmental stage of product design; planning and design of new aircraft carriers; reduction in cost and size of aircraft power systems 1) Low-voltage VRM using 4-channel QSW; 2) New topol- ogy for coupled inductors and DC-DC converters Intel and all suppliers 1999 VRMs for high speed processors that power every computer; fast transient response, small size and low weight and improved efficiency 400 kHz LLC converter with new integrated magnetics Artesyn, Intel, Celestica, Delta, Ascom, IBM, Emerson Energy, Texas Instruments 2003 Improved AC-DC converter design with reduction of 40% of magnetic volume compared with 200 kHz 400 kHz PFC with CoolMOS and SiC diode Artesyn, Intel, Celestica, Delta, Ascom, IBM, Emerson Energy, Texas Instruments 2003 Improved PFC design with 15% EMI filter reduction and 2X boost inductor reduction Advanced high performance motor drive control and inverter technology Danfoss Drives, Power Efficien- cy Corp., Eaton, Sauer-Danfoss, GE, Boeing, Samsung 2000-2007 Integration of advanced technology in next generation of appliances, as well as marine propulsion, traction, and aerospace auxiliary drives; new SiC converter technology Charge pump ballast Matsushita Electric Works R&D Lab 1999 New technology for electronic ballast with power factor correction integra- tion Complex vector current regulators Schneider Electric (France) 2001 Substantial improvement over prior art for field weakening drives Controller for multi-phase buck VRM Semtech, Cherry Semiconduc- tor, National Semiconductor, Unitrode, Intersil 2000 High- performance control ICs for improved transient response of multi- phase VRM TECHNOLOGY TRANSFER TABLE 5.47 5: ACHIEVEMENTS Technology Adopting Company Date Use in Company Coupled Inductor multi-phase Buck; Matrix-Transformer Phase shift buck topology for 12 V VRM Intel, Volterra, Advanced Energy, Artesyn, Delta, HIPRO, Hitachi, Infineon, Intel, Intersil, National Semiconductor, Power One, TDK, Texas Instru- ments 2003-2005 The VR changed from non-coupled multi-phase buck to coupled inductor multi-phase buck; improved efficiency over conventional buck by 4%; has been incorporated into the next generation VRM products for microproces- sors Current sensors LEM 2004 Strategic considerations Current Tripler DC/DC topol- ogy for 48 V VRM (patent pending) Artesyn, Delta, HIPRO, Hitachi, Infineon, Intel, Intersil, Na- tional Semiconductor, Power One, TDK, Texas Instruments 2003 To be evaluated for the next generation VRM products to power the multi- chip microprocessors and the Telecom dc-dc brick products. 87% efficiency of the ¼ brick size 1.0 V/100 A 48 V VRM. DC/DC family with extended duty cycle by autotransformer concept TDK 2004 TDK has released coupled inductor products for these topologies; 3 per- cent efficiency improvement over traditional dc-dc converters DCR current sensing method for Adaptive Voltage Position- ing (AVP) VR Delta, Eltek Energy, Artesyn, FRIWO, National Semiconduc- tor, Hipro, Emerson Energy, Intersil, Infineon, Linear, IR, Crane Aerospace, et al. 2000 Power management IC companies, such as LTC, NSC, TI and IR will develop their IC products with technology; most VRs nowadays have implemented this technology for the current sensing to realize the AVP function Digital Controller & Modular Power Converter; THALIPEM; THALIPEM Demonstration Thales Avionics Electrical Systems 2003-2007 To be used for next generation aircraft power converters and next genera- tion variable frequency power system control and power conversion; expected to improve performance, reliability and application flexibility; to broaden product development range by THALES expanding into modular power electronics converters; enable next generation of variable frequency products Distributed power systems UTC Power 2006 Product and strategic technology development Drive control and electromag- netics Ford 2005-2006 Hybrid vehicle traction drives drives under development with improved performance features and higher reliability. DSP motor control Freescale (Motorola) 2005 Compiler and software module evolution; development of advanced con- trol modules, i.e. “Beans”, used both in advanced university teaching and distributed to DSP users in embedded software format Dynamic torque estimation and sensorless control Ford Scientific Research Labs 1999-2001 Sensorless technology is being used in prototype research fleet and ac- cepted by automotive industry for product development Electronic ballast Matsushita Electric Works, Ltd. 2003 Improvement over current HID ballast with 40 percent size reduction suit- able for integrated packaging EMI filter optimization SAFRAN 2007 Inverter with improvement in power density Engineering plastics Dupont 2004 Product planning; exploring applications of advanced engineering polymers in electric machine manufacturing including opportunities in the areas of soft magnetic composite (SMC) materials and bonded magnets 5.48 CPES 10 YEAR PROGRESS REPORT 2010 Technology Adopting Company Date Use in Company Evaluation of interconnect techniques for power devices Orthodyne 2001-2002 Help define the strategic direction of technology development of manufac- turing tools and equipment for making IPEMs GaN MOSFET technology Furukawa 2007 Manufacture this device for future power electronics systems with higher efficiency and higher power density General Purpose AC Industrial Drive Schneider Toshiba Inverter Europe 2001-2004 Next generation drive product is being developed based on CPES-devel- oped tool and concept to optimize cost of ac drive power section High efficiency DC/DC trans- former Delta, HIPRO, Hitachi, Intel, Intersil, National Semiconduc- tor, Power One, TDK, Texas Instruments, et al. 2002 Replacing the current single-stage point-of-load dc-dc converters; to be evaluated for next generation VRM products to power the multi-chip microprocessors; significant improvement in transient performance High frequency modeling of multi-phase Buck and its application in the high band- width design and dynamic current sharing analysis Intel, Intersil, TI, IR, ADI, NSC, LTC, Artesyn, Delta, Hipro, Infineon, Renesas 2005 Power management IC companies, such as LTC, NSC, TI and IR are using this modeling knowledge to guide and evaluate their VR controller design; provides theoretical foundation of the multi-phase VR controller for high performance and reliability High power density PM machines MTS, Caterpillar, A.O. Smith, Remy, Enova 2002-2007 Prototype auxiliary power system; off-road vehicles; hybrid vehicle drives; design of high performance PM machines for traction drives; advanced low cost high power PM drives with sensorless operation; traction drive technology for off-road vehicles High resolution digital PWM methods Artesyn, Delta, Eltek Energy, FRIWO, National Semiconduc- tor, Hipro, Emerson Energy, Intersil, Infineon, Linear, IR, Crane Aerospace 2006 Power management IC companies, such as Primarion, LTC, NSC, TI and IR will develop their IC products to implement DPWM for high resolution and low cost High step up DC/DC converter & Digital control Philips Research 2002 Improve ballast technique for automobile headlamp; technique provides digital control and higher than 90 percent efficiency; possible adoption of the ballast design in their current HID lamp product High voltage power converter technology Northern Power Systems 2005-2006 Development of distributed resource systems and high power converters with improved ruggedness characteristics High Voltage Power Supplies L-3 Communications 2006 Communications power systems High-voltage pulsed power power supply US Army 2006 High-voltage distributed power system for electromagnetic armor to disrupt penetrating jet and protect vehicle armor; improvement of pulsed power charging rate of 100 kilojoules energy from less than 10 seconds to 2–5 seconds Improved push-pull forward topology with integrated magnetics for 48 V VRM Delta, HIPRO, Hitachi, Intel, Intersil, National Semiconduc- tor, Power One, TDK, Texas Instruments 2001 To be incorporated into the next generation VRM products to power the multi-chip microprocessors; improved efficiency by 3 percent over the conventional half-bridge converter Improvement of boost con- verter with lossless turn-on/ off snubber Artesyn, Celestica, Delta, Emer- son, IBM, Intel, Marconi, Texas Instruments 2002 Improved PFC design with 2.5 percent low line efficiency improvement 5.49 5: ACHIEVEMENTS Technology Adopting Company Date Use in Company Integrated drive Rietschle Thomas 2005 Product development of integrated SMC motor drive; new actuator prod- uct now being produced using soft magnetic composite core Integrated sensing and active thermal control Fuji 2005 Advanced power module technology development with opportunities for new power modules with improved reliability and performance Integrated sensors in thermal control Eupec, Fuji Semiconductor 2003 Technology is being evaluated for possible implementation; Prototype development for active thermal control and integrated sensors; wider availability of integrated power electronic modules with advanced features; evaluation of performance improvements when using integrated active thermal control Lossless tapped inductor buck topology for 12 V VRM Delta, HIPRO, Hitachi, Intel, Intersil, National Semiconduc- tor, Power One, TDK, Texas Instruments 2001 Possible incorporation into the next generation VRM products for micro- processors. Provides extended duty cycle for about four percent improved efficiency Machine design capability Rockwell Reliance 2006 Modular motor drives technology Matrix converters Rockwell Automation 2004 Strategic planning and evaluation of future opportunities for applying matrix converters in Rockwell/Allen-Bradley adjustable-speed drives Modeling & control software Knolls Atomic Power Labora- tory 1999 Enhance research & development efforts Modeling and simulation Thales Avionics Electrical Systems, Boeing 2004-2008 Used in developing new converter topologies and design that are ex- pected to fill technology gap and change systems design to model-based approach Modular PM machines & Motor drive diagnostic tech- nology. MPC 2005-2006 High reliability modular motor technology; strategic aerospace drive technology development Motor drive technology GM ATC 2007 Hybrid vehicle traction drives under development with improved perfor- mance features and higher reliability. Multi-Element Resonant DC/ DC topologies Delta, Eltek, NSC, Hipro, Emer- son Network, Intersil, Infineon, Linear, IR, Crane Aerospace, C&D, GE Global, Renesas, Rolls-Royce, Boeing, MKS, NXP, Primarion, ABB, TI, FSP, Analog Devices, LiteOn, Richtek 2007 High-efficiency high voltage dc-dc for front-end ac-dc power supplies in server and telecom applications. Retains the advantages of conventional LLC three-element resonant dc-dc topology, while resolving the short- circuit protection and soft-start problems of LLC dc-dc. Multilevel converters and matrix converters Siemens, Rockwell Automa- tion 2003 Technology being investigated for potential integration; potential for more reliable converter topologies Nanoscale silver paste Infineon, International Recti- fier, ABB, Bosch, Powerex 2005-2007 Device packaging; module fabrication; performance improvement of exist- ing products; introduction of new line of products; development of new technologies for contract research 5.50 CPES 10 YEAR PROGRESS REPORT 2010 Technology Adopting Company Date Use in Company New concept of eliminating body diode loss in synchro- nous rectifier Delta, HIPRO, Hitachi, Intel, Intersil, National Semiconduc- tor, Power One, TDK, Texas Instruments 2002 To be incorporated into the next generation VRM products to power the multi-chip microprocessors; high efficiency of 87 percent at 1 MHz and 70 A output New coupled inductor imple- mentation techniques for multi-phase VRS Artesyn, Delta, Eltek Energy, FRIWO, National Semiconduc- tor, Hipro, Emerson Energy, Intersil, Infineon, Linear, IR, Crane Aerospace 2005-2006 Magnetic component companies, such as Delta and ICE, and system companies, such as Intel and Dell, are working with CPES to evaluate the practical implementation of these techniques; non-coupled inductors in the multi-phase VR will be replaced by the coupled inductor for output capacitor saving, higher efficiency for whole load range, and cost reduction as well New SO-8 MOSFET packaging style for the 12 V VRM Artesyn, Delta, HIPRO, Hitachi, Infineon, Intel, Intersil, Na- tional Semiconductor, Power One, TDK, Texas Instruments 2003 Being evaluated by the industry for the next generation VRM products; two percent efficiency improvement in 12 V Buck VRM by simply changing device packaging style Non-isolated ZVS self-driven DC/DC Delta, Artesyn 2004 Delta and Artesyn are scheduling to develop it for products; it will get 7 percent efficiency improvement over traditional dc-dc converters Novel device and its self- driving mechanism for the synchronous rectifier switch Delta, Eltek Energy, Artesyn. FRIWO, National Semiconduc- tor, Hipro, Emerson Energy, In- tersil, Infineon. Vishay Siliconix, Linear, International Rectifier. Crane Aerospace 2005 To be used in future high frequency VR and VRM design; expected to change the landscape of the synchronous rectifier technology Novel Interleaving Strategy for Multi-Channel PFC Delta, Eltek, NSC, Hipro, Emer- son Network, Intersil, Infineon, Linear, IR, Crane Aerospace, C&D, GE Global, Renesas, Rolls-Royce, Boeing, MKS, NXP, Primarion, ABB, TI, FSP 2007 Power management IC companies, such as Richtek, LTC, NSC, TI and Infineon will develop their IC products with technology; expected to set the standard to the way of multi-phase interleaving PFC in the power management area. Novel ZVS Full-Bridge topol- ogy with self-driven for 48 V DC/DC converter Artesyn, Delta, HIPRO, Hitachi, Infineon, Intel, Intersil, Na- tional Semiconductor, Power One, TDK, Texas Instruments 2003 Has been adopted by industry in practical product design. Improved effi- ciency over conventional phase-shift full bridge by five percent, simplifying the circuit and reducing the cost. Passive Integration MEW (Matsushita Electric Works) 2003-2008 20-40 W HID ballast for track lighting; 45 percent size reduction with increased power density Phase Compensation Scheme for Synchronous Rectifier Driv- ing in resonant DC/DCs Delta, Eltek, NSC, Hipro, Emerson Network, Intersil, Infineon, Linear, IR, Crane Aerospace, C&D, Freescale, GE Global, Renesas, Rolls-Royce, Boeing, MKS, NXP, Primarion, ABB, TI, FSP 2008 Power management IC companies, such as Philips, ST and IR will develop their smart driver IC products with technology to implement current sens- ing accuracy and SR driving performance Piezoelectric transformer Panasonic 1999 Computer display with high density, small size, light weight, and low cost 5.51 5: ACHIEVEMENTS5.52 Technology Adopting Company Date Use in Company Power Electronics Building Block (PEBB) Control Archi- tectures General Dynamics, Bettis, Newport News Shipbuilding, Northrop Grumman, Semi- kron, ABB, Kaman, Rockwell Automation, Alstom (via ONR project) 2001-2003 Further development and evaluation for military applications and a new line of commercial products; simplification, modularization and standard- ization of converter control architectures; possible significant controller cost reduction and improved versatility Power module technology Rockwell Automation 2005 Advanced drive technology development with new generation of ac drives under development with improved performance features and higher reliability Power systems stability and analysis; advanced AC power conversion for high-density integrated motor drives The Boeing Company 2005-2008 Development of design guidelines for AC power system to be used for next generation AC power converters; optimization of electrical power system through stability, reliability, power density, and power efficiency improve- ments. Resonant non-isolated bus converter technologies elimi- nating the body diode Delta, Eltek Energy, Artesyn. FRIWO, National Semiconduc- tor, Hipro, Emerson Energy, In- tersil, Infineon. Vishay Siliconix, Linear, International Rectifier. Crane Aerospace 2005 To be used in future high density two-stage 12 V VR Self-sensing control and elec- tromagnetic design Nissan Co. Ltd. 2005-2007 Advanced traction drives Sensitivity analysis of different outputs for on-line tuning of field oriented controller for induction motor drives in electric vehicles General Motor 2002 Assess the merits and demerits of various existing and proposed schemes for on-line tuning of induction motor drives for electric vehicles; improve performance of field-oriented controllers for induction motor drives in hybrid and electric vehicles. Sensorless motion drive control Grundos, Hamilton Sund- strand, Magnetek, Schneider Electric (France) 2002-2006 Advanced drive technology development to eliminate sensors on IM drives; demonstration of aerospace power conversion equipment with competi- tive advantage due to zero-through-full-speed sensorless operation; Application to new aerospace products; Improved robustness of starter/ generator systems for aerospace; Cost savings and reliability improvement; Demonstration of aerospace power conversion equipment with competi- tive advantage due to zero-through-full-speed sensorless operation Si power devices International Rectifier 2004 New integrated Si power devices, reducing component count and intercon- necting parasitics with integrated IGBT/MPS devices SiC power device design and processing technology LTT 2007 Enhance high temperature microwave annealing equipment applicable to SiC device processing SiC power devices Northrop-Grumman 2005 Incorporation of SiC power devices into power electronics systems, reduc- ing power consumption and improving power efficiency SiC power devices technology GE, Cree 2001-2005 Design, process integration, testing into device mask set; adoption of new device technology in future products; advanced device design for SiC BJTs and Darlingtons CPES 10 YEAR PROGRESS REPORT 2010 5.53 Technology Adopting Company Date Use in Company Sigma dc-dc Power Conversion Architectures Delta, Eltek, NSC, Hipro, Emer- son Network, Intersil, Infineon, Linear, IR, Crane Aerospace, C&D, GE Global, Renesas, Rolls-Royce, Boeing, MKS, NXP, Primarion, ABB, TI, FSP 2007 Ultra-high-efficiency isolated and non-isolated dc-dc for computing and telecom applications; expected to change the landscape of the dc-dc conversion in the power management area. Single-phase boost power factor correction with tapped inductor winding Artesyn, Celestica, Delta, IBM, Intel, Marconi, Sun Microsys- tems 2001 Improved PFC design reducing reverse recovery loss of the rectifier diode and improves two percent of the PFC efficiency Single-phase power converter design Rolls-Royce 2007 Testing equipment and products, and improving power density Soft magnetic composites. Hoganas 2003-2005 Technology application support; regular annual strategic technology meetings between industry & academia along with collaboration on the evolution and application of numerical analysis tools for advanced electro- magnetic design Start-up circuit and control for bi-directional dc-dc converters Ecostar Electric Drive Systems 1999-2000 Hybrid electric cars using fuel cell; improving the bi-directional dc-dc converter start-up property; enabling company to commercialize product for various battery charger applications in EV Subsea power distribution Aker Kvaerner 2007 System architecture with new products for lower cost and higher efficiency Switching capacitor technol- ogy for the bus converter applications Artesyn, Delta, Eltek Energy, FRIWO, National Semiconduc- tor, Hipro, Emerson Energy, Intersil, Infineon, Linear, IR, Crane Aerospace, Intel, Maxim 2005-2006 Build product for system integration companies such as IBM, Sun Microsys- tems, Cisco, HP and Dell for server and telecom applications; expected to change the landscape of the bus converter in the non-isolated two-stage/ IBA architectures. Two-stage solution for 48 V POL converter Artesyn, Delta, Power One, Eltek, Emerson 2003 Has been adopted by telecom industry for POL converters; provides signifi- cant efficiency improvement and cost reduction of 15-20 percent Two-stage solution for laptop VR and system two-stage architecture for laptop power system Intel 2005-2006 Intel proposed the Extended Battery Life (EBL) structure, which is very simi- lar. Also, Intel has specified the Operating Number of Phase (ONP) control strategy in its IMVP VI. IBM and ADI are evaluating this architecture. It will be used in IBM, HP, and Dell laptop computers. Much improved light load efficiency for battery life extension, cost saving and footprint reduction. Universal digital controller General Dynamics (via ONR project); Electric Ship Research and Development Consortium 2003-2007 Testing and co-development; Advanced research and control algorithm development; expected improvement in controller performance and appli- cation flexibility; expected huge improvements in power system efficiency, availability, survivability, and security. ZVS self-driven Full-bridge Buck topology Delta 2006 Delta is working with CPES to commercialize this technology into the next generation VRM products. Intersil is planning to design a commercial IC as the controller for this superior topology; provides great efficiency improve- ment on high switching frequency VRM/VR 5: ACHIEVEMENTS5.54 RESEARCH BEST PAPER AWARDS 2009 Best Paper Award, International Conference on Electronic Packaging Technology & High Density Packaging – Xiao Cao, Khai D.T. Ngo, Guo-Quan Lu, “Thermal Design of Power Module to Minimize Peak Transient Temperature.” 2009 EEE ESTS Outstanding Paper Award – University Catego- ry – Tong Liu, Khai D.T. Ngo, Guo-Quan Lu, Rolando Burgos, Fred Wang, Dushan Boroyevich, “Comparison of Current Sharing among Paralleled Devices in Wire-Bonded and Planar Power Modules,” Baltimore, MD, April, 2009. 2009 First prize paper award (Portnoy Award) IEEE, IAS, Power Electronic Devices and Components Committee – Mat- thew L. Spencer and Robert D. Lorenz, “Analysis and In-Situ Measurement of Thermal-Mechanical Strain in Active Silicon Power Semiconductors.” 2008 Charitat (Young Researcher) Award of the International Symposium on Power Semiconductor Devices and ICs awarded to Weixiao Huang – W. Huang, Z. Li, T.P. Chow, Y. Niiyama, T. Nomua, and S. Yoshida, “Enhancement-mode GaN Hybrid MOS-HEMTs with Ron,sp of 20mω -cm2,” Orlando, FL, May 2008. 2006 First prize paper award from IEEE, Industry Applications Society, Industrial Drives Committee – Sibaprasad Chakrab- arti, Thomas Jahns, and Robert Lorenz, “Current regulation for surface permanent magnet synchronous motor drives using integrated current sensors in the low-side switches.” 2006 IEEE Transactions on Power Electronics 2005 Best Paper Award – F.C. Lee, S. Wang, Daan van Wyk, “The Improvement of Performance of Electromagnetic Interference Filters through Parasitic Coupling Cancellation.” 2006 Best Overall Paper award for the IEEE IAS Pulp and Paper Industry Conference – M.A. Valenzuela, J.M. Bentley, P.C. Aguilera, and R.D. Lorenz, “Improved Coordinated Response and Disturbance Rejection in the Critical Sections of Paper Machines.” 2005 First prize paper award from the IEEE, IAS Industrial Drives Committee – S. Chakrabarti, T.M. Jahns, and R.D. Lorenz, “Current Regulation for Surface Permanent Magnet Synchronous Motor Drives Using Integrated Current Sensors in the Low-Side Switches.” 2005 IEEE Transactions on Power Electronics 2004 Best Paper Award – J.T. Strydom, Daan van Wyk, “Electromagnetic Model- ing for Design and Loss Estimation of Resonant Integrated Spiral Planar Power Passives.” 2005 IEEE Industrial Applications Magazine First Prize Paper Award – F. Wang, “Multilevel PWM VSIs: Coordinated Control of Regenerative Three-level Neutral Point Clamped Pulse- Width-Modulated Voltage Source Inverters,” July/August 2004. 2004 1st Prize, IEEE-IAS Industrial Drives Committee – S. Chakrabarti, T. Jahns, R.D. Lorenz, “Reduction of Parameter Sensitivity in an Induction Motor Current Regulator using Integrated Pilot Sensors in the Low-Side Switches.” 2004 William M Portnoy Best Paper Award from the PEDCC of the IEEE IAS – R. Chen, W.G. Odendaal, S. Wang, Daan van Wyk, “Structural Winding Capacitance cancellation for Integrated EMI Filters by Embedding Conductive Layers.” 2004 Transactions Third Prize Paper Award from the IEEE IAS – F. Briz, M.W. Degner, R. Garcia, R.D. Lorenz, “Compari- son of Saliency-Based Sensorless Control Techniques for AC Machines.” 2004 Third prize paper award from the IEEE IAS, Industrial Power Converter Committee – J.E. Ramos, J.J. Connors, D.A. Murdock, R.D. Lorenz, “Active Thermal Control of Power Electronic Modules.” 2003 William M. Portnoy Best Paper Award from the PEDCC of the IEEE IAS – C.K. Campbell, P. Womarans, Daan van Wyk, “Technology for Integrated Transmission Line RF-EMI Filters.” 2003 Transactions First Prize Paper Award from the IEEE, IAS – M. A. Valenzuela, J. Bentley, R.D. Lorenz, “Sensorless Tension Control in Paper Machines.” 2003 Prize Paper Award from IEEE Trans. on Power Electronics – Jia Wu, F. C. Lee, D. Boroyevich, Heping Dai, Kun Xing, and Dengming Peng, “A 100 kW high performance PWM recti- fier with a ZCT soft-switching technique,” Nov. 2003. 2002 Best Paper Award for the IEEE Transactions on Compo- nents and Packaging Technologies committee – C.K. Campbell, R.G. Chen, Daan van Wyk, “Experimental and Theoretical Characterization of Antiferro-Electric Ceramic Capacitors for Power Electronics.” 2002 A Premium and a Certificate from Transactions of the SAIEEE – G. van Schoor, I.S. Shaw, Daan van Wyk, “The State- Space Modeling of Distortion in a Realistic Power Network.” 2002 Prize Paper Award from IEEE Trans. on Power Electron- ics – R. Zhang, V. H. Prasad, D. Boroyevich, and F. C. Lee, “Three- dimensional space vector modulation for four-leg voltage- source converters,” May 2002. 2001 Prize Paper Award from IEEE Trans. on Power Electronics – S. K. Mazumder, A. H. Nayfeh, and D. Boroyevich, “Theoreti- cal and experimental investigation of the fast- and slow-scale instabilities of a DC-DC converter,” Mar. 2001. 2000 Electronic Materials Conference Best Student Paper Award – S. Banerjee, K. Chatty, T.P. Chow, and R.J. Gutmann, “Effect of Implant Anneal and Oxidation Conditions on Nitro- gen and Phosphorus Implanted 4H-SiC MOSFETs,” Denver, CO, June 2000. CPES 10 YEAR PROGRESS REPORT 2010 Prior to the establishment of CPES, VPEC (Vir-ginia Power Electronics Center) had compiled a publication series to capture important re-search and development. The effort contin- ued with CPES and today, the series includes: Volume I High-Frequency Resonant, Quasi-Resonant, and Multi-Resonant Converters (1989) Volume II Modeling, Analysis, and Design of PWM Converters (1990) Volume III Power Devices and their Applications (1991) Volume IV High-Frequency Resonant and Soft-Switching PWM Converters (1992) Volume V Switching Rectifiers for Power Factor Correction (1994) Volume VI Power Electronics Components and Circuit Modeling and Analysis (1995) Volume VII Advanced Power Conversion Techniques (1995) Volume VIII Converters and Distributed Power Systems (1995) Volume IX Low Voltage Power Conversion and Distributed Power Systems (2000) Volume X Integrated Power Electronics Module -- a Building Block Concept for System Integration (2000) Volume XI Advanced Soft-Switching Techniques, Device and Circuit Applications (2000) Volume XII Conducted EMI and Power Electronics: Characteriza- tion and Mitigation (2008) Volume XIII (Book 1) Systems-Based Power Electronics Integra- tion Technology (2008) Volume XIII (Book 2) Systems-Based Power Electronics Integra- tion Technology (2008) Volume XIV Distributed Power Systems Front End Converters: Power Factor Correction and Isolated Converters (2008) Volume XV Distributed Power Systems: Point of Load Converters (2008) Additional volumes will cover high power, motor drives, and semiconductor power devices and ICs. Through the years, CPES faculty has authored books and textbooks, as well as served as editor and co-editors of special IEEE publications. These include: June 2001: “Special Issue of the Proceedings of IEEE on Power Electronics Technology: Present Trends and Future Devel- opments,” CPES-VT professors Dushan Boroyevich, Daan van Wyk, and Fred C. Lee served as co-editors. October 2003: Pulse Width Modulation for Power Converters, CPES- UW professor, Thomas A. Lipo, co-authored the book with Prof. Grahame Holmes, Monash University, Australia. 2004 (2nd edition): Introduction to AC Machine Design, a text book authored by CPES-UW professor, Thomas A. Lipo. RESEARCH PUBLICATIONS 5.55 1999 Douw Greeff Prize from the South African Academy of Arts and Science – R. Pretorius, I. Shaw, Daan van Wyk, “Artifi- cial Neural Network Control of Hybrid Power Filters.” 1998 PELS Prize Paper Award IEEE Trans. on Power Electronics – J. T. Hsu and Khai D. T. Ngo, “Finite-Element Formulation of Field-Based Subcircuits for Modeling of Magnetic Component with Hysteresis.” 1990 Yugoslav Conf. on Elec., Comm., Autom., and Nuc. Eng. First Prize Paper Award – Laszlo Huber and Dusan Borojević, “Implementation of the space vector modulator for forced commutated cycloconverters,” (in Serbo-Croatian), Zagreb, Yugoslavia, June 1990. 1990 High Frequency Power Conversion Conference Best Paper Award – Wojciech Tabisz, Fred C. Lee “Design of High Density On-Board Single- and Multiple-Output Multi-Reso- nant Converters.” 1988 Hybrid Processing session Best Paper, International Society for Hybrid Microelectronics – D.C. Hopkins, F.W. Stephenson and F.C. Lee, “Printing of Thick Thick-Film Con- ductors for Power Hybrid Circuit.” 1988 Power Conversion International Best Paper Award – “High Frequency Quasi-Resonant and Multi-Resonant Converter,” Munich, Germany. 1988 High Frequency Power Conversion Conference Best Paper Award – Wojciech Tabisz, Fred C. Lee, “A Novel Zero- Voltage Switched Multi-Resonant Forward Converter.” 1987 High Frequency Power Converter Conference Best Paper Award – Raymond Ridley, Fred C. Lee, Vatche Vorperian, “Multi-Loop Control for Quasi-Resonant Converters.” 1984 IAS IEEE Static Power Converter Committee Best Paper Award – Ramesh Oruganti, Fred C. Lee, “Resonant Power Processor - Part I-State Plane Analysis and Part II - Methods of Control,” Chicago, IL, October 1984. 5: ACHIEVEMENTS RESEARCH Patents Awarded Patent or License Title Inventors Patent/License # Date Granted Multiphase Voltage Regulator Having Coupled Inductors with Re- duced Winding Resistance Ming Xu, Yan Dong, Fred C. Lee 7,649,434 1/19/2010 Co-Fired Ceramic Inductor with Variable Inductance, and Voltage Regulator Having Same Michele Lim, J. Daan Van Wyk 7,638,988 12/29/2009 Input Current Sensing AVP Method for Future VRM Ming Xu, Fred C. Lee, Jinghai Zhou 7,605,572 10/20/2009 Common Mode Noise Reduction using Parasitic Capacitance Cancel- lation Shuo Wang, Fred C. Lee 7,602,159 10/13/2009 Phase Compensation Driving Scheme for Synchronous Rectifiers Dianbo Fu, Fred C. Lee 7,602,154 10/13/2009 Hybrid Filter for High Slew Rate Output Current Application (Divi- sional App.) Ming Xu, Yuancheng Ren, Fred C. Lee, Andrew P. Schmit 7,583,065 9/1/2009 Hybrid Control Methods for Digital Pulse Width Modulator (DPWM) Jian Li, Dong Sam Ha, Yang Qiu, Ming Xu, Fred C. Lee 7,570,037 8/4/2009 Hybrid Filter for High Slew Rate Output Current Application Ming Xu, Yuancheng Ren, Fred C. Lee, Andrew P. Schmit 7,560,912 7/14/2009 Cancellation of Inductor Winding Capacitance Shuo Wang, Fred C. Lee 7,554,423 6/30/2009 Generalized Cancellation of Inductor Winding Capacitance (Continua- tion-in-part) Shuo Wang, Fred C. Lee 7,548,137 7/16/2009 Discharge Lamp Lighting Control Device Fred C. Lee, Jinghai Zhou, Yan Jiang, Masaao Okawa, Dung A. Tran, Kiroyasu Eriguchi 7,391,165 6/24/2008 Self-Driven Scheme for Synchronous Rectifier Having No Body Diode Ming Xu, Julu Sun, Jinghai Zhou, Fred C. Lee 7, 265, 525 9/4/2007 Power Converters Having Output Capacitor Resonant with Autotrans- former Leakage Inductance Yuancheng Ren, Julu Sun, Ming Xu, Fred C. Lee 7, 254, 047 8/7/2007 Current Sensing in Multiple Coupled Inductors by Time Constant Matching to Leakage Inductance Yan Dong, Ming Xu, Fred C. Lee 7, 233, 132 6/19/2007 Multiphase Voltage Regulator Having Coupled Inductors with Re- duced Winding Resistance Jinghai Zhou, Fred C. Lee, Ming Xu, Yan Dong 7, 199, 695 4/3/2007 Power Converters having Capacitor Resonant with Transformer Leak- age Inductance Yuancheng Ren, Fred C. Lee, Ming Xu 7, 196, 914 3/27/2007 Buck converter with high efficiency gate driver providing extremely short dead time Yuancheng Ren, Fred C. Lee 7, 184, 281 2/27/2007 EMI Filter and Frequency Filters Having Capacitor with Inductance Cancellation Loop Shuo Wang, Fred C. Lee, Williem Gerhardus Odendaal 7, 180, 389 2/20/2007 Adaptive bus voltage positioning for two-stage voltage regulators Ming Xu, Jinghai Zhou, Yuancheng Ren, Fred Lee, Jia Wei 7, 161, 335 1/9/2007 Two-stage voltage regulators with adjustable intermediate bus volt- age, adjustable switching frequency, and adjustable number of active phases Yuancheng Ren, Fred C. Lee, Ming Xu 7, 071, 660 7/4/2006 5.56 CPES 10 YEAR PROGRESS REPORT 2010 Patent or License Title Inventors Patent/License # Date Granted Self-driven circuit for synchronous rectifier DC/DC converter Yuancheng Ren, Fred C. Lee, Ming Xu, Douglas Sterk 7, 016, 203 3/21/2006 Quasi-resonant DC-DC converters with reduced body diode loss Ming Xu, Fred C. Lee, Jinghai Zhou, Yang Qiu 6, 989, 997 1/24/2006 Solid-State DC Circuit Breaker Qin Huang, Xigen Zhou, Zhenxue Xu 6, 952, 335 10/4/2005 Multi-phase interleaving isolated DC/DC converter Ming Xu, Fred C. Lee, Jinghai Zhou 6, 944, 033 9/13/2005 Emitter turn-off thyristors (ETO) Alex Qin Huang 6, 933, 541 8/23/2005 Inverter Configurations with Shoot-through Immunity Shihong Park, Thomas M. Jahns 6, 909, 620 6/21/2005 Accelerated commutation for passive clamp isolated boost converters Lizhi Zhu, Jih-Sheng Lai, Fred C. Lee 6, 876, 556 (Cont.) 4/5/2005 Bridge-buck converter with self-driven synchronous rectifiers Ming Xu, Fred C. Lee, Jinghai Zhou 6, 859, 372 2/22/2005 Self-driven circuit for synchronous rectifier DC/DC converter Ming Xu, Fred C. Lee, Yuancheng Ren 6, 819, 574 11/16/2004 Mounting and heatsink method for piezoelectric transformer Eric Baker, Weixing Huang, Dan Chen, Fred C. Lee 6, 800, 985 10/5/2004 Thyristor having one or more doped layers Paul Chow 6, 787 ,816 9/7/2004 Multiphase clamp coupled-buck converter and magnetic integration Peng Xu, Kaiwei Yao, Fred C. Lee, Mao Ye, Jia Wei 6, 784 ,644 8/31/2004 Method and apparatus for reduction of energy loss due to body diode conduction in synchronous rectifiers Ming Xu, Fred C. Lee 6, 781 ,853 8/24/2004 Step-down buck converter with full bridge circuit Jia Wei, Fred C. Lee 6, 757, 184 6/29/2004 Method and Circuits for Reducing Dead Time and Reverse Recovery Loss in Buck Regulators Yuming Bai, Nick Sun, Alex Q. Huang 6, 737, 842 5/18/2004 Emitter Turn-Off Thyristors and Their Drive Circuits Alex Q. Huang, Bin Zhang 6, 710, 639 3/23/2004 Self-oscillating electronic discharge lamp ballast with dimming control Fengfeng Tao, Fred C. Lee 6, 696, 803 2/24/2004 Low profile magnetic component with planar winding structure hav- ing reduced conductor loss Ronald M. Wolf (Philips Research), Glenn Skutt, Liming Ye 6,650,217 11/18/2003 High input voltage, high efficiency, fast transient voltage regulator module (VRM) Xunwei Zhou, Fred C. Lee 6, 590, 791 7/8/2003 Start-up circuit and control for high power isolated boost DC/DC converters Lizhi Zhu, Jih-Sheng Lai, Fred C. Lee 6, 587, 356 7/1/2003 Adjustable Speed Drive for Single-Phase Induction Motors Thomas A. Lipo 6, 570, 778 5/27/2003 Accelerated commutation for passive clamp isolated boost converters Jih-Sheng Lai, Fred C. Lee, Lizhi Zhu 6, 452, 815 9/17/2002 Low-Cost 3D Flip-Chip Packaging Technology for Integrated Power Electronics Modules Xingsheng Liu, Guo-Quan Lu 6, 442, 033 8/27/2002 Semiconductor Structures with Trench Contacts Alex Huang 6, 437, 399 8/20/2002 Diode-Assisted Gate Turn-Off Thyristor Yuxin Li, Alex Q. Huang, Kevin Motto 6, 426, 666 7/30/2002 Current sensing and current sharing Xunwei Zhou, Fred C. Lee 6, 414, 469 7/2/2002 Zero voltage zero current three level DC-DC converter Peter Barbosa, Francisco Canales, Fred C. Lee 6, 349, 044 2/19/2002 Three-phase zero-current-transition (ZCT) inverters and rectifiers with three auxiliary switches Yong Li, Fred C. Lee 6, 337, 801 1/8/2002 Soft-switched quasi-single-stage (QSS) bi-directional inverter/charger Kunrong Wang, Fred Lee 6, 330, 170 12/11/2001 5.57 5: ACHIEVEMENTS5.58 Patent or License Title Inventors Patent/License # Date Granted Method and Apparatus for Controlling Web Tension by Actively Con- trolling Velocity and Acceleration of a Dancer Roll G. Rajala and R.D. Lorenz 5 , 602, 747 11/6/2001 Single-Stage Input Current Shaping Technique With Voltage-Doubler Rectifier Front-End Jindong Zhang, Fred C. Lee, Milan Jovanovic 6, 147, 882 11/14/2000 Trench Contact Process Alex Q. Huang 6, 110, 799 8/29/2000 Short Circuit Protection of IGBTs and Other Power Switching Devices T.A. Lipo, Vinod John, Bum-Seok Suh 6, 097, 582 08/1/2000 Power Supply for Supplying AC Output Power Wei Chen, Fred C. Lee, + K. Nishiura, T. Yamau- chi, Y. Murakami, M. Maehara (MEW) 6, 057, 652 5/2/2000 Semiconductor Structures with Trench Contacts Alex Q. Huang 6, 630, 711 3/14/2000 DC Bus Voltage Balancing and Control in Multilevel Inverters T.A. Lipo, Gautam Sinha 6, 031, 738 02/29/2000 Hybrid Topology for Multilevel Power Conversion Madhav Manjrekar 6, 005, 788 12/21/1999 Gas Discharge Lamp Inverter with a Wide Input Range Jianrong Qian, Fred C. Lee 5, 949, 199 9/7/1999 Automatic Average Current Mode Controlled Power Factor Correction Technique without Input Voltage Sensing Jay Rajagopalan, Paolo Nora, Fred C. Lee 5, 920, 471 7/6/1999 Discharge Lamp Driving Circuit having Resonant Circuit Defining Two Resonance Modes Jinrong Qian, Fred C. Lee, Tokushi Yamauchi 6, 441, 652 6/22/1999 Process for Providing a Glass Dielectric Layer on an Electrically Condu- cive Substrate and Electrostatic Chucks Made by the Process Guo-Quan Lu and J. Bang 5, 864, 459 1/26/1999 Tube Lining Apparatus Guo-Quan Lu and J. N. Calata 5, 855, 676 1/5/1999 Soft switched three-phase boost rectifiers and voltage source invert- ers Yimin Jiang, Fred C. Lee 5,633,793 5/27/1997 Zero-voltage-transition (ZVT) 3-phase PWM voltage link converters Hengchun Mao, Fred C. Lee 5,574,636 11/12/1996 Damped EMI Input filter power factor correction circuits Vlatko Vlatkovic, Dusan Borojevic, Fred C. Lee 5,530,396 6/25/1996 Zero-current transition PWM converters Guichao Hua, Fred C. Lee 5,486,752 1/23/1996 Soft-switching PWM converters Guichao Hua, Fred C. Lee 5,442,540 8/15/1995 Zero-voltage-switched, three-phase PWM rectifier inverter circuit Vlatko Vlatkovic, Fred C. Lee, Dusan Borojevic 5,432,695 7/11/1995 Zero-voltage-transition pulse-width-modulated converters Guichao Hua, Fred C. Lee 5,418,704 5/23/1995 Zero-voltage-switched, three-phase pulse-width-modulating switch- ing rectifier with power factor correction Vlatko Vlatkovic, Dushan Boroyevich, Fred C. Lee 5,329,439 7/12/1994 Novel zero-voltage-switching family of isolated converters Richard Farrington, Milan Jovanovic, Fred C. Lee 5,325,283 6/28/1994 Zero-voltage transition PWM converters Guichao Hua, Fred C. Lee 5,262,930 11/16/1993 Constant frequency zero-voltage-switching multi-resonant converter Milan Jovanovic, Richard Farrington, Fred C. Lee 4,931,716 6/5/1990 Multi-loop control for quasi-resonant converters Raymond B. Ridley, Fred C. Lee 4,866,367 9/12/1989 Half-bridge zero-voltage switched multi-resonant converters Wojciech A. Tabisz, Fred C. Lee, Milan M Jova- novic 4,860,184 8/22/1989 Zero-voltage-switched multi-resonant converters including the buck and forward type Wojciech A. Tabisz, Fred C. Lee 4,857,822 8/15/1989 Non-destructive tester for transistors Grant Carpenter, Fred C. Lee, Dan Y. Chen 4,851,769 7/25/1989 DC-to-DC converters using multi-resonant switches Wojiech A. Tabisz, Fred C. Lee 4,841,220 6/20/1989 Resonant converters with secondary-side resonance Kwang-Hwa Liu, Fred C. Lee 4,785,387 11/15/1988 Zero-voltage switching quasi-resonant converters Kwang-Hwa Liu, Fred C. Lee 4,720,668 1/19/1988 Zero-current switching quasi-resonant converters operating in a full- wave mode Kwang-Hwa Liu, Fred C. Lee 4,720,667 1/19/1988 CPES 10 YEAR PROGRESS REPORT 2010 INDUSTRIAL RELATIONS Our mission of improving industrial competitiveness of power electronics and making electrical processing more efficient has required a strong collabora- tion with industry. The CPES industrial collaboration program has been a key to the success of ERC. Our goals have been expedient, effective knowl- edge dissemination and technology transfer, direct involvement from a broad base of industrial interests, and the pursuit of fundamental knowledge that is rel- evant to industry’s needs. We have insisted that tech- nologies developed by CPES be adoptable in future products and viable for commercialization. To meet these goals, we structured our industrial collaboration program to include an industry mem- bership program, research collaboration, technology transfer, and graduates in the field (discussed in the Education section that follows). The success of these efforts has been evident in the growth of our membership, the activities of our industry members, and the strength of our technology transfer. “The Industrial Partnership representatives are en- thusiastic and passionate about their involvement in CPES. They demonstrate a clear sense of ownership of CPES activities and programs, and they contrib- ute significant amounts of time and energy to the programs. Some industry members state that CPES is the only forum they have for addressing issues, which are critical to the success of their companies.” —2001 NSF Site Visitors 5.59 5: ACHIEVEMENTS 100 90 80 70 60 50 40 30 20 10 0 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 CPES created an organizational structure that encourages collaboration between competing firms and between academics and industry. The collaboration between academic and industry members was so effective that at times it has been difficult to determine whether a specific achievement should be claimed as an academic or industrial achievement. This organizational struc- ture became an international model for stimulating collaboration in the fragmented power electronics in- dustry. Industry members have been extremely commit- ted to our mission, and have acted independently to improve CPES activities. Our industry members have truly served as active participants in our success. CPES MEMBERSHIP GROWTH N U M BER O F CO M PA N IES The VPEC Partnership Program began in 1983 with fewer than five members. By 1987, the program grew to 20 members. By 1998, when CPES was established as an NSF ERC, membership had increased to 70 mem- bers. By 2008, when we graduated from the NSF ERC program, membership had grown to 87. Membership Growth chart – as seen in the chart below, the Affiliates and Principal Members Plus catego- ries sustained continued growth during the 10 years of the ERC. For the latter, a dramatic increase occurred as CPES began its transition to post-ERC funding. This increase is evidence of industry support, contributing greater funds to ensure the continued success of CPES in its post-ERC life. INDUSTRIAL RELATIONS Industry Members Program 5.60 Principal Members Plus Annual contribution $50K Principal Member Annual contribution $25K Annual contribution $10K Annual contribution <$10K/In-kind Affiliate Member WEMPEC members, small start-ups, in-kind donors Associate Member CPES 10 YEAR PROGRESS REPORT 2010 Membership structure The CPES industrial consortium is the backbone of CPES’s industrial collaboration. Members are of- fered four categories according to their annual con- tribution. Each category has different benefits so that industry partners can become involved at the level compatible with their interests. Principal Member Plus: This category was intro- duced in 2002 to incorporate the Power Management Mini-Consortium into the CPES industrial consor- tium. Principal Plus Members pay $50,000 per year with the added option of earmarking $40,000 towards a specific research area. Members could also join the CPES Intellectual Property Protection Fund (IPPF) for $5,000 per year. (After 2006, CPES offered IPPF to Principal Plus Members at no additional cost). These companies share intellectual properties on a royalty- free, non-exclusive basis. This has fostered significant growth in industry consortium funding and ensures CPES self-sufficiency for the post-ERC period. Principal Members pay $25,000 per year and re- ceive multiple opportunities to guide the Center’s program as Industry Advisory Board members and re- search champions. They also have early access to CPES intellectual properties for possible commercialization and the option to participate in IPPF for $5,000 per year. Associate Members pay $10,000 per year and re- ceive basic member benefits: access to the Center’s research results, researchers and state-of-the-art facili- ties, as well as continuing education opportunities to stay abreast of developments in the field. The Affiliate Member category is designed pri- marily to accommodate in-kind software and equip- ment donors as well as small start-ups. Before CPES there were two industrial consortia – Virginia Power Electronics Center (VPEC) at Virgin- ia Tech and Wisconsin Electric Machines and Power Electronics Consortium (WEMPEC) at University of Wisconsin-Madison. Each had about 50 industry part- ners. These consortia were folded into CPES over a two-year transitional period. Since the technical inter- ests of WEMPEC do not fully map into CPES core re- search, they contribute one third of their membership fees to CPES and are considered Affiliate Members. 5.61 5: ACHIEVEMENTS5.62 CORRELATION OF CPES CRITICAL TECHNOLOGIES WITH INDUSTRY’S TECHNICAL INTEREST PROFILE Power E l ec t ron i c s Packaging 11 High-Freq. Power Conversion 33 System Integration and Design Tools 29IPEM &System Integration Advanced Materials 6 Power Integrated Circuits 11 Power Semicond. Devices 7 Electric Machines 6 Adjustable Speed Drives 31 Power Electronic Controls 10 Note: Multiple interests of partner firms are included where applicable Large (>1000 employees) Medium (500- 1000 employees) Small (<500 employees) INDUSTRY MEMBERS BY SIZE OF COMPANY CPES industry members encompass a variety of sizes and come from many different sectors. The chart above breaks down the CPES industry mem- bers according to their status as small, medium, and large companies. The chart demonstrates the recent increase in industry membership, as well as the con- stant presence of companies at all levels in the industry consortium. The chart below is representative of the various interests that industry consortium members have in CPES’s power electronics research. Where applicable, multiple interests of partner firms are counted. CPES 10 YEAR PROGRESS REPORT 2010 5.63 IP issues sometimes frustrate both academic re-searchers and interested industrial firms. In fast-moving industries like electronics, lag in the IP process can lead to lost rights, recognition, and markets. Universities also typically claim ownership of all IPs developed in their laboratories, but do not al- ways have the resources or market knowledge to select which inventions to pursue. In 2002, CPES instituted a new IP process that taps industry partners and helps university technol- ogy move quickly into commercialization. Funding for patents was contributed by Principal Members and Principal Plus Members, who each contributed $5,000 above and beyond their memberships contributions. Those funds were pooled to establish the Intellectual Property Protection Fund (IPPF). In 2006, the IPPF was offered to Principal Plus Members at no extra cost. When a CPES researcher develops technology that may have IP potential, CPES sends the information to the IPPF members. A teleconference and a vote follow. If the IPPF members determine the technology has market value, the patent information is sent to a patent lawyer and the legal expenses are paid from the IPPF. According to CPES Director Fred Lee, “Now, there is no delay; we are almost as fast as industry.” The IPPF members get non-exclusive, royalty-free access to the IP (without additional cost or licensing fees). “Engineers can use the technology without in- volving corporate lawyers and without having to de- velop their own proprietary technology. The firms can use the technology in any way they desire, and we don’t have to go back and monitor it,” Fred Lee said. “We won’t get personally wealthy with this process, but it is very good for our program.” The system also reduces infringement concerns. “As university professors, we don’t really want to sue a company.” INDUSTRIAL RELATIONS Technology Transfer INNOVATIVE INTELLECTUAL PROPERTY PROGRAM 5: ACHIEVEMENTS INDUSTRIAL RELATIONS Industry Involvement Principal and Principal Plus Members are al-located a seat on the CPES Industry Advisory Board (IAB). The advisory board quickly be-came the vehicle through which members helped shape CPES activities and success. From 1998 through 2007, John Steel of Artesyn Technologies (retired) served as IAB chair, Ken Phillips of Rockwell Automation as co-chair, and Pierre Thol- lot as secretary. Under Steel’s leadership, the IAB devel- oped a process to interact with the university teams. As the Center grew, the IAB would form ad-hoc working groups to address issues that arose that were specific to industry. Telecon series The advisory board established a multi-layered telecon series to ensure that the advisory board has the opportunity to provide guidance and counsel in a consistent manner. Weekly huddles are organized to raise issues and brainstorm strategies; monthly IAB Executive Committee telecons filter issues for broader discussions; and quarterly full IAB telecons keep all members informed and engaged in industry-related issues. In addition, all industry members are invited to the annual face-to-face meeting held in conjunction with the CPES Annual Conference. Benchmarking Working Group To help CPES measure progress and accomplish- ment over time, in 1998 the advisory board established a working group on benchmarking. The benchmark- ing working group helped to define and quantify the current commercial state of the art for reliability and cost pertinent to the Center’s research program. The group also identified barriers and roadblocks, while emphasizing metrics, benchmarks, and deliverables. By 2002, the working group had successfully established baseline benchmarks for each research thrust. Working group leader: Ken Phillips, Rockwell Automation Reliability Working Group While exploring new research areas based on the IPEM concept, CPES began integrating active compo- nents and passive components. As these integration concepts were very new in industry, in 1999 the IAB formed a working group on reliability. The Reliability 5.64 CPES RELIABILITY WORKSHOPS - OCTOBER 1999 & MARCH 2002 CPES 10 YEAR PROGRESS REPORT 2010 Flip chip on Flex Passive IPEMs Embedded Power TECHNOLOGIES EVALUATED BY THE MANUFACTURABILITY AND PRODUCIBILITY WORKING GROUP Working Group helped develop the CPES strategy to assure that the reliability of the IPEM system would be addressed at the component level, the IPEM module level, and the systems level. The group also organized two workshops on the issue. Working group leader: Mike Shaw, Rockwell Science Center Manufacturability and Producibility Working Group When CPES developed a prototype of the integrat- ed power electronics module, in 2001 the IAB formed an ad hoc working group on manufacturability and producibility, which helped CPES researchers better understand how technologies developed in the lab can impact industry. They evaluated the compatibility of CPES technologies with industry expectations, manu- facturing, cost effectiveness, relative business value, and commercialization potential. Technologies evalu- ated included: embedded power, power flex packag- ing, and construction of passive IPEMs. Working group leader: Al Kamp, Artesyn Technologies (retired) Research Champions Working Group In 2000, the IAB further established a Research Champion Working Group to make sure CPES had an effective mechanism for industry to serve as mentors to CPES researchers. Mentors worked with research- ers in technology development activities and helped facilitate direct technology transfer. The Champions group also organized teleconferences to keep industry abreast of technical progress in cross-campus multi- thrust projects. This helped advance research and foster industry interest in CPES technological inno- vations. Working group leader: Don Adams, Oak Ridge National Lab Communications Working Group In 2000, the board formed the Communications Working Group to foster direct interactions between industry members and students, to enhance connec- tivity and enable industry mentorship. The group was formed in response to a 1999 SWOT opportunity that students wanted closer relationships with indus- try members. The group created an Industry-Student Forum and held a mini-expo/career fair that attracted about 200 industry and student participants. Working group leader: John Steel, Artesyn Technologies (retired) Research Review Working Group The Research Review Working Group was formed in 2000 following an identified SWOT weakness that the CPES industry technical review and status report- ing process needed to be strengthened. The group evaluated research and provided recommendations to the Center director and his executive team regard- ing the relevance to industry of CPES research. The group later shifted its emphasis to an advisory role at the thrust level, working in parallel with the scientific advisory board. Working group leaders: Gert Bruning, Philips Research; Trey Burns, Artesyn Technologies Additional Working Groups The IAB also initiated a working group on poli- cies and procedures that drafted and updated the IAB Operating Policies and Procedures Manual, and the SWOT Analysis Working Group that conducted an- nual surveys to analyze the Center’s strengths, weak- nesses, opportunities and threats. 5.65 5: ACHIEVEMENTS Throughout the 10 years of ERC support, CPES industry members were deeply involved in con-tributing to the development of IPEM technol-ogy. The IAB’s Benchmarking Working Group helped CPES revise the technology roadmap with an emphasis on identifying barriers and roadblocks. The CPES 10-year roadmap was continually updated, and further correlated with the industry roadmap devel- oped by the Power Sources Manufacturer’s Association (PSMA). From Success to Significance In 2005, the Industry Advisory Board organized a workshop called, “From Success to Significance.” This was an effort to help CPES continue as a viable center beyond graduation from the NSF ERC program. The workshop engaged industry members and outreach collaborators, in addition to Center faculty, students, and advisors. Outcomes included developing an ex- panded vision for CPES; expanding the Center’s ap- plied research to encourage industry funding; setting aside funding for disruptive research for long-range benefits; focusing on environmental and efficiency issues; and conducting a market study to help guide future research. Long-Term Roadmap As CPES was successful in demonstrating a long- term system approach to power electronics develop- ment, industry members showed their support. In- ternational Rectifier provided $100,000 to CPES to develop a long-term (7–15 years) roadmap for archi- tectural, control, component, and packaging require- ments. The goal of the initiative was to “help advance the course of technology inside the industry as well as establish research requirements for CPES by defining a 10-year development path.” The roadmap would cover low horse-power motor control systems, especially for high volume appliance applications and power-of- load converters that can be operated in high efficiency, high density, and high operating frequencies in the 10- 20 MHz range. 2006 CTO Summit A one-day Chief Technology Officer (CTO) Sum- mit brought together 60 industry technology leaders INDUSTRIAL RELATIONS Post-ERC Planning 5.66 From Success to Significance April 2005 CPES 10 YEAR PROGRESS REPORT 2010 from 47 organizations. The agenda included CPES technology updates and invited talks on global market trends and state-of-the-art in power electronics. Sum- mit participants discussed how the Center could better serve industry, maximize member benefits, prepare the next generation of engineers in today’s global environ- ment, correlate CPES and industry technology road- maps, and address the optimal balance between basic and applied research. Stepped-Up Support Industry members stepped up support for CPES and promoted CPES membership growth throughout the 10 years of the ERC. While the dot-com bust in 2000 had a negative impact on the IT industry, CPES enjoyed a growth in industry membership. Then, as we were preparing for graduation from the NSF ERC pro- gram in 2007-2008, we saw another growth spurt in membership. 5.67 Power Management Mini-Consortium The VRM mini-consortium was initiated in 1997 when a cluster of companies independently came to CPES expressing interest in conducting research of a similar nature, i.e. power management of the next generation micropro- cessors. The work scope would have represented a significant overlap and the various projects would be difficult for university researchers to manage. To address the situation, CPES developed a novel idea: pooling these resources in a consortium, conduct pre-competitive research, share the research results, and let individual companies take the technology know-how further to develop their own commercial products. Initially, the firms were ap- prehensive about the concept, but later agreed that this approach would expedite technology advancement in the field. The consortium has grown and is now called the Power Management Consortium. Today, af- ter more than a decade, the culture has changed and these competitors now work openly together, sharing technology information to guide CPES in addressing power management issues of merit to all. SiC Symposia With silicon carbide power devices on the verge of large-scale commercialization and showing great promise for a high performance impact on future power electronics systems, CPES-RPI organized the first silicon carbide (SiC) Symposium in May 2003. Objectives of the work- shop were to propose a SiC mini-consortium similar to the Power Management Mini-Consortium, and to ex- plore new device structures and processes; benchmark commercial devices and materials; identify new ap- plications; and develop adequate packages. Following the first symposium, industry members continued to communicate with CPES regarding the device devel- opment roadmap and a second symposium — the SiC/ GaN Symposium — was held in 2005. Attendees in- cluded 58 representatives from 34 industrial, govern- ment, and academic organizations. CTO Summit April 2006 SPECIAL INTERESTS 5: ACHIEVEMENTS5.68 EDUCATION & OUTREACH The CPES partner universities share several common goals in education and outreach: to develop and strengthen university-level educa-tion in power electronics, to develop leaders in the field, to encourage students to enter the field and address the severe shortage of power electronics engi- neers, to bolster the ranks of women and underrep- resented minorities in power electronics, and to cre- ate opportunities for practicing engineers to continue their learning and keep current in a fast-changing field. To meet these goals, CPES from the very beginning established programs for sharing academic and laboratory resources across traditional institutional boundaries. Academic and research faculty coordinate through CPES to provide more opportunities in power electronics than would be possible through a single university. The Center formed an Education Committee consisting of the education and outreach director and one faculty representative from each partner campus. Through the committee, CPES developed efforts in curriculum development, leadership development, undergraduate programs, precollege outreach, and professional education. The CPES education and outreach efforts were cited by the 2004 NSF site visitors as a program of excellence and model for other ERCs. “The education program offered through CPES is truly exceptional and can be a model for other centers.” — 2004 NSF Site Visit Report CPES 10 YEAR PROGRESS REPORT 2010 5.69 • 312 GRADUATE DEGREES (114 PH.D., 198 M.S.) • 98 BACHELOR’S DEGREES • 14 NEW POWER ELECTRONICS COURSES DEVELOPED • 86 POWER ELECTRONICS AND RELATED COURSES • 60 SHORT COURSES TO INDUSTRY • 158 STUDENT INTERNSHIPS AT INDUSTRIAL FIRMS • 81 POWER ELECTRONICS MINORS • 1028 PRE-COLLEGE STUDENTS 100 80 60 40 20 0 PARTICIPATING STUDENTS IN THE ERC: 1998-2008 PhD Students Masters Students Undergrads TO TA L N U M BE R O F ST U D EN TS YR 1 YR 2 YR 3 YR 4 YR 5 YR 6 YR 7 YR 8 YR 9 YR 10 HIGHLIGHTS EDUCATION/OUTREACH 5: ACHIEVEMENTS EDUCATION & OUTREACH Curriculum Development After signing letters of cooperation, it typi-cally takes several semesters — and even a couple years — before cooperative uni-versity education programs take effect. In power electronics, the agreements were signed and course sharing and development started immediately. We attribute our unprecedented fast start to the strong cooperative spirit between the university partners and to the recognition that CPES could help solve a severe shortage of engineers educated in power electronics. All the universities share the goal of increasing power electronics education as part of their partici- pation in CPES. The Cooperative Agreement for Dis- tance Learning and the Cooperative Agreement for Ex- change established common policies and procedures for cross-registration, billing of tuition and fees, grade assignment, and distance delivery of courses. These policies facilitate exchanges, which have led to the creation of new courses, course revisions, and new certificate and degree programs/options, as well as service and leadership opportunities for students. With such strong cooperation and goals, the Center has been able to tailor strategies and requirements to the both the strengths and needs of the individual in- stitutions while enhancing the shared curriculum. The cooperative approach also nurtured exten- sive program development at partner institutions with emerging programs in power electronics. For example, at the inception of the ERC, NCA&T lacked a founda- tion-level systems-oriented course in one of the core disciplines. All the other partner institutions had de- veloped such a course, and the gap at NCA&T was a barrier to the university’s full participation. In the fall 2000 semester, Virginia Tech offered the course, Elec- trical and Computer Engineering 4224: Power Elec- tronics, as a distance learning option exclusively to the partner campus. In 2001, distance learning recordings from the lead institutions were used as a basis for in- struction on NCA&T’s campus, with office hours pro- vided on campus. By 2002, more students were quali- fied and interested in the course and a comparable, two-semester sequence was offered by NCA&T faculty on their campus. As a result of this inter-institutional cooperation, each of the five partner universities have established or are developing new curricular programs in power elec- tronics. Moreover, CPES partner campuses now offer 86 power electronics and related courses, 27 of which have been offered in distance format. Power electronics concentration at RPI 5.70 EPOW-4080 Semiconductor Power Electronics EPOW-4850 Electric Power Engineering Design (With PE emphasis) ECSE-4250 Integrated Circuit Processes and Design ECSE-4290 Electronic Packaging MEAE-4490 Mechatronics MEAE-4250 Mechatronic System Design Required Plus one of the following CPES 10 YEAR PROGRESS REPORT 2010 Power electronics option at Virginia Tech Power electronics option at UPRM ECE 4205 Electronic Circuit Design ECE 4224 Power Electronics ECE 4004: RC Active Filter Design ECE 4284: Power Electronics Lab ECE 4206: Electronic Circuit Design ECE 4214: Electronics ECE 4234: Microelectronics ECE 4274: Hybrid Microelectronics ECE 4314: Control and Applications of Electric Machines ECE 4324: Electronic Control of Machines ECE 4334: Power System Analysis and Control ECE 4364: Alternate Energy Systems ECE 4405: Control Systems (Fall) ECE 4406: Control Systems (Spring) ECE 4964: Field Study of a Virtual Corpora- tion, hybrid car project, or other power electronics research project MSE4984: Electronics Packaging ECE 3964: Field Study ME 4304: Heat Transfer ECE 4994: Independent study (in PE) Technical Electives 9 credits Required Courses 6 credits Free Electives ECE 4224: Power Electronics ECE 4206: Electronic Circuit Design ECE 4406: Control Systems As a technical elective Capstone Design Course Works within the departmental 15-credit technical elective requirement INEL 4103 Elect. Syst. Analysis III INEL 4201 Electronics I INEL 4405 Electric Machines INEL 5408 Motor Control INEL 5496 Design Projs. in Pwr Elect. INEL 4505 Control Systems INEL 4416 Power Electronics INEL 4409 Illumination Engineering INEL 4407-08 Industrial Design INEL 4415 Power Syst. Analysis INEL 5995 Special Topics INEL 4998 Undergrad Research INEL 4995 Professional Practice INEL 5406 Transmission & Distribution INEL 5407 Computer Aided Design INEL 5415 Power System Protection INEL 5495 Design Projs. in Pwr. Syst. Power Electronics Option Both Options Power Systems Option CPES partners focused first on the shared goal of enhanc- ing undergraduate participation in power electronics and creating a specialization within the field. Power electronics option at Virginia Tech In 2002, CPES established a Power Electronics Option for undergraduates majoring in electrical en- gineering at Virginia Tech. The option can be accom- modated within the technical elective requirements for a B.S.E.E. degree. Courses for the option range from controls, circuit design and microelectronics to power electronics and alternate energy systems. The option was also designed to provide course credit for students working in power electronics on team projects such as virtual corporation or hybrid car initiatives. Partici- pants have shown a keen interest in pursuing employ- ment as well as advanced studies in the field. Certificate program at the University of Wisconsin UW’s power electronics certificate program was based on an existing course requirement for the uni- versity’s Grainger Fellowship Program, but was ex- tended beyond fellowship awardees. The certificate required completing a B.S. degree in engineering with at least nine credits, including at least six ECE credits, from a list of power electronics courses. In anticipa- tion of a new College of Engineering Energy certifi- cate, UW discontinued the program in 2007. Power electronics concentration at Rensselaer RPI’s concentration in power electronics systems was designed for any interested student in the Department of Electric Power Engineering. Since the inception of the concentration, the Department of Electric Power Engineering has been merged with the Department of Electrical, Computer, and Systems Engineering. Power electronics option at UPRM The power electronics option developed at UPRM in 2004 complements an existing option in power systems. The option includes new CPES-developed courses, including a senior design experience. In part because of its tremendous success with CPES, UPRM was able to approve a Ph.D. program in electrical engineering. Dr. Miguel Vélez, CPES campus director is a leader in this effort. Power electronics at NCA&T Although a formal degree option in the disci- pline has not been created at NCA&T, the goal of an undergraduate degree option has been fulfilled by the creation of the basic-level course sequence, or track, in power electronics systems, which provides a strong platform for the new capstone design experience in power electronics. NEW OPTIONS AND DEGREES 5.71 5: ACHIEVEMENTS COURSE NUMBER, NAME & DESCRIPTION UNIVERSITY ECE 5274: Modeling and Control of Three-Phase PWM Converters Power conversion principles for three-phase pulse-width modulation techniques, control and con- verters. Development of averaged models of three-phase rectifiers and inverters in stationary and rotating coordinates. Small-signal models in rotating coordinates and control design. Introduction of switching state vectors and different modulation schemes. Three-phase inverter and rectifier applications. Parallel and multi-level three-phase converters. VT ECE 4236: Multidisciplinary Design of Packaged Electronics System-level package design issues for meeting application requirements and modeling tools for analyzing electronic packages are introduced. Materials and process selection guidelines are discussed for the manufacturing and reliability of packaged electronic products. VT ECE 5984: Power Electronics Integration Technology The characteristics of materials, interfaces, and process technologies for synthesizing integrated electronic power processors as well as the resulting electromagnetic and thermo-mechanical characteristics of the structure are treated. Case studies of cutting-edge research examples are examined in detail. Future development in terms of structural, functional, and electromagnetic integration is projected. Lab work on processes and technology for integration is included. VT ECE 5260: Power Electronics System Integration A broad overview of advanced power electronics technologies with an emphasis on multi-disci- plinary aspects of integrated design. Investigation of relationships between system application requirements and technological challenges in circuit topologies, power semiconductor devices, sensing and control, integrated packaging, and thermal management, and their impact on the system reliability and cost. Introduction to the concept of integrated power electronics modules and their application in distributed power systems and motor drives. The course is organized as a series of seminar lectures jointly taught by leading researchers from several universities and industry, via distance access. VT ECSE 4941: Introduction to Power ICs This course covers devices for integrated circuits used in power conversion, starting with a review of semiconductor physics and including PN junctions, Schottky and junction rectifiers, MOS capacitors, MOSFETs, bipolar junction transistors, and IGBTs. Power IC issues, such as metallization resistance, device cross-talk and interactions, and high-voltage interconnects, are also discussed. RPI ECSE 6965: Semiconductor Device Characterization This course is designed to give students a hands-on experience in the characterization of basic semiconductor devices (diffused resistors, pn junction diodes, Shottky diodes, MOS capacitors, bipolar junction transistors, MOSFETs) in wafer and packaged forms. The final project involves the students in a detailed characterization of devices in a specific application (e.g. high-voltage power electronics, sub-micron ULSI, microwave and wireless). RPI EDUCATION & OUTREACH New Courses Developed 5.72 CPES 10 YEAR PROGRESS REPORT 2010 ECSE 6962: Modern Power Devices and Smart Power ICs A continuation of ECSE6260. Modern Discrete Devices that will be covered include the Insulated- gate Bipolar Transistor (IGBT) and other MOS-gated bipolar transistors, MOS-controlled Thyristor (MCT) and other MOS-gated Thyristors, together with their performance trade-offs, and integrated current and voltage sensors. The RESURF principle, analysis of integrable lateral power devices, such as lateral MOSFET’s, lateral IGBT and lateral MCT’s, dielectric and junction isolation, device cross-talk suppression. RPI ELEN 785-1: Masters Special Topics (Solid State Power Conversion and Design) This lecture course is used to introduce engineering topics of current interest to master students and faculty. The subject matter will be identified before the beginning of the course. Prerequisite: Consent of instructor. NCA&T ELEN 686/885: Special Projects (Special Projects in PELs/Power Electronics Circuits II) This is an investigation of an engineering topic which is arranged between a student and a faculty advisor. Project topics may be analytical and/or experimental and should encourage independent study. Prerequisite: consent of instructor. NCA&T ELEN 885: Practical Application in Optimization This course is designed to present those aspects of optimization methods, which are currently of the foremost importance in solving practical engineering and science problems. These include practical problems in control, mechanical, industrial engineering and computer science. Strong emphasis is given on implementation of the Algorithms rather than the theory behind the sub- ject. NCA&T ELEN 610: Power Electronics This course is an introduction to principles and methods of power electronics. Subjects covered are semiconductor devices and their complementary components and systems, and different static switching converters and their applications. Prerequisite: ELEN-320. NCA&T INEL 5496: Design Projects in Power Electronics Application of power electronics fundamentals to the design of a closed loop power electronic system to meet certain specifications and conform to manufacturing standards. Performance evaluation through P-Spice or Simulink. UPRM INEL 6096: Electric Power Quality Analysis, modeling and mitigation of the difficulties related to the distortion of voltages and cur- rents in power systems. Special emphasis on harmonics and sources of power quality problems. Voltage sags and swells, impulses and other transient events. UPRM INEL 6995: Modeling and Control of Three-Phase PWM Converters Study of selected topics. This particular course in power electronics deals with power conversion and management using three-phase pulse-width modulation techniques and devices. UPRM Fourteen new courses have been developed as part of the Center. While some of the new courses address curriculum articulation needs, others reflect the Center’s expansion into new research and technology development areas. 5.73 5: ACHIEVEMENTS EDUCATION & OUTREACH Boosting Undergraduate Experience CPES has developed a range of undergrad-uate programs to raise the visibility of power electronics among students who are selecting a technical focus and considering pursuing advanced study. The Center’s programs are also designed to encourage domestic, female, and un- derrepresented minority students to pursue advanced studies in the field. These opportunities are supple- mented by NSF Research Experiences for Undergradu- ates (REU) programs. Early in the ERC program, CPES established fel- lowships, assistantships, and internships to encour- age undergraduates at Virginia Tech to explore power electronics as a field of study. Research fellowships of $2,000 per year were available to qualified students considering power electronics as a career. Fellows were encouraged to participate in CPES functions, to pur- sue the power electronics option, and to participate in design and research projects with a power electronics component. Undergraduate research assistantships were available to students engaged in relevant research projects. Summer internships have also been available for undergraduates to spend 12 weeks at a power elec- tronics firm. Research Experience for Undergraduates In 2002, NSF awarded CPES an REU to supple- ment the ERC. The REU funds research experiences for four students at Virginia Tech and two students at UPRM per year. From 2002-2004, fourteen of eighteen participants were minority or Hispanic students and three were participants in the Louis Stokes Alliance for Minority Participation (LSAMP) program. In 2005, the NSF funded a new REU in power elec- Students from Polytechnic University of Puerto Rico work on their research project during the UPRM REU program during summer 2006. Left: CPES poster for undergraduate fellowships, assistantships and internships. 5.74 CPES 10 YEAR PROGRESS REPORT 2010 tronics to build on the collaboration between the ERC and LSAMP programs. This allowed some students to have the opportunity to have consecutive summer research experiences. It also included a service com- ponent: the participants mentored younger students. Participants selected a project from the following re- search areas: power conversion systems, electro-mag- neto-thermo-mechanical integration technology, in- tegrated materials, thermal management integration, power devices and integrated circuits, control and sen- sor integration, high-density integration and advanced packaging. Eighty percent of participants in the CPES REU and LSAMP REU programs have been underrep- resented minority or Hispanic students. E-Wheels program E-Wheels exposes University of Wisconsin fresh- man and sophomores to power electronics through hands-on experience with bicycles. Students design and build electric drive systems for their own bicycles. Dr. Giri Venkataramanan of UW launched a pi- lot of E-Wheels in Spring 2004. Of the two students in the pilot project, one applied to a graduate program in power electronics and the other joined a CPES indus- try sponsor. A related follow-up project is a proposal to expand the program for outreach to K-12 educators. A science, mathematics, engineering and technology (SMET) Capstone clinic would bring high school educators, engineering faculty, undergraduate and graduate stu- dents together for six to eight weeks over the summer. The clinic will focus on a specific capstone engineering experience based on bicycles. REU for Louis Stokes Alliance for Minority Participation Scholars E-Wheels program established at the University of Wisconsin. 5.75 5: ACHIEVEMENTS CPES SLC PRESIDENTS 1999-2001 - Brian Welchko (UW) 2001-2002 - Ramanan Natarajan (RPI) 2003-2004 - Bass Sock (NCA&T) 2005-2006 - Arthur Ball (VT) 2007-2008 - Carson Baisden (VT) EDUCATION & OUTREACH Developing Student Leaders The CPES Student Leadership Council (SLC) plays a critical role in planning and executing the Center’s education and outreach programs. The SLC is composed of two student represen- tatives from each partner campus. The presidency has been held by students from the different CPES cam- puses. The SLC organizes short-term exchanges and the annual CPES conference. The SLC holds teleconferences with the Education and Outreach director to address Strengths, Weak- nesses, Opportunities, and Threats (SWOT) issues, new and continuing initiatives, new program develop- ment, and issues related to industry and intercampus relationships. The SLC provides direct student input to Center management during the Spring Governing Board meeting and selected meetings of the Executive Committee. CPES Annual Conference The SLC also helps coordinate the CPES Annual Conference. During this conference, the Center shares its research progress with industry partners and the larger power electronics community. A student committee organizes the conference. They are responsible for the technical program, poster session, general logistics, a conference brochure, pro- ceedings, and proceedings CD. During the last five years, an industry/student forum and a student mixer were also incorporated into the annual conference. CPES student retreat in Washington, DC SLC representatives from the 22 NSF ERCs gather annually in Washington, D.C. for a student retreat. The retreat serves as a forum for students to discuss strat- egies for improving communication, developing pro- grams, and evaluating progress within their respective research centers. The Annual Student Retreat focuses on a different theme each year. In 2004, the CPES SLC led the event, which had the theme of building bridges between students and industry. John Steel, CPES Industry Ad- visory Board Chair spoke about making the most of the industry/student connections provided by ERCs. CPES SLC President Bass Sock chaired the event, and two CPES SLC representatives from each of the CPES partner campuses assisted him. 5.76 2004 NSF SLC Annual Student Retreat CPES 10 YEAR PROGRESS REPORT 2010 Through the summer graduate research program and short-term campus exchange program, I was able to take courses that were not offered at my home campus. I was also able to get a more detailed view of how energy is used and how it will affect the United States in the next twenty years. — Jamaica Barnette, North Carolina A&T State University The CPES Student Leadership Council proposed and implemented a short-term exchange ini-tiative in 2002. This initiative provides Center students travel scholarships to visit partner campuses to participate in collaborative research and educational programs. Students participated in short courses, software training, and hardware transfer. More than 100 short-term exchanges have been com- pleted and UPRM and NCA&T have the highest par- ticipation. Beginning graduate students with no prior ex- perience in power electronics often benefited from a summer research experience activity mirroring that of undergraduate students. So, the CPES devised a short-term exchange program for graduate students. This program was coordinated with the undergradu- ate exchanges so that both undergraduate and gradu- ate students were invited to the host institution at the same time. Research projects reflected the interest and back- ground of the undergraduate and graduate students. Organizers grouped the students into teams according to research areas. This resulted in a dual mentorship structure: undergraduate students received guidance from graduate students at their home university as well as the host university. These projects often formed the basis of undergraduate students’ senior design projects. Graduate students continued to support the undergraduates throughout the academic year and the senior design projects. Many students applied for short-term exchange scholarships again the following year to continue their intercampus research. A non-credit compulsory introductory course was added to the REU and the parallel graduate short- term research exchange program. This course acted as a bridge between the introductory circuits course required for admission and the introductory systems- oriented power electronics course now implemented in various formats at the Center’s partner campuses. 5.77 ACADEMIC EXCHANGE 5: ACHIEVEMENTS Born in London, Melik Dolen re- ceived his Ph.D. from the University of Wisconsin-Madison in 2000. At UW his primary concentration was the design of advanced machin- ing force estimators for CNC machine tools. Part of his research included the (real-time) elec- trical parameter identification of induction machines and was funded by CPES-UW. He writes that his research and the guidance of Prof. R.D. Lorenz contributed greatly to his career: “my Ph.D. education (as well as the research we conducted in WEMPEC/CPES) did eventually help me become a better engineer, an independent problem solver, and an original thinker (for which I am eternally grateful).” Dolen joined the Middle East Technical University (Ankara, Turkey) in 2001 where he teaches in the De- partment of Mechanical Engineering. 5.78 Peter Barbosa also emphasizes that CPES prepared him for the inter- national aspect of his career. He was a technical coordinator at CPES before moving to ABB Corporate Research, Switzerland, first as scientist and then as manager of the R&D power electronics group that developed high power converters and devices for vari- ous industrial applications. In 2008, he moved to Delta Electronics, where his responsibilities include product and business development for global markets. “Thanks to the lessons learned at CPES, I have been able to quickly adapt to the changes needed when one seeks to develop an international career.” PETER BARBOSA (Ph.D.) VIRGINIA TECH MELIK DOLEN (Ph.D.) UW The following section describes how CPES has impacted some alumni careers Sam Ye joined VPEC (later be- came CPES) in 1996. In 1999, as Gen- eral Chair of the CPES Annual Power Electronics Conference, he organized a conference for more than 200 academ- ics, industry partners, and government agencies. He is currently director of advanced technol- ogy for LiteOn Power Business Group, especially in its international aspect. After receiving his Ph.D. in 2000, Ye has held several important industry positions, in- cluding at General Electric and Dell World-Wide Pro- curement. In 2006, Ye joined LiteOn Power as Director of R&D. He started a new R&D team in Nanjing, China. In November 2007, he became Director of Advanced Technology Development for LiteOn Power Business Group, leading both Nanjing and Beijing R&D centers. He is responsible for new technology and new product platform development for LiteOn Power. SAM YE (Ph.D.) VIRGINIA TECH EDUCATION & OUTREACH Student Experience CPES 10 YEAR PROGRESS REPORT 2010 Born and educated in China (B.S. and M.S. Electrical Engineering Zheji- ang University, Hangzhou, China, 1999 and 2002), Yan Jiang moved to Virginia in 2002 to pursue her Ph.D. at Virginia Tech CPES. Her dissertation, “Three Dimensional Passive Integrated Electronic Ballast for Low Wattage HID Lamps,” was the first attempt at demonstrating system integration aimed at a com- mercial product using the Integrated Power Electronic Module (IPEM) approach. Yan’s structural, functional and processing integration efforts have resulted in reduced component volume and labor cost, with im- proved power density. In December 2008, Yan joined Linear Technology Corporation in San Jose, CA, as an Applications Engineer. Lawrence Woods served in the military for four and a half years after graduating from Cleveland Heights High in 1985. He was honorably dis- charged in 1991 and continued his education the University of Kentucky in Lexington KY (B.S.E.E. 1998) and NCA&T (M.S.E.E. 2000). Through NCA&T CPES, Woods relocated to UW for one year, where he took courses in power electronics theory and statistics. Woods writes that his experience with stu- dents and professors from different campuses, as well as his participation in conferences around the country, helped him mature as an individual and a student as he adapted to new learning environments. He gradu- ated cum laude and was the only African-American to ever graduate from Oakland University in Rochester, MI with a Ph.D. in Engineering (Ph.D. Systems En- gineering, 2005). After graduating, Woods moved to Goodman manufacturing as a Fellow Engineer, where he works in new product development. 5.79 YAN JIANG (Ph.D.) VIRGINIA TECH LAWRENCE WOODS (M.S.E.E.) NCA&T 5: ACHIEVEMENTS EDUCATION & OUTREACH Pre-College Outreach 5.80 Since 1999, CPES has offered power electronics day camps for pre-college students. These programs expanded to include all core partner campuses and more than 700 high school, middle school, and elementary school children. CPES Partnerships in Engineering Program in Rural Southwestern Virginia Students at Virginia Tech organize and men-tor the FIRST LEGO League program. The program, which can be conducted as an in-school or after-school activity, requires stu- dents to design, build, program, and test a robot to conduct various missions on a competition table. Stu- dents test their robots in head-to-head competitions with other teams. Winners move on to regional and state tournaments. Students also complete research and prepare pre- sentations on the theme of the year. Recently, for ex- ample, the research was based on a “Mission to Mars” theme. During Fall 2003, Virginia Tech students worked with more than 70 students from 10 schools in south- western Virginia, providing guidance and teaching ba- sic science and engineering concepts. The CPES team also hosted a workshop for teach- ers. The workshop included presentations on engi- neering concepts, demonstrations, and a forum for teachers to ask questions and share ideas. The FIRST LEGO League is a collaborative effort involving students from electrical, computer, mechan- ical, and aerospace engineering, engineering science and mechanics and technology education at Virginia Tech. “I think that being part of this team has made me realize how much I really do eventually want to teach . . .” and “I hope there is a way I can do both [research and teaching] eventually.” — Jenny Totten, PER Initiatives Mentor CPES 10 YEAR PROGRESS REPORT 2010 5.81 NCA&T Summer Day Camp After Professor Abdollah Homaifar introduces high school stu- dents to power electronics technology, they participate in state-of the art research and conduct laboratory experiments, the students sub- mit a paper reviewing their experience. Professor Abdollah Homaifar visits area high schools with other NCA&T students and faculty to increase awareness and interest in energy and power electronics. As a result of these visits, NCA&T receives dozens of applications each year to the two-week CPES Summer Camp. CPES graduates and un- dergraduates under the guidance of CPES faculty give the high school students a crash-course in energy and power electronics. RPI Power Electronics Day Camp During this week-long summer program, six to ten students at- tend lectures on the fundamentals of power electronics, participate in hands-on demonstrations of module assembly, hands-on electron- ics work related to power supplies and basic electronic circuits, clean room work, and an introduction to the device characterization lab. UPRM’s Pre-College Engineering Program UPRM’s two-week summer residential program introduces stu- dents to the engineering profession. The program aims to encourage talented high schools students to pursue engineering as a profession by exposing them to the different engineering disciplines. The pro- gram consists of two sessions, each of which has 30 participants (15 male, 15 female). UW Careers (ETC) Camp The UW Careers Camp stimulates interest in engineering and the sciences amongst young women. In addition to lectures, labs and social activities centered on engineering, students experience the UW campus, dorm/college life and the city of Madison. Duke Energy Day Impressed by the transformation of area high school students in the CPES summer camp, Duke Energy decided to sponsor its own outreach effort, “Duke Energy Day.” The event exposes K-12 and col- lege students to energy and power electronics through a series of lec- tures and presentations, a tour of the NCA&T CPES and circuits labs, and introduction to both Duke Energy Company and CPES. The first Duke Energy Day was hosted July 22, 2005. From top to bottom: NCA&T Summer Camp, RPI Day Camp, UPRM Summer Program, UW Careers Camp, Duke Energy Day 5: ACHIEVEMENTS EDUCATION & OUTREACH Professional Courses 5.82 CPES has provided continuing education opportunities to professional engineers in industry through the following short courses: SHORT COURSES YEAR(S) OFFERED Dynamics and Control of AC Drives (UW) 2000, 2002, 2004, 2005, 2006, 2007 Power Electronics: Circuits, Systems, and Industrial Applications (UW) 1999, 2000, 2002, 2004, 2005, 2006, 2007 How to Design Magnetic Components for Power Electronics Circuits (UW) 1999 Novel Power Devices and Integration (RPI) 2005 Modeling and Control of Three-Phase PWM Converters (UPRM) 2005 EMI (VT) 1999 Modeling and Control Design of DC/DC Converters (VT) 1999, 2000, 2002, 2003, 2004, 2005, 2006, 2007 DC/DC Converters and Voltage Regulator Modules (VT) 2002, 2003, 2005, 2007 Analysis and Design of Power Factor Correction Circuits (VT) 1999, 2000, 2002, 2003 Advanced Soft-Switching Converter Topologies and Design (VT) 1999, 2002, 2003 Modeling and Control Design of DC/DC Converters (VT) 2008 DC/DC Converters and Voltage Regulator Modules (VT) 2008 EMI (VT) 2008 Modeling and Control Design of DC/DC Converters (VT) 2009, 2010 Comments from VRM short course participants “Prof. Fred Lee taught the first part very well and kept the interest level in the course material very high. This approach of emphasizing the fundamentals was excellent.” “Dr. Ming Xu explained lots of details, which I found very interesting. I appreciate CPES research results on the CPU or non-CPU VR.” CPES 10 YEAR PROGRESS REPORT 2010 5.83 To maximize opportunities for professional education, CPES has offered Tutorials the day before the annual conferences. Tutorials offered over the ERC lifespan include: “The hands-on lab that followed each lecture was a great strengthening tool for me. It gave me an opportunity to design and work with the dc-dc converters. Also, it provided an opportunity to ask questions about the material and how it relates.” “I feel the course was an excellent source of information. Both instructors (Prof. Fred Lee and Prof. Dushan Boroyevich) were very knowledgeable in the modeling and control of dc-dc converters as well as other topics that had risen throughout the course. It also brought other companies together to discuss new technology that may be helpful.” TUTORIALS YEAROFFERED Reliability in Modules — presented by Dr. Mike Shaw, Rockwell Science Center 2000 POF Reliability of Power Electronics Systems — presented by Dr. Patrick McCluskey, CALCE, University of Maryland State of the art and future developments of power semiconductors and how they fit in system integration — presented by Dr. Leo Lorenz, Infineon Technologies 2002 VRM Design Issues — presented by Dr. Fred C. Lee, CPES-VT Building Reliability into High Temperature Silicon Power and Microelectronics — presented by Dr. Eckard Wolf- gang, Siemens AG, Corporate Technology 2003 Dual-Bridge Matrix Converter — presented by Dr. Thomas A. Lipo, CPES-UW Wide Bandgap Semiconductor Devices — presented by Dr. Paul Chow, CPES-RPI 2004Technologies Involved with a Future Approach to Integrated Power Electronics — presented by Dr. Daan van Wyk, with Drs. Fred C. Lee, Dushan Boroyevich, CPES-VT Advances in EMI Filter — presented by Drs. Daan van Wyk, Fred C. Lee, Shuo Wang, CPES-VT 2006 Challenges and Technologies of Distributed Power Systems — presented by Dr. Ming Xu, CPES-VT 2007Permanent Magnet Synchronous Machines: How Did We Get Here and What Lies Ahead — presented by Dr. Thomas M. Jahns, CPES-UW EMI Reduction and Measurement for Power Electronics Systems — presented by Dr. Shuo Wang, CPES-Virginia Tech 2009 Digital Control — to be presented by Professor Paolo Mattavelli 2010 Comments from Control Design short course participants 5: ACHIEVEMENTS EDUCATION & OUTREACH What Industry Says About CPES Graduates 5.84 “It is inspiring to have access to a positive and open atmosphere… and the enthusiasm for research that ensures CPES always stays on top and at the cutting edge of technology…” — Nils Bäckman, Project Manager, Emerson Energy Systems, AB “CPES is a very high-gain “intellectual amplifier”… CPES students, faculty and staff are always ready and eager to engage us in discussion and joint explorations.” — Trey Burns, VP of Technology, Artesyn Technologies “Excellent education. Very broad with focus on real-life projects and great communication skills… lab skills are world class… Significantly better than most people joining the R&D center. The practice of interaction with industry and many conference presentations is obvious… Great maturity and independence. Able to make good decisions independently and with incomplete data. Very good people skills.” — Vlatko Vlatkovic, Global Technology Leader of Electronics and Photonics Systems General Electric Over the years, CPES has received numerous compliments from industry support-ers regarding our graduates and their readiness for the workplace. Highlighted below are comments from industry from survey responses and feedback after on-campus visits. CPES 10 YEAR PROGRESS REPORT 2010 5.85 “We were particularly impressed by the interactions with your students and staff. During the presentations, they clearly and concisely communicated the progress of each initiative, thoroughly answered questions, and showed surprising sensitivity to the issues of concern to the power supply industry… As a direct result of our visit, I intend to upgrade Celestica’s membership from the Associate level to the Principal level!” — Chris Stratas, General Manager, Celestica Power Systems, wrote after a visit to CPES in 2003 “… Today, the market for semiconductors used in Power Management exceeds $13 billion annual and will grow to about $70 billion annually by 2013! … One organization stands out as the intellectual center of this industry – CPES. Wherever I go in the world of Power Management, I run into former students whose graduate degrees were from one of the CPES groups. These former students, without any doubt, are the thought leaders in the industry. As this became apparent to the folks at International Rectifier, we decided to focus our University recruiting efforts on CPES graduates. We have been absolutely delighted with the results! CPES graduates have a great background in theory, excellent writing skills, and rare lab proficiency. International Rectifier has no less than 13 graduates of CPES institutions in various leadership positions around the world … Behind each of these students was a series of professors at one or more of the CPES schools. I have met and interacted with most of your professors and have found them to be uniformly of the highest caliber in any school in the world. I am in frequent contact with many of your cohorts soliciting new ideas, bouncing ideas for new technologies, and generally, getting sage advice.” — Alex Lidow, Chief Executive Officer International Rectifier 5: ACHIEVEMENTS INFRASTRUCTURE People 5.86 1999 2000 2001 2002 2003 YEAR 6YEAR 5YEAR 4YEAR 3YEAR 2 T. Jahns William E. Newell award F. Lee University Distinguished Professor M. Velez-Reyes IEEE Walter Fee Outstand- ing Young Engineer award R. Lorenz Mead Witter Consolidated Paper Foundation Profes- sor of Controls Engineering F. Lee, T. Lipo, D. van Wyk, and T, Jahns IEEE Third Millennium medals D. van Wyk Byron J. Maupin Professor of Engineering at VT E. Scott Acting Director of the WT/ Wake Forest University School of Biomedical Engi- neering at Virginia Tech T. Lipo Elected Fellow of the Royal Academy of Engineering R. Lorenz IAS Outstanding Achievement award A. Homaifar Duke Energy Endowed Professor of Electrical Engineering at NCA&T CPES Faculty/Staff Growth & Recognition 1998 YEAR 1 R. Lorenz IEEE Fellow F. Lee Director, CPES ERC Arthur Fury Award for ad- vancing power electronics M. Velez-Reyes Distinguished Professor T. Jahns Grainger Professor of Power Electronics and Electric Machines (UW) P. Chow (campus leader), A. Homaifar (campus leader), T. Lipo (campus leader), L. Long, G.Q. Lu, M. Velez-Reyes (campus leader) join CPES team D. van Wyk joins CPES faculty at Virginia Tech J. Helge Bøhn joins CPES E. Scott, K. Thole, and E. Tranter join CPES faculty and leadership team H. Odendaal, F. Wang join CPES faculty at Virginia Tech D. Chen elected IEEE Fellow CPES 10 YEAR PROGRESS REPORT 2010 5.87 Ultimately, CPES is a group of people work-ing toward the common goal of developing electronics technology that processes elec-tricity as efficiently as possible. Throughout the 10 years since CPES was founded, many have contributed their expertise, creativity, and energy to push power electronics forward. At the same time, their CPES experience has impacted their per- sonal outlook and careers. More than 10 faculty members at the five campus- es have received tenure or promotions throught their work with CPES. An additional five received named professorships and two were promoted to department head. 2004 2005 2006 2007 2008 YEAR 10YEAR 8YEAR 7 YEAR 9 D. Boroyevich • European PE-PEMC Council Award for Out- standing Achievements • Service to the Profession Award F. Lee Outstanding Alumni Award from National Cheng Kung Univeristy F. Lee Ernst Blickle award for achievement in power electronics. Second Ameri- can to receive this award. T. Jahns Nikola Tesla award E. O’Neill IEEE Walter Fee Outstand- ing Young Engineer award D. Boroyevich • American Electric Professor of Electrical Engineering • Elected IEEE Fellow M. Velez.Reyes Inducted to the Puerto Rico Academy of Arts and Sciences R. Lorenz Outstanding Achievement award from European Power Electronics Associa- tion. S. Huxtable NSF CAREER award D. Boroyevich William E. Newall award P. Chow Elected IEEE Fellow G.Q. Lu NanoTach R&D Top 100 Award POST ERC CPES celebrates 10 years as ERC K. Ngo, M. Xu join CPES faculty at Virginia Tech T. Lipo Elected to National Acad- emy of Engineering D. Boroyevich PELS President-Elect 2010 P. Mattavelli Joins CPES faculty at Virginia Tech 2010 5: ACHIEVEMENTS INFRASTRUCTURE Facilities The CPES power electronics laboratory and of-fices at Virginia Tech encompass more than 19,000 square feet. CPES at Tech maintains an electrical research lab, an integrated packaging lab, and a computer lab. With the aid of a $1 million DURIP grant, it has upgraded its high power electrical research capability. Virginia Tech is now one of a select few universities with such advanced capabilities, which will help CPES at Virginia Tech maintain its leading position in power electronics. In addition, CPES has modified four rooms to serve as a “living lab” for sustainable building; the lab uses renewable energy sources and shares electricity on the power company’s grid. Electrical research lab The electrical research laboratory is equipped with state-of-the-art power testing equipment, dyna- mometers, prototype PWB manufacturing equipment, an EMI chamber, a clean room, a mechanical shop, and numerous high-end computer workstations. Standard instrumentation is comprised of GHz oscilloscopes; function generators; network, spectrum, impedance, logic and power analyzers; thermal sensors; and ac-dc Virginia Tech One of 50 stations in the CPES Electrical Research Lab at Virginia Tech. 5.88 CPES 10 YEAR PROGRESS REPORT 2010 bench supplies of all sizes. Specialized equipment in- cludes: thermal test equipment, a Hi-Pot tester, a 3D magnetic field scanner, an EMI/EMC analyzer, large and small dynamometers, automatic circuit board routing equipment, programmable and variable loads, and a liquid cooled heat-exchanger. High power A $839,337 grant from the Defense University Research Instrumentation Program (DURIP) allowed CPES to upgrade its high power electrical research ca- pability. The facility has two medium voltage 1 MVA reconfigurable transformers with the corresponding reactors, capacitors, switchgear, and controllers. A 1 MW Innovation Series medium voltage IGBT drive donated by GE is installed as a programmable load. The upgrades allow testing of power converters in various active and reactive operation modes at a con- tinuous level of up to 1 MVA and 4160 V. This makes Virginia Tech one of the few universities with testing capability up to 1 MVA, 4 kV ac, and 15 V dc, which will help CPES at Virginia Tech to maintain its leading position in power electronics research. 5.89 The CPES laboratory High Power Lab Virginia Tech is now one of a select few universities with such advanced capabilities, which will help CPES at Virginia Tech maintain its leading position in power electronics. 5: ACHIEVEMENTS Integrated packaging lab The integrated packaging laboratory is among the most capable power electronics packaging labs in Virginia. It provides the ability to assemble and test IPEMs with industry-standard manufacturing pro- cesses and equipment. The integrated packaging laboratory started with the equipment for such processes as thin film, metal deposition, laser machining, metal plating, wire bond- ing, circuit board creation, flux-less vacuum solder reflow, and low-temperature-cofired-ceramic (LTCC) tape processing. The lab now provides the latest in state-of-the-art manufacturing in a unique, 4000-sq.- ft. facility. New additions include automated dispens- ing of fluid for adhesive and encapsulant application and precision die and component bonding. The lab has a variety of abilities for evaluating the thermal and electronic performance and reliabil- ity of IPEMs. Electrical testing capabilities include low and high power curve tracers, dielectric measurement equipment, and magnetic property analyzers. Thermal evaluations can be made using thermocouples, fiber- optic sensors, IR imaging and thermal diffusivity tests. Reliability analysis is performed using temperature and humidity cycling chambers. Renovations to the lab have created 1,600 square feet of class 10,000 clean-room space through the in- stallation of a new sealed ceiling and HEPA filtration. The lab also has a new dark room for photolithogra- phy work. 5.90 Integrated Packaging Lab at Virginia Tech CPES 10 YEAR PROGRESS REPORT 2010 5.91 Computer lab The 200-system computer lab supports the use of major software used in power electronics analysis and design. Programs available for use include SPICE, Sa- ber, PSCAD/EMTDC, I-DEAS, Analogy Design Tools Workbench, Ansoft-Maxwell 2D and 3D finite-ele- ment analyzers, Mentor Graphics and Cadence circuit simulation software, SIMPLIS, TMA, FLOTHERM cir- cuit thermal analyzer software, Silvaco device simula- tion software, iSIGHT, Ansys, and PLECS. Support facilities Support facilities at Virginia Tech include office space and a research library. A large conference room with voice and video conferencing facilities supports remote course instruction and collaboration among CPES members. Living lab CPES has created a “living lab” with a conference room, library, kitchen, and laundry room. Electricity in these rooms is supplied by a dc bus distribution system with automated source and load management. Local solar panels and a wind power generator are in- terconnected with battery subsystems and the power company’s electrical grid. When locally produced re- newable energy is sufficient, the “living lab” supplies its excess of renewably-generated energy to the electrical grid. Conversely, it draws power from the grid when local energy demands exceed locally-produced renew- able energy. The “living lab” has variety of forward-looking electrical loads, including Plug-in Hybrid Electric Ve- hicles, high-efficiency LED lamps, and energy-efficient home appliances and electronics. These include a wash- er, dryer, microwave oven, electric range, dish washer, refrigerator, air conditioner, and even home robotics. Home automation technology manages power genera- tion, conversion, and usage through the use of wireless control and monitoring of power consumption. This lab is described in more detail in Chapter 6. 5: ACHIEVEMENTS5.92 The UW power electronics laboratory occupies more than 7,000 sq.ft. devoted to state-of-the-art high power conversion, motor drives, pow-er quality, and motion control equipment. It is equipped with more than 30 movable workstations for up to 60 graduate students to work on machines, mo- tor drives, power electronics circuits, and machine and power electronics packaging research. A large range of test and measurement instrumen- tation for power electronics and machines research is also available, including 11 machine bases, a range of dynamometers up to 70 hp, commercial and custom power converters, and DSP-based controllers. Printed University of Wisconsin-Madison CPES 10 YEAR PROGRESS REPORT 2010 5.93 A dynamometer is used to test a high- torque axial-airgap PM alternator machine that is part of a wind turbine drive development project. circuit board assembly/disassembly equipment in- cludes a pick-and-place machine, a solder reflow oven, inspection microscope and soldering and de-soldering equipment. A 36-cubic-foot Envirotronics environmental chamber enables testing from -73 to 177 degrees C. The lab contains a Flir real-time infrared temperature measurement camera system to complement the setup. A lab-wide busway allows clutterless electrical in- terconnection between workstations. Available power includes 480 V three-phase ac, 208 V four-wire, three- phase ac, 230 V three-phase ac, and 230 V dc. CPES enhancements CPES funding and cost-shared capital equipment expenditures at UW have enabled the purchase of three dynamometer test stands that are critical to ongoing development of high-performance ac machines for a variety of demanding industrial, traction, and aero- space applications. Rockwell Automation and Danfoss donated four-quadrant adjustable-speed drives for the 30 kW induction machines (capable of 6000 rpm) at the heart of the dynamometers. Critical components in the dynamometer instrumentation include preci- sion in-line torquemeter and multi-channel oscil- loscopes. The combination of this instrumentation makes it possible to accurately measure the efficiency of test machines across a wide range of operating con- ditions. The lab has also purchased equipment for use with the test stands: a high-power programmable ac power supply and development equipment for rapid prototyping controls. UW has also constructed a laboratory testbed that represents a scaled down version of a possible residen- tial power system using high-frequency ac current. A medium voltage test rack in the University of Wisconsin lab. 5: ACHIEVEMENTS Rensselaer Polytechnic Institute RPI has well equipped facilities for materials characterization, processing and device fabri-cation research. Key central facilities include: a class 100 microelectronics clean room for semiconductor processing, device fabrication and electron microprobe X-ray analysis. The CPES lab includes a low-pressure cold-wall reactor dedicated to growing p-type and n-type SiC films and a vertical hotwall SiC reactor for thick, low- doped epitaxial films. Other facilities to characterize materials include a double crystal X-ray diffractometer, variable tempera- ture and variable magnetic field Hall measurement system, Fourier transform infrared (FTIR) spectrom- eter, low-temperature PL system, and a C-V and I-V measurement system. A spectroscopic ellipsometer is also available for use. Device characterization All the device characterization equipment is spe- cially suited for SiC, such as a Sony/Tectronix 370 A curve tracer, an HP 4155 parametric analyzer, a 500 MHz digitizing scope, a computer controlled C-V and I-V measurement setup, a high-temperature (up to 400° C) manual probe chuck and controller. RPI sports all the design and simulation tools that are needed for device modeling and mask layout. These include 2D and 3D numerical device and pro- cess simulators running in a cluster of IBM RS-6000 workstations specially dedicated to semiconductor de- vice and IC design. 5.94 Above: a researcher uses the GCA photolithography stepper at RPI. CPES 10 YEAR PROGRESS REPORT 2010 Far left: An optical aligner. Center and right: Key facilities include a low-pressure horizontal cold-wall reactor dedicated to grow p-type and n-type SiC films and another vertical hotwall SiC reactor that is suited to grow thick, low-doped epitaxial films. New equipment for the distributed generation testbed. 5.95 Custom-designed SiC CVD CPES has made a substantial capital equipment investment in its purchase of a custom-designed SiC CVD (chemical vapor deposition) reactor with an RF power supply and a reactor chamber scale-up. Since its purchase, this reactor has been involved with pioneer- ing SiC epi growth (such as in situ phosphorous dop- ing in 4H-SiC) and identification of defect formation during epi growth, and has acted as an in-house source of epi layers for prototype power device fabrication, al- lowing CPES to realize novel SiC devices. Undergraduate lab upgrades CPES support has led to significant improvements to the Faraday Lab, the main undergraduate educa- tion and research lab at RPI. This equipment fund- ing enabled an upgrade of major lab equipment. The lab now has new data acquisition systems that consist of digital oscilloscopes, wide bandwidth current and voltage probes, and data storage media. New electrical equipment includes signal generators and power sup- plies. New computers and simulation software are also available for use. These upgrades have significantly im- proved the quality of undergraduate education. Distributed generation testbed Seed funding from CPES led to the capture of major New York State Foundation for Science, Tech- nology, and Innovation (NYSTAR) grant to develop a renewable energy and distributed generation testbed. This two-year, $1.25 million project aims to develop a testbed for the study of future electric grids that in- clude renewable energy and distributed generation. The testbed consists of test benches for fuel cells, solar panels, wind power, and energy efficient loads such as solid-state lighting and variable-speed drives. Devel- opment began in 2007. 5: ACHIEVEMENTS The UPRM faculty has leveraged CPES resourc-es to improve laboratory infrastructure as well as graduate and undergraduate education.More than $1.3 million from government and industry has improved power electronics infra- structure at UPRM in the last decade. CPES funds, combined with other government and industry grants, have allowed the development of a 2,700 square foot facility for research and education in energy process- ing and electronics to support CPES and other work. The laboratory was established under an NSF grant (PECASE Award), and, as part of CPES, was expanded by the Major Research Instrumentation Award by NSF in 2002. In 2007, about $100,000 was invested from CPES and UPRM matching funds towards upgrades for the research and educational power electronics laboratories at UPRM. These upgrades provided com- puters and instrumentation for the power electronics capstone design course, as well as a network analyzer and instrumentation to support research activities in power electronics. The shared state-of-the-art facilities made avail- able through CPES partnerships have been instru- mental in ensuring success of proposals for associated funds, including Career Awards, equipment grants, and other large research initiatives. E2PSyL The Electric Energy Processing Systems Labora- tory (E2PSyL) is a leading facility in the Caribbean in electric energy research and education. The lab has experimental and computational facilities for power electronics and power systems, while also support- ing multi-disciplinary projects with Mechanical and Chemical Engineering. E2PSyL encompasses three distinct areas: energy systems and component testing and prototyping; en- ergy systems component modeling and simulation; North Carolina A&T State University NCA&T’s power electronics labora-tory, located in the Autonomous Control and Information Technol-ogy Engineering Center, is almost 3,200 square feet. The lab incorporates its own domain and Internet servers as well as video conferencing room that is used to communicate and collaborate with other research universities in the United States. The Center houses a state-of-the-art cross- platform computing environment composed of Windows, Sun Solaris, and a Silicon Graph- ics IRIX server. Modeling and control algorithms are imple- mented in software using the simulation and modeling software tools, such as Saber, I-DEAS, MATLAB, Simulink, GLOTHERM, and I-SIGHT. Hardware equipment includes digital storage oscilloscopes, current probes, an ac control power supply, a logic ana- lyzer, a spectrum analyzer, a power analyzer, an RLC meter, a PC-based online controller and low-voltage dc power supplies. Thanks to NCA&T’s involvement with CPES, the university is experiencing increased student involvement in power electronics. NCA&T has begun steps to equip a teaching lab for power electronics to accommodate and en- courage this interest. CPES continues to have a vital impact on the educational infrastructure by enhancing the curriculum at the undergraduate and graduate levels and affecting the shape of research through inter-university collaborations. NCA&T also added a power electronics professor in fall 2007. University of Puerto Rico-Mayagüez 5.96 CPES 10 YEAR PROGRESS REPORT 2010 and power quality and energy studies. Testbeds for power electronics and drives, power quality, and tran- sient studies were developed thanks to a 2002 $150,000 Major Research Instrumentation Award by the NSF Electrical and Communications System Division. The testbeds can handle power levels up to 37.5 kW, which is compatible with many industrial applications. Energy Systems Instrumentation Lab ESIL provides more than 1,200 square feet for lab- oratory courses, lab session within courses, seminars and student projects. The lab contains two areas: the energy conversion lab and a power engineering cap- stone design area. Integrated Circuits Design Lab This facility provides 800 square feet devoted to designing and testing analog, digital, and mixed-signal integrated circuits and systems. The facility was estab- lished in 1999 with the sponsorship of Texas Instru- ments. It provides 16 design workstations running industry-grade software for design and validation in bipolar and MOS technologies. The lab also offers four testing stations used by advanced electronics students and graduate students. Software includes NI-LabView, Tanner Tools, Aldec ActiveHDL/Synplify, and Xilinx IDE 7.0. Rapid Systems Prototyping Lab This lab provides infrastructure and program- ming tools for developing prototypes from hardware description languages. It also provides modeling and simulation tools, reconfigurable hardware platforms, testing equipment, and system development tools. This dedicated research lab provides 350 square feet of space accommodating eight workstation and one pro- totyping workstation. In addition to ICDL tools, the lab offers Maxwell Q3D software from Ansoft. Power Quality Laboratory at UPRM Prototype Laboratory at UPRM 5.97 5: ACHIEVEMENTS INFRASTRUCTURE Financials 5.98 CPES, as a multi-university ERC, is set up to effectively utilize assets and resources re-ceived from a wide array of sources includ-ing NSF, university cost sharing, industry consortium contributions, and sponsored research. In the ten years since inception of the ERC, the Center has used these financial resources to ensure that the stra- tegic plan and the performance of individual institu- tions have enabled the Center to have an impact on the power electronics community, reducing power con- sumption and increasing power efficiency worldwide. Virginia Tech, as the lead university, is responsible for the overall management and financial administra- tion of the center. Fiscal resources were dispersed to partner institutions based on the annual analysis of the strategic plan, performance of the institution within its research area of expertise and the infrastructure support needs. Since graduation, funds are received at the individual institution unless collaborative research is taking place. The total resources that the Center has received from all sources during the period of August 1, 1998 through July 31, 2009 totaled approximately $81M, including both cash and in-kind contributions. NSF funds accounted for $30.3M or 37.5 percent of the total resources with over 73 percent of those re- sources supporting research. The remaining NSF re- sources covered education initiatives, outreach pro- grams, and administration and management of the five universities. Cost share accounted for $15.4M or 19.2 percent of the money received over the life of the Center. All remaining funds, $35M came from industry either in the form of sponsored research or membership in the CPES Industry Consortium. From the inception of the Center, management anticipated the need to plan for long-term financial health and stability and has vig- orously pursued opportunities to meet the challenge. As the Center moved closer to graduation, efforts were made to secure cost sharing for the center from each partner university for a period of three years out. In In-Kind 10% Major Isolated 0% Directed Research 8% Faculty 10% Post Docs 0% Students 22% Research Staff 2% Administration/Management 5% Other Salaries 0% Fringe Benefits 5% General Operating Expense 16% Equipment 4% Indirect Costs 18% CPES FUNDING BY EXPENDITURE CATEGORY 1998-2009 ($80.9M) CPES 10 YEAR PROGRESS REPORT 2010 5.99 MEMBERSHIP DOLLAR GROWTH 20091983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 $2M $1.5M $1M $0.5M $0M addition, efforts were made to ramp up sponsored re- search to replace the loss of the NSF research money. Finally and most importantly, recruiting of indus- try members was seen as a target for both increased membership funds and fellowships. This increase in membership was not only important in terms of dol- lars but also as a source of leadership, insight, and in- surance for future collaboration to propel the future of power electronics. True to this goal, CPES has sig- nificantly grown the industry collaboration program from $0.4M annually in 1998 to over $1.5M annu- ally in 2009. Sponsored research has again started to expand as the NSR-ERC wound down. The future of CPES looks bright. 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 00 01 02 03 04 05 06 07 08 09 10 PERG VPEC CIT/TDC VPEC NSF ERC CPESSponsored Research Partnership University NSF CIT - $3 million RESEARCH FUNDING 1977–2009 6.0 BEYOND GRADUATION CHAPTER 6 Over the 10 years of serving as an NSF Engineering Research Center, CPES built a synergetic research program that tied together five par-ticipating universities and 80 industry partners. The Center’s impact reached to almost every aspect of the power electronics field. This impact is reflected in the Center’s vision that emphasizes a technical focus and long- term impact on society. The challenge now is to continue the realization of the IPEM concept for power electronics systems integration to a wide range of next-generation energy efficient and environmentally friendly applications. It is imperative that CPES maintain the multi-university, multidisciplinary collaboration and the integrated power electronics curriculum across partner campuses. CPES Vision: Providing leadership through global collaborative research and education for creating electronic power processing systems of the highest value to society. CPES 10 YEAR PROGRESS REPORT 2010 6.1 Beyond Graduation: the CPES Vision Developing a Post-Graduation Plan Technology Roadmap Roadmap: Integration and Packaging Roadmap: Modeling, Analysis, and Design Tools Roadmap: Power System Architecture and Management Roadmap: Smart Electro-Mechanical Energy Conversion Systems Roadmap: High Power Conversion Technology Roadmap: System-Level Modeling and Control Roadmap: Sustainable Energy Systems Post-ERC Research Technical Challenges Organizational Evolution Research Structure Sustainable Building High Frequency AC Buildings Energy for Portable Appliances Advanced motor controller Education & Outreach Business Plan Institutional cost sharing Industrial consortium support Fellowships Sponsored Research 6.0 6.2 6.4 6.7 6.7 6.8 6.8 6.9 6.10 6.11 6.12 6.12 6.14 6.16 6.18 6.20 6.22 6.24 6.25 6.26 6.26 6.27 6.28 6.30 CHAPTER 6 CONTENTS 6: BEYOND GRADUATION Developing A Post-Graduation Plan The post-graduation CPES plans evolved from a 2005 self-sufficiency plan requested by NSF, plus numerous meetings and discussions of CPES leadership and the Industry Advisory Board. A portion of the 2007 Industry SWOT ques- tionnaire was dedicated to initiatives related to post graduation. In the post-ERC era, it will be increasingly important for the Center to align our research focus and direction with industry needs. In addition, CPES conducted several formal meet- ings with leaders in the field: 1. a half-day workshop “From Success to Sig- nificance” in 2005 2. a one-day, “Industry CTO Summit” in 2006 that involved chief technology officers from 47 organizations 3. Three global outreach workshops focused on a 10–30 year power electronics roadmap. 6.2 1. Continued collaboration of the five ERC universities, with efforts to expand the collabo- ration to other U.S. and international organiza- tions. 2. Consolidation of the research thrusts to maintain the critical mass and core competence already assembled; plus the addition of new re- search thrusts with additional industry and/or government funding 3. Strengthening the industry consortium for increased funding of research and infrastruc- ture. This requires a step-up effort in recruiting new Principal Plus members in focused research areas. 4. Organized effort and pursuit of opportu- nities in emerging areas like high-temperature electronics, energy management and energy ef- ficiency, electromagnetic interferences, etc. 5. Continued institutional support by the five ERC universities for at least three years after NSF graduation, to maintain the infrastructure and facilities and to continue curriculum cross- listing, distance delivery and student-faculty ex- changes. 6. Continued outreach roadmap activity, in collaboration with the European Center for Pow- er Electronics (ECPE) and Japan’s Advanced In- dustrial Science and Technology Power Electron- ics Research Center (AIST-PERC), focusing on identifying opportunities where the application of efficient power electronic/electro-mechanical technology would increase overall system effi- ciency. Components of the post-graduation plan CPES 10 YEAR PROGRESS REPORT 2010 6.3 STRATEGY Akey factor in any future research direction is the availability of funding. New research initiatives should still be based on the strength and core com- petence of the current CPES research team, covering areas ranging from conversion systems, circuits, and controls, to power semiconductor devices, passive components, materials, packaging, thermal manage- ment and the IPEM approach to provide an integrated system solution. The new research directions should serve the needs of emerging applications such as alternative en- ergy, more energy efficient and cleaner transportation (including automobiles, trains, airplanes, and ships), and energy-efficient lighting and appliances. These new applications reflect current trends in technology, market, and environmental and societal needs. Engag- ing in these emerging applications will enable CPES to continue to achieve a broad impact. This research fo- cus will also help to attract new funding sources. CPES should expand its research scope to cover applications and issues in wider power ranges (from low power to high power) and application domains. Future research should also embrace cutting-edge technologies, such as new materials, sensors, proces- sors, communication, and cooling technologies, devel- oped in other fields. Alternative energy and new storage technology The country’s focus on developing alternative and distributed energy resources coincides with stor- age technology diversifying to different battery tech- nologies, super capacitors, superconducting mag- netic energy storage (SMES), and flywheels. These all require power converters for grid and load interfaces. Distribution networks In spite of the obvious advantages from better dynamics, along with enhanced control and com- munications, the proliferation of power converters in distribution networks has been slow – especially in high power applications. The potential is not just in land-based transmission networks, but also in all- electric ships and more-electric airplanes. Power system architecture Power system architecture/control and power/ energy management comprise an emerging area of research with growing interest from both govern- ment and industry. For example, the U.S. federal 80 plus requirement, which mandates all IT equipment meet or exceed 80 percent efficiency at 20 percent load, is being voluntarily strengthened by many U.S. firms who are pushing the requirement down to 10 percent and 5 percent load levels for various applica- tions. An area of special interest is the total redesign of data center power architecture from the current ac distributed system, using off-the-shelf equipment, to a new power system architecture based on high- voltage dc systems. Initial studies have indicated that efficiency could be improved by 10-20 percent. The push for more efficient power conversion equipment means that power electronics design practices must shift from mostly custom-designed systems to a more standardized, modular building-block based design, such as the CPES IPEM technology. These systems could contain a certain degree of intelligence and the ability to communicate with high-level system com- mand along with the ability to perform health moni- toring and diagnostics. EMERGING APPLICATIONS 6: BEYOND GRADUATION6.4 Building A Technology Roadmap Although it is a critical enabling tech-nology for solving many energy and environmental issues, power electron-ics does not enjoy the public recogni- tion and attention it deserves. The absence of a clear technology roadmap and fragmented re- search efforts contribute to this problem. Need for roadmap It is important for power electronics re- searchers and educators around the world to join forces, focusing limited resources on true chal- lenges and opportunities. A jointly developed, high- level roadmap would provide guidance while commu- nicating the importance of the technology worldwide. Workshops to build roadmap With supplemental grants from NSF, CPES or- ganized three research outreach workshops focused on the development of power electronics technology roadmaps. Workshop discussions have helped to iden- tify many application and technology areas critical to power electronics for the next 20-30 years. 1st Outreach Workshop Building initial roadmap framework The first Outreach Workshop, held in November 2005, in Hilton Head, South Carolina, was called, “Im- pact on Academia on the Future of Power Electronics.” The workshop attracted 42 participants, including 26 invited academic experts from 12 countries. Work- shop participants identified issues and opportunities in power electronics, jointly discussed the develop- ment of power electronics technology roadmap and explored mechanisms for collaboration. 2nd Outreach Workshop Continued roadmap with industry input The second workshop was help in October 2006 in Tampa, Florida to continue the long-term road- map development effort initiated in 2005. Industry experts were invited to participate to provide insight and guidance and to ensure that industry perspective was included in the roadmap. Participants identified and discussed key technology areas that must be ad- dressed in order to fuel the advance of key application areas. Attending were 41 participants, including 28 in- vited guests from academia and industry representing 12 countries 3rd Outreach Workshop Extending roadmap to sustainable energy In October 2008, a third workshop was held in Lake Louise, Canada. The workshop extended the previous roadmap discussions to address power elec- tronics technologies and applications associated with sustainable energy. The workshop attracted 43 partici- pants, including 34 invited guests from academia and industry representing 12 countries. The second Outreach Workshop was formed to gather industry input on the technology roadmap. CPES 10 YEAR PROGRESS REPORT 2010 6.5 Top: The third Outreach Workshop, held in Lake Louise, Canada, focused on power electronics issues in sustainable energy systems. Left: The first workshop, held in Hilton Head, South Carolina, laid the ground- work for the technology roadmap with academi- cians. 6: BEYOND GRADUATION6.6 How can CPES best serve industry & maximize industry partner benefits? CPES should emphasize multi-disciplinary stu- dent training; focus more on systems architecture; allow better access to faculty for advice and students for mentorship; offer more continuing education opportunities; enhance industry-student inter- changes; provide more effective technology transfer mechanisms; help bridge the gap between research and industry implementation; play an instigator role of new systems architecture; keep up fundamental research in component and packaging; continue to expand global outreach; and maintain the Center’s unique position to lead and impact energy efficiency via advancements in power electronics technologies. With the change in global environment, how can we better prepare the next generation of engineers? Encourage industry to share the responsibility and provide mentorship for training engineers; em- phasize quality of research and development; pro- mote the teamwork culture; stress the importance of multi-disciplinary system engineering skills; foster opportunities for real-world exposure such as sum- mer internships; cultivate soft skills such as commu- nication and people skills. How can we align CPES and industry technology roadmaps? Roadmap alignment between CPES and indus- try is needed; disruptive technologies and proof-of- concept are required; industry should fund CPES to work on technology roadmap; nature of roadmap should define the system level problems to be solved and the nature of solutions, and metrics informa- tion needs to be “public.” Basic vs. applied research: What is the optimal balance? As this issue will always be there, the questions might be longer or shorter term, or clear goal or open-ended goal; CPES should focus on pre-com- petitive research, be given a chance to fail (off the roadmap), and have a bias towards more basic re- search. KEY ISSUES DISCUSSED AT THE CTO SUMMIT The 2006 CTO Summit attracted 60 technology leaders from 47 organizations and engaged them in strategic discussions to ensure a strong and sustainable future for CPES beyond graduation. CPES 10 YEAR PROGRESS REPORT 2010 Technology Roadmap Key Technologies Metrics Current Status 2010 Projection 2020 Projection System-level optimization tool energy flow none basic intermediate Subsystem-level design tool basic intermediate mature System-level modeling and simulation tool Efficiency basic mature mature EMI none basic intermediate Reliability basic basic intermediate Control basic mature mature Subsystem-level (circuit) modeling and simulation Efficiency intermediate intermediate mature EMI basic basic mature Reliability basic basic mature Control intermediate mature mature Power density basic intermediate mature Component-level modeling and simulation A: passive B: active Losses A: basic B: intermediate mature mature EMI basic intermediate mature Reliability A: intermediate B: basic A: mature B: intermediate mature 6.7 Area 1: High-Density, High-Temperature Integration and Packaging Area 2: Modeling, Analysis, and Design Tools Key Technologies Metrics Current Status 2012 Projection 2020 Projection Monolithic integration A: power devices + control B: converter on a chip Footprint driven A: Gate drive, low-V dc-dc B: < a few W A: 400-600 V, 300 kHz B: 100 MHz, 100 W A: 1 MHz B: >100 MHz Heterogeneous/hybrid inte- gration Including thermal Volume driven Gate drive, switch modules Integrated passives, thermal, EMI Integrated passives, thermal, EMI, switches Packaging/assembly technology Cost, therma, stray R, L SMT, (CSP) CSP, lamination of functional elements System integration Eliminate package Converter integration Separate devices, converters, pasives, motor vendors Alliances and mergers Thermal management Reduce separation need for high and low loss densities Component level: double side, heat pipes System level: high and low loss density physically close; micro-channels, etc. EMI management “End of pipe” solution Distributed EMI management 6: BEYOND GRADUATION6.8 Key Technologies Metrics Current Status 2015 Projection 2025 Projection System performance optimization • System engineering with understanding of system process • Defining requirements, processes and interfaces for optimal utilization • Energy Efficiency • Availability • Reconfigurability • Applicability • User value, Supplier value • Static specific • Uncoordinated with source and load • Dynamically optimized performance with respect to source and load change • Self -configuring power network Power (conversion) system architecture • Ride-through energy storage • Standardization • Efficiency • Flexibility • Adaptability • Scalability • Density • Rigid, fixed, customized • >95 percent efficient Offline adaptive architecture • Power management enabled • Online adaptive optimizing Diverse and multi-functional sources • Alternative energy • Distributed generation • Penetration • Modularity and standardization • Ease of implementation Cost • Mostly centralized sources • Limited small- scale penetration • Appliance level sources • Emergency power • CHP (combined heat and power) • Sustained penetration High-density power converters • ac-dc • dc-ac • dc-dc (isolated) • dc-dc (non-isolated) • Efficiency • Density • Life cycle impact • 85-90% • 10-100 W/in3 • Poor (to be confirmed) Fault tolerant power electronics • Fault current limiting • Break-through self protection and correction • Internal Fault- tolerant • External Fault- insensitive • Reliability • Minimal fault -tolerant • Reliability 1X • Fault tolerant as standard • Reliability 5X • Reliability 10X Digital power management control, sensing and communication (systems) • Penetration • Functionality • Standardization • Fault Tolerance • Low • Limited • Low • Ad hoc • Standard expectation • Multi-level diagnosis and response • Intelligent self-powered sensors • Pervasive use • Autonomous self-configuration Area 3: Power System Architecture and Management Key Technologies Metrics Current Status 2020 Projection 2040 Projection Master Application Architecture • Life-cycle value • Energy savings • Productivity • Environmental societal value • Cost (value) • Reliability • Flexibility • [Secondary] [$/W] [$/FEATURE] [Balanced Noise Index] • POU (point of use) • INFLEXIBLE • Locally Minimal; Globally Sub-optimal • Extensible modularization • 4X life-cycle Value • 4X Energy Sav- ings • Standard Cell • 8X life-cycle value • 8X Energy Savings Integrated Process -Conversion System Topologies EM Integration Material-Mfg Systems Cell Integration Systems Distributed Adaptive Systems Breakthrough Robust System Topologies Coordinated control process enhancement Moving from single axis to multi-axis control Cross-coupled with system level communication Integrated sensing, diagnostics & prognostics Sensor replacement methodologies Harmonic energy manipulation Area 4: Smart Electro-Mechanical Energy Conversion Systems (Consumer Example) CPES 10 YEAR PROGRESS REPORT 2010 Key Technologies Metrics Current Status 2020 Projection 2040 Projection Switches: • light controlled; • series stackable; • low loss SiC-Diode; • hybrid Si/Mechanical; • SiC (WBG); • defined failure pattern; V, f, reliability • 100 mm low-sat, slow SCR • 100 kV/2 kA • 1200 V/50 A • 6 kV/3 kA/no fault • 10 kV/100 A SiC MOSFET/ Diode modules • only exist for press-pack SCR • 100 mm, 6 kV, fast SCR • 12 kV/1 kA • SiC 15 kV/1 kA IGBT • Fast 100 mm GTO • 345 kV/3 kA /60 kA (Fault) • SiC 15 kV/5 kA Transfer switch 36 kV/600 A 10X rating Fault current limiting Can be set and reset (need) 20 kA/25 kV (345 kV available SCR tech) 60 kA/345 kV Power converters for power-flow control, protec- tion, and safety Cost, reliable & distributed • 138 kV/1 kA FACTS • 345 kV/3 kA FACTS Distributed 69-345 kV Fault tolerant power electronics, unimpaired operation Maintenance by lineman Modular concept Line replaceable Self-healing Galvanically isolated high power converter with over 99% efficiency (control Transformer) 150 kVA/1 kV 10 MVA/Medium V 100 MVA/HV Back-to-back converter Cost, reliability HVDC, VFT (100 MW) Load leveling/storage Cost, size, life Very primitive 50 kWh, 315 lbs. 1M cycles (super cap); REGENSYS – flow bat- tery 10 MW per 3 h 10X MV DC distribution system to replace existing AC system Cost, power den- sity of corridor Point to point 100 kV, 500 A Architecture: • large offshore wind farms • distributed grid- connected resources Power quality, reliability Power density • 3 MW windmills, AC 115 kV, 20 km Dispersed • dispatching 10 MW wind mills, 5X weight density • MV dc, 300 MVA (25- 100 km) • decentralized • Autonomous fail-safe 6.9 Area 5: High Power Conversion Technology 6: BEYOND GRADUATION Key Technologies Current Sta- tus (2008) 2015 Projection 2030 Projection Component modeling Component focused System oriented System integrated Energy-based system modeling • Multi-physical and causal modeling • System-level modeling (energy-based) • Optimization algorithms Spreadsheet Standard-cell, open-architecture power Process control analysis including dynamic-stochastic modeling • Power distribution architectures • Control architectures Rudimentary Reliability modeling • Model complexity reduction Component level System level System-level design capability • System architectures Basic functions Optimized Process control • Communications protocols • Sensors Rudimentary Automated Dynamically optimized Combined energy generation and storage (thermal, mechanical, and chemical with electrical Cost modeling • Modeling with different levels of abstractions (must include energy and quality-of-life aspects) Area 6: System-Level Modeling and Control At the 2008 workshop in Canada, participants refined the existing roadmap and expanded it to include two new areas: (1) Architecture, Energy Efficiency, Power Management, System Science, And System-Level Control and (2) Sustain- able Energy Systems. The former is to include system-level technology and pow- er management in larger systems beyond IT. The Sustainable Energy Systems area was added to encompass power electronics technologies and applications associated with sustainable energy. 6.10 CPES 10 YEAR PROGRESS REPORT 2010 Key Technologies Metrics Current Status 2020 Projection 2030 Projection Reliability for wind (Transformer corrosion, gearbox, grid codes) MTBF, field replaceable PV cost $/W $3-$5/W system ($.06/W inverter) $0.12/W inverter $0.03/W inverter PV reliability Life time 5-10 years 15-20 years 30 years Grid integration of wind farm (other sources) Transmission flow congestion Control of microgrids Control based local optimization based on comm. Hierarchical master-slave, limits islanding Distributed, autonomous Fault management of microgrids 1. ID and management of internal fault 2. ID and management of grid fault Bulk energy storage 1. Return efficiency 2. E density 3. P density 4. Cycle life 5. Cost Compressed air energy storage, pump hydro, battery EV distributed Virtual energy storage (DSM) Transmission and Distribution Dynamic grid control Voltage regulation Power flow controller, fault current Retrofitting incandescent & CFL with LEDs Cost, thermal, life, package, light quality $80-$100 1000 life hours $15-$20 Area 7: Sustainable Energy Systems 6.11 6: BEYOND GRADUATION6.12 POST-ERC RESEARCH Technical challenges In the continuous search for more energy-efficient power management solutions for a wide range of applications, power density improvement has al-ways been a goal. Higher density will eventually lead to better performance and lower cost. In the past, higher density has been naturally achieved through newer, faster, and lower-loss switching devices that resulted in a reduced need for energy storage devices, filters, and cooling systems. As the switching frequency continues to increase, the thermal and electrical limitations of materials, es- pecially for passive devices, become barriers. CPES ex- pertise in system integration makes the Center unique- ly positioned to play a leadership role in high-power density conversion technologies. The promise of core technologies During the ERC years, CPES developed promis- ing new power electronics technologies, including new types of power semiconductor devices, planar inter- connect processes, sensor integration techniques, ther- mal management configurations, and high-tempera- ture materials. These core technologies offer a promise of higher performance at lower cost with improved reliability. We expect these technologies will generate many new opportunities for sponsored research by CPES universities during coming years. 1. High Temperature Power Electronics We expect high-temperature power electronics to be a target for increasing research and develop- ment activities during coming years. The emergence of wide bandgap semiconductors such as silicon carbide (SiC) makes it possible to operate power converters at increasing temperatures up to and beyond 200° C. Higher operating temperatures enable increased pow- er density and applications under harsh environments, such as military systems, transportation systems, and outdoor industrial and utility systems. On the other hand, high-temperature power electronics require much more than just high-temperature devices; ma- terials, packaging, passive components, and cooling must all be taken into consideration. CPES has been serving the leadership role in re- search and development of wide-bandgap materials and advanced power electronics packaging. Specifi- cally, in the last two years, the Center has initiated ba- sic research on high-temperature materials electronics packaging for power devices and integrated passives. This represents a natural growth area for CPES. Significant progress has already been achieved towards the development of high-temperature power semiconductor devices and their associated packag- ing, but there is much more that needs to be done. In addition to NSF support, the Center has secured re- search funding from such organizations as DARPA, Boeing, ABB, Raytheon, and Rolls-Royce. Government agencies including the U.S. Army, Navy and the U.S. Air Force are already investing in these technologies, and several others, including the U.S. Department of Energy, are expected to become involved during the coming years. Center researchers will be in an excellent position to compete for such research opportunities by leveraging the high-temperature power electronics technology that has already been developed using NSF funding. CPES 10 YEAR PROGRESS REPORT 2010 6.13 2. Electromagnetic Interference and Compatibility Another important technology area in which Center researchers are well positioned is power qual- ity and, more specifically, electromagnetic interference and compatibility (EMI/EMC). As the power electron- ics content of future systems increases, so do electro- magnetic interference and noise issues. It becomes harder to ensure that all of the loads and sources can co-exist with appropriate levels of power quality and communication linkage. Meeting stringent electro- magnetic compatibility (EMC) characteristics become even more important. CPES has demonstrated that one of the most effec- tive ways to deliver the needed power quality and EMC performance is to integrate these features directly into the power electronics modules. This approach avoids the bulky and expensive filter blocks that would oth- erwise have to be added as engineering afterthoughts. Most of the fundamental exploratory research was funded under NSF support, but the Center is attract- ing other sponsors in this area, including SAFRAN and ABB. CPES researchers are well positioned to play ma- jor roles in helping industry and government agencies find high-performance, cost-effective solutions. 3. Energy Efficiency and Power Management Energy efficiency is a key concern for all electrical systems, from sources and delivery systems to loads. Energy management is important for small wireless devices, mobile units such as laptops, and medical de- vices, as well as for large server and data centers, build- ings, transportation systems, and utility microgrids with distributed power sources. Many power electron- ics technologies, including components, sensors, con- trol, system architecture, and thermal management, must be involved for superior energy management solutions. Expertise in several of these application areas al- ready exists among the CPES universities and new re- search projects are under way to identify opportunities to exploit these strengths by drawing on the rich CPES technology base. Recently, the Center’s PMC mini-consortium ex- panded its research mission beyond the power deliv- ery and power management of the new generation of microprocessors. The new scope encompasses the fol- lowing aspects: efficient power management for small hand-held equipment such as cell phones, PDAs, lap- top/desktop computers, power architectures for serv- ers and telecom systems. Also, in the final two years the Center set aside $1 million to explore emerging power electronics technologies and applications using the future sustainable home as a platform to demonstrate the potential energy savings and energy sustainability based on renewable energy sources. Some of these potential application areas also suggest opportunities for engaging industrial partners and other non-CPES universities as members of future technology teams to aggressively pursue these technol- ogy development programs. 6: BEYOND GRADUATION6.14 Since the inception of CPES, the research vi-sion has been to overcome an expensive, custom-designed paradigm for power elec-tronics by developing an integrated systems approach using modular IPEMs. This would reduce the cost of power electronics solutions by automating manufacturing and enabling the mass production of power electronics solutions. It would ultimately in- crease the efficiency of electrical power use and help cut our country’s energy burden. Previous research thrusts To realize such a vision, the CPES NSF core re- search program was organized into seven multi-dis- ciplinary research thrusts. The research and funding structure favored fundamental knowledge that was es- sential for the enabling technology efforts focusing on module technologies and the engineered systems work that focused on system-level integration and demon- stration. The program structure worked well with the NSF ERC funding emphasizing basic research. After 10 years of intense focus on IPEMs, many breakthroughs were achieved and several industry sec- tors in the power electronics community adopted the IPEM approach. It is now time to extend this approach to emerging applications. CPES must maintain the core competence essen- tial for its multidisciplinary research and for providing integrated power electronics solutions. For continued success in the post-ERC era, CPES restructured its re- search program to consolidate the previous research thrusts and maintain the critical mass and core com- petence and to pursue new initiatives in an energy con- scious society. New research thrusts The core research thrusts are illustrated at right, With the concurrence of NSF, this research thrust or- ganization was implemented starting in Year 9. It is essential for CPES to maintain our core re- search thrusts and advance the fundamental knowl- edge in power electronics. With the strength of the Center’s combined industry consortium and the affili- ated WEMPEC consortium at our partner institution, the majority of funding for these core research areas will be initially supported by these industry consortia. This form of support can serve as a link between re- searchers of the multi-university center and provide the baseline support to maintain research synergy and collaboration. At the same time, the Center will aggres- sively pursue other funding agencies and opportuni- ties for long-term basic research. Furthermore, since the primary potential spon- sors are likely to be industry and government agencies (DOD, DOE, DARPA, NASA, etc.) with increasing em- phasis on inter-disciplinary system research and tech- nology deployment, it is imperative that CPES main- tains its capabilities as one of the nation’s centers of excellence for total technology solutions. The basic-versus-applied research debate will al- ways be with us. Universities should have a decided bias to basic research. Since basic research feeds both the technology thrusts and the application areas, it is important that CPES finds the best financial balance between basic and applied research, and be careful not to compromise long-term needs to gain short-term goals. CPES has developed a long-term year roadmap to help maintain a balance between basic and applied research. POST-ERC RESEARCH Organizational evolution CPES 10 YEAR PROGRESS REPORT 2010 6.15 TECHNOLOGIES AND APPLICATIONS IT Power Supplies Motor Drives Power Systems Alternative Energy A PP LIC AT IO N S C O RE TE C H N O LO G IE S Semiconductor Devices EMI and Compatibility Energy Efficiency and Power Management High Temperature Power Electronics Packaging Integration Power Conversion Vehicular Power Consumer/ Residential Motor Drives 6: BEYOND GRADUATION6.16 POST-ERC RESEARCH Research Structure The vision is to develop concepts and necessary technologies for integrated electronic power distribution systems that can impact applica- tions from computer servers to data centers, from cars to airplanes and ships, and from homes to dis- tributed energy sources grid. The new IPCS thrust inherited the former IPEM-PCS thrust, with its scope expanding to a wider power and application range. The four major research focuses include: (1) system architecture design and optimization; (2) power management and control; (3) high-density converter integration; and (4) EMI modeling, analy- sis, and management. The application focus will be on autonomous, distributed power systems and on emerging applications, such as portable, alternative, and sustainable energy sources. As an essential piece of this system-level re- search, a specific project, “Future Sustainable Home” was initiated in Year 9. This project represents a broad collaborative effort among all five partner universities with the objective of demonstrating an impact that enables a future sustainable home based on renewable energy sources and efficient power management and control. The vision is to develop the necessary technol-ogy so that the adjustable-speed drive capabil-ity can be economically embedded inside fu- ture electric motors with a minimal impact on their size, weight, and environmental robustness. The long-term goal is to develop electric motors with adjustable-speed capability that, from their external appearance, show minimal evidence of the internal- ly-packaged drive electronics. Equally important, these integrated motor drives must be manufacturable with a minimal cost premium, while demonstrating environmental ro- bustness and reliability characteristics that match those of conventional motors today. Consistent with these minimal impact objectives, the input power quality and EMI characteristics of future integrated motor drives must approach those of the motor ex- cited directly from the utility grid. This thrust research encompasses broad re- search endeavors that span from fundamental re- search such as control and sensors, to enabling technologies centered on the effort of integration of motor, sensors, and power electronic drives, to system-level applications such as future homes and alternative energy systems processing and control. Integrated Power Conversion Systems (IPCS) Leader: Professor Dushan Boroyevich (Virginia Tech) Integrated Motor Drive Systems (IMDS) Leader: Professor Tom Jahns (University of Wisconsin-Madison) CPES 10 YEAR PROGRESS REPORT 2010 6.17 The thrust serves as a basic driving force for power electronics circuits and systems and is a critical enabling building block in IPEM tech- nologies. They play a major role in influencing and determining the ultimate performance (efficiency, switching frequency) and form factor (size, weight) of power electronics systems. In general, the SPDIC thrust focuses on the exploration and demonstra- tion of novel integrated power devices and/or ICs in both silicon and wide-bandgap semiconductors, such as SiC and GaN, together with the associated devices, process and material technologies necessary for the prototype device/IC demonstrations, as well as selected insertion into IPEMs. The thrust will be focused on wide-bandgap semiconductors, including the following topics: (a) substrate and EPI material characterization, (b) unit process depth and integrated process flow develop- ment, (c) novel device structure demonstration and commercial device benchmarking, (d) device model definition and parameter extraction, and (e) char- acterization of prototype and commercial devices in power circuits and systems. The PEIT thrust integrates the previous inte-grable material, high-density integration and thermal-mechanical thrusts as well as a part of the electromagnetic thermal-mechanical integration thrust. The goal of the new thrust is to continue de- veloping materials, structures, and integration tech- nologies that promote pervasive use of power elec- tronics in energy management. During the ERC era of CPES, research in this area concentrated on the load-site end of energy management. IPEM research will continue to ad- dress such issues as reliability, manufacturability, and commercialization. The research effort will ex- pand, however, from load-site to larger-scale energy management arenas, such as local-areas and distri- bution systems. Harsher, new application environments will ultimately be served by Integrated Energy Manage- ment Blocks (IEMB). In addition to such fundamen- tal properties as efficiency and power density, IEMB technology will incorporate robustness, program- mability, and networkability. Semiconductor Power Devices and ICs (SPDIC) Leader: Professor Paul Chow (Rensselaer Polytechnic Institute) Power Electronics Integration Technology (PEIT) Leader: Professor Khai Ngo (Virginia Tech) 6: BEYOND GRADUATION6.18 SUSTAINABLE BUILDING CPES at Virginia Tech is modifying a research lab to incorporate emerging and anticipated future home/small office renewable energy technologies and power management systems. Four rooms are being converted into a “living lab” for stu- dents, faculty and staff, with a conference room, li- brary/lounge, kitchen, and utility room. Future elec- trical loads will be used that include: plug-in hybrid electric vehicles, high-efficiency light-emitting diode (LED) lamps, and next-generation home appliances, such as a washer, dryer, microwave oven, range, dish- washer, refrigerator, air conditioners, television, audio systems, and home robotics. The lab sports an experimental dc bus distribution system with automated source and load management that will be powered by solar and wind generators in- Although CPES research is organized by tech-nology and foundational knowledge, many projects will integrate advances from differ- ent disciplines and different campuses in overarching applications with potentially strong impacts on soci- ety. Three of the application efforts already initiated include sustainable buildings, motor controllers for next-generation aircraft, and the development of high power silicon carbide converters. The sustainable building initiative is driven by a desire to improve energy efficiency in the home. Homes provide one of the largest opportunities for both improving energy-efficient utilization and for distributed energy generation. The three major proj- ects include a living lab, high-frequency ac buildings and energy for portable appliances. A living lab Multi-campus efforts Laboratory concept developed by a+d at Virginia Tech CPES 10 YEAR PROGRESS REPORT 2010 6.19 terconnected with plug-in hybrid electric vehicle bat- tery subsystem, and grid. The home/small office will then be both a supplier of energy to the power com- pany and a user when consumption of energy exceeds the locally produced renewable energy. A dc Power Distribution System Testbed Most homes today are supplied by ac power. How- ever, our testbed uses a dc power system to investigate issues and opportunities with future homes using dc sources. Many loads can be more conveniently pow- ered by dc, including many consumer electronics de- vices, LED lighting, and variable-speed motors for ap- pliances and HVAC equipment. The renewable energy sources can connect more easily to dc — potentially with fewer converters. On the other hand, dc systems are less mature and are harder to protect under fault conditions. The electrical system has two dc buses: a high- voltage (~300 V) bus powering HVAC, kitchen loads, and other major appliances; and a low-voltage (48 V) bus that coincides with standard telecom voltage for powering computer loads and LED lighting. The whole system is connected to the utility grid via a bidi- rectional dc-ac converter. All CPES Virginia Tech faculty members are in- volved in this project, with individual efforts includ- ing: battery energy storage, wind energy, high-voltage dc bus regulation, photovoltaic systems, 48 V dc bus issues, system control and energy management, LED light packaging, dimming and wireless control, and grid interface and plug-in hybrid converters and control. µCM µC µCµC M GRID PLUG-IN HYBRID SOLAR ARRAY WIND TURBINE ENERGY STORAGE 48 V DC Consumer Electronics- TV, computer, projector Appliances- washer, dryer Appliances- air conditioners Appliances- stove, range, oven LED light- ceiling LED light- floor Monitoring and Control Web-based GUI EFFICIENT, SAFE, AFFORDABLE: DC POWER ARCHITECTURE 6: BEYOND GRADUATION6.20 SUSTAINABLE BUILDING High-Frequency ac Buildings The team at UW-Madison is conducting a paral-lel investigation into the suitability of high-fre-quency ac for future building power systems. While the typical ac system is 60 Hz, the team is building a system based on 400 Hz or greater. With a high-frequency ac-architecture, low-cost frequency converters can be used to more efficiently power key motors in a home, such as the furnace fan, air con- ditioner compressor and fan, refrigerator, and sump pumps. The use of high-frequency systems are also expected to reduce the complexity, size and cost of converters/magnetics embedded in new lighting tech- nologies such as compact fluorescent lights (CFLs) and LEDs. High-frequency ac should also enable the use of commercial-grade ac switchgear and protection de- vices inside the home, minimizing safety concerns and potential problems posed by compliance requirements with residential electrical standards. The laboratory testbed is configured to represent a scaled-down version of a possible residential power distribution system. The testbed architecture is de- signed to provide flexibility for researchers to reconfig- ure it while investigating different architecture, source and load components, and control strategies. Researchers will also use the testbed to investigate the interactions between the local power grid and the power distribution system in the home. The compat- ibility with microgrid concepts and issues such as har- monic injection and stability will be explored. Plug-In Hybrid Electric Vehicle Interface With plug-in hybrid electric vehicles gaining mo- mentum, one of the topics for investigation is their compatibility with the high-frequency power distri- bution system. When connected to a home’s electri- cal system, the plug-in hybrid can act either as a load when the vehicle’s batteries need to be charged, or as a temporary source if the load in the home needs to tap the vehicle’s battery pack. Researchers are investigating the converter hard- ware and power management issues associated with developing a robust electrical interface between the on-board electric vehicle batteries and the home’s elec- trical system. We are designing and developing a high- efficiency bidirectional ac-dc converter that can oper- ate in two modes: using the home electrical system to recharge the vehicle’s batteries and a discharge mode that converts the stored battery energy into usable ac power for the home. Vehicle-to-grid, plug-in hybrid system configuration CPES 10 YEAR PROGRESS REPORT 2010 6.21 Converters for High-Frequency ac Power Distribution System The use of high-frequency power systems would open opportunities for developing inexpensive 0-100 Hz variable-frequency supplies using input voltages greater than 400 Hz for adjustable-speed motor drives. This would save substantial energy in many home ap- plications, including furnace fans, pumps, and com- pressors. The capability of operating ac machines at higher frequencies also makes it possible to reduce the size of many of the electrical machines in the home, together with their associated pumps, fans, and com- pressor loads. To promote this possibility, we are developing and testing simple, cost-effective ac-ac converters with high-frequency input voltages. Matrix converter and modified cycloconverter topologies are available that minimize the need for bulky capacitors and other passive components. We are exploring techniques for maximizing input power quality with a minimum of extra components and costs, specifically targeting “single-phase” (biphase) and three-phase motors for applications such as fan/pump and compressor loads. Voltage signal conditioning Current signal conditioning Current signal conditioning Current signal conditioning Labjack UE9 Analog ADC Ethernet Wireless bridgeLEM LEM LEM J0 J1 J2 J3 LEGEND Electrical connection Ethernet connection Wireless connection Single phase junction box for high-frequency ac testbed Demonstrator unit Block diagram +5 V 2 A power supply wireless bridge voltage, current measurement Labjack: analog to ethernet 400 Hz receptacles 60 Hz/ 600 Hz Plug-In Hybrid Vehicle (PHEV) Additional Loads Additional Sources Bidirectional ac-dc Converter Var Freq AC/ 600 Hz DC/ 600 Hz Junction Box Junction Box Junction Box Junction Box AppliancesLighting PV ArrayWind Turbine 60 Hz Grid Lab testbed will provide flexible platform for testing HFAC system UW HIGH-FREQUENCY AC SYSTEM TESTBED Var Freq ac Power Supply 6: BEYOND GRADUATION6.22 SUSTAINABLE BUILDING Energy for Portable Appliances The electronic components within entertain-ment and information appliances such as iP-ods, laptops, and cell phones have improved at an amazing speed. Unfortunately, the energy sources are still often the limiting element in the lon- gevity and reliability of these portable electronics sys- tems. To combat this, power management interfacing ICs have been developed to maximize system uptime and minimize the impact of limited battery lifetime. These portable electronics devices in some form will continue to be used in the future. The devices, however, are run almost entirely by batteries that are recharged and backed up with off-line ac. As we look forward to sustainable buildings with multiple energy sources, there must be an easy, efficient method of powering these devices. Integrated power system for small appliances CPES researchers at RPI are pursuing an integrat- ed energy system approach for these appliances. We are developing an integrated energy module assembled with a monolithic power management IC that is based on state-of-the-art nanometer silicon IC technology enhanced with higher output device technology. The energy system module capabilities will be: 1. interacting simultaneously with multiple en- ergy sources (such as energy harvesting mi- croelectricalmechanical systems (MEMS), solar cells, and micro-fuel cells) 2. performing power conditioning and manage- ment 3. providing operational energy to multiple loads (such as micro-motors, hard-disc drives, flash memories, and microprocessors) embedded within individual or multiple in- formation appliances Specific research efforts include: design and im- plementation of analog IC blocks for source and load control, extension of a nano- meter silicon IC process to re- alize 5 V output devices, and adaptation of GaAs RF de- vice technology to power ICs, novel control algorithms for system operation, and mod- ule assembly technology. The initial testbed will be an 80 GB iPod that specifies the power level and ultimate form factor for the integrated energy system modules. CPES 10 YEAR PROGRESS REPORT 2010 6.23 Building blocks of the proposed integrated energy systems for portable electronic appliances BUILDING BLOCKS FOR INTEGRATED SYSTEMS 6: BEYOND GRADUATION6.24 RESEARCH INITIATIVES Advanced motor controller The advanced motor controller development project is funded by Boeing to develop motor drives for next-generation aircraft. The objec-tive is to advance the state-of-the-art motor drive technology into high-density, lightweight con- verters and electrical machines capable of operating under harsh environmental conditions and elevated temperatures (200-300° C). It is a relatively large-scale, multi-year industry sponsored project involving multiple CPES campuses and research thrusts. The project involves device ex- pertise from Rensselaer, motor and converter expertise from the University of Wisconsin-Madison, and con- verter and system integration expertise from Virginia Tech. The final outcome of this project will be the de- velopment of a demonstration unit. The main goal, however, is to identify key technologies, barriers, and needed breakthroughs that will enable the “more elec- tric aircraft” vision in the near future. Other expected results are the development of models, modeling tools, and design guidelines that could eventually be trans- ferred to potential commercial projects in the future. A related research also funded by Boeing is to de- velop advanced design criteria and analysis tools for the integration of ac and dc distributed power elec- tronics conversion systems. These systems are essen- tially comprised of power electronics-based converters and loads, and as such are inherently subject to static and dynamic interactions between their components. These interactions can easily lead to instabilities and system faults if the system is not designed consider- ing this possibility. CPES, through the utilization of multi-variable linear and nonlinear control theory, is working on the development of advanced design cri- teria and modeling tools to ensure the stable, safe, and reliable operation of future aircraft electrical power systems. CPES, thanks to its multidisciplinary nature, is well-positioned to tackle the challenges presented by these projects, extensively using its experience on semi- conductor and passive devices, electrical machines, converters, controls, thermal management, packaging, and system integration. Another multi-university project is “Wide-bandgap High Power Electronics Phase III” is anticipated to be funded by DARPA/GE. DARPA has been promot- ing SiC based high frequency high power medium voltage converter technologies to improve system power density. This Phase III project will involve hardware demonstration of SiC converter systems managing kilovolts, megawatts, and tens of kHz. GE Global Research will be leading this multi-year project with participations from other companies, national labs, and CPES from both VT and UW. CPES responsibility will be developing electro-ther- mal model of the SiC modules and conduct system simulation. HIGH-POWER SiC CONVERTERS CPES 10 YEAR PROGRESS REPORT 2010 6.25 EDUCATION & OUTREACH During the past 10 years, CPES developed strong inter-campus education and out-reach initiatives, including distance learn-ing and exchange programs. Distance learning courses created and modified to reflect the Center’s technical focus and research mission have been systematically integrated into larger university programs such as Rensselaer’s Professional Distance Education Program and the University of Wisconsin’s Office of Engineering Outreach. This institutionaliza- tion of Center-related courses will provide a platform for sustaining these courses after CPES graduation from the ERC program. Cooperative distance learning The CPES universities have signed a cooperative agreement for intercampus access of distance learning and exchange programs for the post-ERC era. Continued undergraduate involvement In order to maintain undergraduate involvement in Center activities, CPES leadership intends to contin- ue and strengthen programs such as the Research Ex- periences for Undergraduates (REU) and pre-college programs by pursuing external funding for an REU site. In all, CPES plans to pursue external funding to- taling $150,000 per year for the maintenance of these activities. One of the first successes of the CPES ERC was the coordinated power electronics curriculum across the five campuses. The universities are committed to continued cooperation in education and training the next generation of power electronics engineers. 6: BEYOND GRADUATION6.26 BUSINESS PLAN Institutional cost sharing The five institutions committed to maintain the current infrastructure and facilities at their campuses and extend the Memorandum of Understanding and Cooperative Agreements for curriculum cross-listing, distance delivery and stu- dent-faculty exchange programs. The five institutions further committed to provide additional cost sharing to support CPES-related management and adminis- trative needs at each participating campus to sustain the multi-university collaborative activities. Virginia Tech CPES has received approximately $400,000 an- nually in the form of equipment and/or cash support from Virginia Tech and the College of Engineering. The University is prepared to continue this level of support contingent on continued major grant activity. University of Wisconsin-Madison The University of Wisconsin College of Engineer- ing has offered financial support for a five year period after ERC graduation. The department of Electrical and Computer Engineering will contribute to support of the campus director, Professor T. A. Lipo (or his ap- proved successor). The college also committed to pro- viding matching support for new externally-sponsored contracts won by Center-affiliated faculty at Wisconsin for research and education expenditures there. In ad- dition, assuming the post-ERC Center is successful, Wisconsin will provide at least $20,000 per year to sup- port capital equipment purchases for Center activities. Rensselaer Polytechnic Institute Rensselaer has agreed to contribute 20 percent cost-sharing for CPES-related sponsored contracts toward support of the Center-related activities in the post-award phase. This cost sharing support will in- clude cash, a return of overhead to CPES-RPI in accor- dance with institute policies, and in-kind cost sharing. University of Puerto Rico-Mayagüez UPRM will sustain the current matching fund at the level of $75,000 for the last three years of the grant. UPRM will also provide partial funding support for the administrative and educational activities of CPES. North Carolina A&T The Center has received a commitment from the College of Engineering and Department of Electrical and Computer Engineering at NCA&T to continue cost sharing and matching obligations for three years following the conclusion of the NSF ERC award. This includes contributing support for Dr. Homaifar, CPES Campus Director and $15,000 for equipment from the ECE Department. The matching funds for equipment will be used to upgrade the CPES/power electronics machines and machines laboratories. NCA&T has also committed partial support for the administrative as- sistant’s position. CPES 10 YEAR PROGRESS REPORT 2010 6.27 An essential element of our post gradua-tion plan is to provide baseline support to the four new research thrust areas. This is largely based on industry-sponsored fel- lowships/scholarships. A major feature of the CPES Principal Plus Member program is that each industry member at this level sponsors a graduate research fel- lowship or scholarship in a chosen research area within the core research thrusts and campus with an identified faculty supervisor. The goal is to recruit 16-20 indus- try-sponsored fellowships/scholarships, in addition to the power management mini-consortium members. The financial support provided by these Principal Plus memberships, combined with additional support con- tributed via the WEMPEC consortium will provide more than $1.0M to sponsor CPES research fellow- ships and scholarships during Years 11-13 to support and nurture the growth of the Center’s core research. If certain critical areas are not adequately supported through this mechanism, a portion of the present membership support from the Associate Members and Principal Members would be used to support the core research when it is deemed necessary. BUSINESS PLAN Industrial consortium support Growth of CPES Industrial Consortium Funding 6: BEYOND GRADUATION6.28 BUSINESS PLAN Fellowships: 2006 & onward ABB Fellowship: Drives Integration Technologies (VT) The goal of the project is to explore innovative concepts to package passive devices for 3-phase AC motor drives to achieve smaller size, lower cost, lower part numbers, better thermal management, and high reliability. Alstom Transport Fellowship: Evaluation of thermo-me- chanical reliability of large-area chip attachments by low- temperature sintering of nanosilver paste (VT) The first main objective of this proposal study is focused on evalu- ating the high-temperature reliability of nanoscale silver paste for large-area device attachment by means of passive temperature cy- cling and active power cycling. Parametric study firstly determines the type of the silver paste, processing profile, and the pressure applied during the sintering stage, as well as the paste thickness. Temperature cycling and power cycling reliability results will be used to compare with that of high-temperature lead free solders. The second objective of this study is to demonstrate the feasibility of making a PEARL elementary switch using nanoscale silver paste. The goal is to assemble dies on bottom substrate, bumps on the die and power connections on the substrate and finally to assemble the upper substrate on the bumps. The interest for Alstom in silver paste is to realise this assembly in a one step process. The bumps shape will perhaps be adapted in order to use silver paste. The Center’s focused research in Voltage Regulator Modules (VRM) was initiated in 1997, when a cluster of industry spon- sors expressed interest to pursue research in the power man- agement of the next generation microprocessors. The idea is to pool resources in addressing common challenges, focus on developing pre-competitive technologies, and share the research results among mini-consortium members. In 2002, the concept of mini-consortium for focused research was implemented into the CPES partnership program, thus creat- ing the Principal Plus Member category. Since 2006, the scope of work has been expanded to encompass alternative power system architectures, control methods, power conversion and topologies, and packaging and thermal management. AcBel Polytech, Inc. Analog Devices Crane Aerospace & Electronics Delta Electronics Emerson Network Power FSP Group Hipro Electronics Infineon Technologies International Rectifier Intersil Corporation Linear Technologies POWER MANAGEMENT CONSORTIUM (PMC) • High performance VRM/POL converters • Magnetic Integration in the Multi-Phase Buck • 3D Integrated Converter • Non-linear Control Method Study • Digital Control Study • Two-stage VRs for future microprocessor in server • System Two-stage Architecture for Laptop • High Efficiency Power Architecture for Server • Bus Converters • High Frequency Modeling and Dynamic Current Sharing • Novel Driving Methods for Ultra High-Frequency Synchro- nous Rectifier SCOPE OF WORK Lite-On Technology Corporation Monolithic Power Systems Murata Power Solutions (formerly C&D Technologies) National Semiconductor Corporation NXP Semiconductors (formerly Philips Semiconductor) Richtek Technology Corporation Primarion Renesas Technology Texas Instruments CPES 10 YEAR PROGRESS REPORT 2010 6.29 Boeing Fellowship: High-Temperature SiC Power Devices (RPI, VT) This fellowship focuses on investigation of SiC devices operating at elevated temperatures (up to 300 º C). SiC power devices considered include commercial SiC Schottky rectifiers and JFETs, as well as pro- totype SiC advanced Schottky rectifiers and MOSFETs. Key aspects on the device portion are static and dynamic characterization over a wide temperature range and SABER-compatible device model defi- nition and parameter extraction for electrothermal simulations for power circuits. Delta Fellowship: Digital Control (VT) In recent years, the interest in digital control of switching converters has grown considerably. One of the limiting factors when using IC digital controllers in high-frequency switched-mode power supplies is the achievement of dynamic performance comparable to those of analog controls, especially in the presence of significant control delays and quantization effect. One of the major challenges for digi- tal control for switch mode power supply application is the devel- opment of simple digital or mixed-signal control architectures with little added silicon area required to enable dynamic performance comparable to analog controllers. Such a controller usually requires high-resolution analog-to-digital conversion and digital-pulse width modulation (DPWM). The IC implementation of such a control is usu- ally complex. It is also hampered by the undesirable quantization ef- fect and the limited cycle oscillation. FSP Fellowship: Next Generation ac-dc Converter Running at Ultra-High Switching Frequency (VT) CPES is investigating the ultra-high switching frequency ac-dc con- verter as the next-generation power supply to help industry prepare for the future and create more opportunities. The target of this proj- ect is a 12 V/100 A 1.2 kW ac-dc converter with MHz switching fre- quency for around 35 W/inch3 power density. GE Fellowship: Development of Innovative, Controllable Power Sharing between Multiple, Independent Distrib- uted Generator Sources (VT) Diverse DG sources of different characteristics can work together for best system performance. This fellowship studies the grid-connect- ed converter and control options for two parallel DG sources – one micro-turbine and one wind generator. GE Fellowship: Fabrication and Characterization of SiC MOSFETs (RPI) Researchers at CPES-RPI are collaborating with scientists at GE Global Research Center on the experimental demonstration of high-voltage SiC MOSFETs. This project is to fabricate and characterize various lat- eral SiC MOSFETs with different MOS process variations using an ex- isting mask set. The SiC substrates included are different crystalline planes (Si- vs. C-face, (0001) vs. (11-20)) of 4H-SiC substrates. The key device parameters to be optimized are MOS threshold voltage, field- effect voltage and breakdown voltage. MKS Fellowship: Investigation of High Frequency and High Efficiency Power Converter Technologies Using Advance Power Semiconductor Devices (VT) The objective of this project is to explore next-generation converter technology using the emerging wide-bandgap semiconductor de- vices. The study will be through state-of-the-art survey, analysis, and design of devices and converters, to determine the pros and cons of very high frequency converters using wide-bandgap devices. Rolls-Royce Fellowship: Investigation of Semiconductor Packaging Technologies for Aircraft Application (VT) This fellowship uses survey and testing to investigate the power device packages required to withstand the large temperature varia- tions and high thermal cycles. Both the wire-bond and non-wire- bond packages are being evaluated. The focus is on SiC devices. TriQuint Semiconductor Fellowship: AlGaAs/GaAs p-HEMTs for dc-dc converter applications (RPI) We are studying AlGaAs/GaAs pseudimorphic high electron mobility transistors (HEMTs) for power electronics applications because they are projected to be superior to Si CMOS FETs. We have designed, fab- ricated and characterized HEMTs with BV up to 11 V and 100 MHz monolithic power ICs of buck converters with input voltage of 4 V and efficiency as high as 86 percent. We will extend the BV of HEMTs and explore interleaved architectures for these high-frequency con- verters. VPT Fellowship: Reactive Power Control (VT) Survey of control methods and implementations of reactive power compensation for grid connected converters. Additional functional- ity and modular control schemes emphasized. VPT Energy Systems Fellowship: Solar Energy Grid Integra- tion Systems (VT) Innovations in the implementation and use of solar energy. Focus on control operation and wide array of functionality a grid connected energy storage system can allow for. WEMPEC-Funded Scholarships: In support of CPES, one-third of the total collected membership fees of WEMPEC-sponsoring companies is allocated each year to fund research activities at UW-Madison to support the area of integrated motor drives systems for improved performance, lower cost, and in- creased reliability. These research efforts include: • Wireless Motor Diagnostics Using an Integral Power Supply Derived From Motor Flux • Grid Fault Tolerant Power Converter Architectures for Doubly Fed Induction Generator Wind Turbines • An Investigation into the use of Electrodynamic Wheels for High-Speed Ground Transportation • Front Side Diode Rectifier Matrix Converter 6: BEYOND GRADUATION6.30 BUSINESS PLAN Sponsored research SiC Power Devices (2001-2007) (Sponsored by Honeywell/Army Collaborative Technology Alliance) — Researchers at CPES-RPI are exploring high-voltage advanced SiC Schottky rectifiers and BJTs/ Darlingtons in the first few years and are now also examining basic 4H-SiC MOS process optimization and high-voltage lateral RESURF- type MOSFETs. Sensorless Vector Control of Permanent Magnet Electri- cal Machines and THALIPEM Demonstration (2002-2004) (Sponsored by Thales Avionic Electrical Systems) — CPES developed a high-power THALIPEM power converter using a new sensorless vector control strategy and design methodology. A secondary focus of this work was the digital control implementation of the proposed sensorless vector control for permanent magnet electrical machines, as well as the advanced minimum-loss space vector modulation implementation and deadtime compensation strategies. Feasibility Assessment of a Planar Bonding/Interconnect Technology for High-Power Electronic Switches (Sponsored by ONR) — This project aims to explore the possibility of scaling Embedded-Power to the 10 kV, 1000 kA power level required by the high-power discharge switch. The goal is to assess the feasibility of constructing a high-voltage and high-current discharge switch us- ing PBI technology. A High density dc-dc Converter for Pulse Power Applica- tion (2003-2008) (Sponsored by Army Research Lab) — The first $650,000 project has resulted in a 15 kW high power density system. The CPES-developed prototype successfully passed the lab test at the U.S. Army Research Laboratory (ARL), and is currently under vehi- cle testing. The additional $1.2M project from ARL will allow CPES to continue to explore the possibility of increasing the power-handling capability, and push the power level to 300 kW. More recently, ARL provided an additional funding of $191K for CPES to further pursue high frequency, high power density design of pulse-power power supplies. Ultra Compact Ballast for Low-Wattage HID Lamps (2003- 2008) (Sponsored by Matsushita Electric Works) — The multi-year project involves the integration of inductor, capacitor, and trans- former; the integration of the resonator (ignitor that starts the bal- last); and the integration of EMI filter. The objective is to develop compact electronic ballast for low wattage High Intensity Discharge (HID) lamps using the advanced packaging concepts developed over the last eight years under NSF core funding. The goal is to be able to embed the electronic ballast as a part of the light fixtures for HID lamps so that the lamps can be used not only for large in- dustrial installation but also for home and office lighting purposes. This is the first attempt in commercializing power passive integration technologies. 3-D Integrated Power Technology Project (2004-2005) (Sponsored by Raytheon Company) — An integrated power mod- ule, including Si power MOSFETs and SiC diodes in the form of bare die, and surface mountable capacitors, is being developed. Based on CPES embedded power packaging technology, which features em- bedded power chips and planar metallization interconnection, the power module is fabricated by using thin- and thick-film techniques, resulting in a low profile, 3-D assembled construction. Combining advanced packaging and better electrical and thermal performance, this power module offers much higher power density and is benefi- cial for highly-integrated power converter systems. System Stability and Analysis (2004-present) (Sponsored by The Boeing Company) — This project studies modeling, simulation, and stability analysis techniques for complex electric power systems involving high percentage of power converters. Interactions of tight- ly controlled converters are keys to system stability, as well as overall system design and performance. The objective of this project is in line with that of the IPCS thrust. The methodology and theoretical results of this project can be applied to many other key applications identified in CPES post graduation plan. Advanced Motor Controller Development (2004-present) (Sponsored by The Boeing Company) The CPES universities are cur- rently developing motor drives for next-generation aircraft. The proj- ect, sponsored by Boeing, is pushing motor drive technology into high-density, lightweight converters and electrical machines ca- pable of operating under harsh environmental conditions and high temperatures (200-300° C). The team is identifying key technologies, barriers, and needed breakthroughs that will enable the “more elec- tric aircraft” vision. We are also developing models, modeling tools, and design guidelines that can eventually be transferred to future commercial projects. High-Power Density ac-dc Converter with Interleaving and Digital Control Technologies (2005-2006) (Sponsored by FSP Group/3Y Power) — CPES is proposing to apply the digital control and interleaving technologies into a high power density 1U, 1.2 kW front-end converter. The converter consists of two power conver- sion stages. The first stage takes 90 V ~ 260 V of ac input voltage and rectifies it to 400 V dc, while supplying a peak power of 1.2 kW. The second stage consists of 1.2 kW soft-switching dc-dc converters used to generate a 12 V output voltage source which is isolated from the 400 V input. Transformer Modeling, Analysis and Design (2005-2007) (Sponsored by Raytheon Company) — In some applications, it is desirable to have low-profile, high-density transformers that enable power supply form factors to be compatible with available spaces in cabinets or places with similar spatial or weight restrictions, for instance, in radar power supplies operating with switching frequen- cies of between 500 kHz and 1 MHz. However, when lowering the profile and integrating the magnetics with the rest of the power supply, stray electric and magnetic fields CPES 10 YEAR PROGRESS REPORT 2010 6.31 must be controlled carefully in the design so as to avoid extraneous heating due to eddy currents, uncontrollable changes in reactances, EMI, or overheating. This project involves the development of ana- lytical models to design a family of planar power transformers with high values of integrated leakage inductances. The models are im- plemented in MATLAB and can analyze electrostatic coupling (para- sitic capacitances), leakage inductance values in the presence of me- tallic shields and heat sinks, thermal housekeeping, among others. Next Generation ac-dc Converter Running at Ultra-High Switching Frequency (2005-2008) (Sponsored by FSP Group/3Y Power) — CPES is investigating the ultra-high switching frequency ac-dc converter as the next-generation power supply to help indus- try prepare for the future and create more opportunities. The target of this project is 12 V/100 A 1.2 kW ac-dc converter with MHz switch- ing frequency for around 35 W/inch3 power density. Feasibility Assessment of a Planar Bonding/Intercon- nect (PBI) Technology for High-Power Electronic Switches (HPES) (2006-2007) (sponsored by the Office of Naval Research) — This project aims to explore the possibility of scaling embedded power to the 10 kV, 1000 kA power level required by the high-power discharge switch. The goal is to assess the feasibility of constructing a high-voltage and high-current discharge switch using PBI technol- ogy. Materials and package configurations are explored to scale volt- age and current ratings of a basic cell to the desired values. Models for the switches are synthesized to assess electrical and thermal be- havior of the switch in a discharge circuit. Model parameters will be provided in form of performance curves relating such parameters as inductance, losses, temperature, or dimensions to voltage or current. Study of Electrical Transmission and Distribution System for Subsea Applications (2006-2007) (Sponsored by Aker Kvaerner) — CPES will study the system architec- ture and converter technologies suitable for subsea electric power delivery network. With support from NSF and the Office of Naval Research (ONR), IPCS thrust has been promoting electronic power distribution network concept for future power systems. This project will mark the first time that some of the concepts and approaches developed under NSF core research are being applied to a specific application, with support from industry. Development of High Switching Frequency High Density Fast Transient Response VRMs (2006-2008) (Sponsored by Delta) — CPES is developing MHz switching frequency VRM designs by adopting the innovative technologies proposed by CPES. The target of this project is 1.2 V/130 A VRM running at MHz switching frequency with expected 6-8 percent efficiency improvement over the state-of-the-art. Filter Study and Optimization (2006-present) (Sponsored by SAFRAN) — This project intends to apply CPES harmonics and EMI filter technologies to the overall optimization of dc fed ac converters. The goal is to reduce filter need and size through studies on filter to- pology, packaging and integration, components, materials, and filter design methodology. The project will involve modeling, analysis, de- sign, and prototyping. It also provides an opportunity for transferring and extending some previous CPES filter technologies developed under NSF funding to industry applications. Power Inductor (2007-2008) (Sponsored by National Semicon- ductor Corporation) — The objective is to research an efficient in- ductor-on-silicon switch mode regulator capable of integration into a standard enhanced power package delivering 1 to 5 A max dc o/p current at 1.5 V. Solar Energy Grid Integration Systems (SEGIS) (2007-2008) (Sponsored by VPT Energy Systems through the Solar America Initia- tive (SAI) at Sandia National Labs) — This project aims to develop innovations in the implementation and use of solar energy, and is focused on the control operation and wide array of functionality of a grid connected energy storage system. High-Density Power Control Unit for Hybrid Electric Ve- hicle – Feasibility Study (2007-present) (Sponsored by Toyota Motor Co., Ltd.) — This research will identify potentially low-cost integrated packaging, gate drive, converter topology, and thermal management concepts leading to improvement in power density and efficiency of the power control unit (PCU) in the hybrid vehicle. Optimization Strategy for Architecture and Packaging for High Power PEBB Based on Wide-Band-Gap Semiconduc- tor Devices (2007-present) (Sponsored by Office of Naval Re- search) — The objectives of this multi-year project are to develop and validate feasible and reliable packaging approaches for con- structing a high-voltage and high-current switch based on state-of- the-art and emerging wide-bandgap semiconductor devices; and to develop and validate an architecture design and optimization pro- cedure for building a high-power, high-voltage, high-frequency, and high-density (H4) PEBB, using SiC devices of relatively limited ratings. Packaging of a High-Temperature SiC Three-Phase ac-dc Converter (2007-present) (Sponsored by Rolls-Royce) — In sup- port of Rolls-Royce’s interest to investigate high-temperature pack- aging techniques for SiC devices suitable for aircraft applications, CPES has proposed to build a SiC-based three-phase ac-dc converter that will demonstrate the SiC devices in such applications, and serve as a platform for demonstrating the packaging techniques investi- gated in the Rolls-Royce fellowship research. A Multi-Port Grid-Interactive Universal Energy Process- ing Station (Phase I) (2008) (Sponsored by Power Hub Ventures, LLC)— The objective is to study and develop a power hub control- ler to be used as part of an integrated energy system (IES). The envisioned IES shall process electric power flow for a microgrid for small-scale (tens of kW) residential, commercial, industrial, and even military grid-interactive system of loads, storage element, and power sources. Nanoscale Silver Paste for Low-Temperature Joining of Power Semiconductor Devices (2008-2009) (Sponsored by NBE/STTR Phase I) — The objective is to investigate the feasibility of employing NBE’s novel silver pastes for joining power semicon- ductor devices to achieve 5x higher temperature cycling capability, 3x better total module resistance, and device junction temperature over 175° C. A recently established sintering technology for joining semiconductor chips, now being implemented in manufacturing lines of some major European companies, requires a 120-ton press to lower the sintering temperature of silver powders. This significantly complicates the manufacturing process and places critical demands 6: BEYOND GRADUATION6.32 on substrate flatness and thickness of the chips. NBE’s materials can be sintered below 270 °C under ambient pressure and have 5x better thermal and electrical properties than widely used solder alloys, thus have great commercial potential to improve the electronic assem- bly process and products. Specific objectives for Phase I effort are: (1) to fabricate power devices and modules using NBE’s novel paste as chip-attachment material; (2) to characterize and understand the devices/modules under electrical and thermal tests, temperature/ power cycling, and functional tests over 175° C; and (3) to establish close working relationships with power electronics companies, like Semikron, Bosch, Infineon, and ABB for rapid commercialization in Phase II and Phase III. CPES Sustainable Building Design Initiative (SBDI) (2009-present) (Sponsored by ICTAS) — In collaboration with Vir- ginia Tech’s Interior Design Program in the School of Architecture + Design (a+d), the CPES/a+d team will focus on finding integra- tive solutions to satisfy the energy, functional, and aesthetic goals. The major goal is to develop and implement a “living lab” that will provide simulated environment for research, evaluation, and dem- onstration of advanced technologies for sustainable buildings. The site of the “living lab” will be the home of CPES in Whittemore Hall at Virginia Tech. Building upon the Center’s Sustainable Building Initiative (SBI) that has been focused on the development and demonstration of ad- vanced power electronics technology for electrical systems in sus- tainable building, CPES will further develop a dc-based renewable energy powered system as a testbed for future sustainable home electric power system. The renewable and alternative energy sourc- es would include primarily photovoltaic solar cells, wind generators, micro-turbines, fuel cells, and energy storage. Study and Development of an ac-dc Impedance Tester for Medium Voltage High Power Systems (2009-present) (Sponsored by Northrop Grumman Newport News) — The project objectives are to identify and/or develop a feasible impedance mea- surement technique that can be used for high power and medium voltage dc and ac power systems; and to develop an ac impedance tester that can be used to test impedances at ac and dc interfaces for systems up to 13.8 kV and 36 MW. Advanced Power Electronics for Pulsed Power Applica- tions (2009-present) (Sponsored by Rolls-Royce) — In this proj- ect, CPES will investigate optimum power conversion architectures from 3-phase variable frequency generator to a pulsed-power dc load, which would result in highest efficiency, lowest volume, and reasonable complexity. Solid State Power Substation (2009-present) (Sponsored by GE Global Research for DARPA HPS III under BAA 06-30) — In support of GE DARPA WBST-HPE Phase 3 “Solid State Power Substation” pro- gram, CPES-VT and CPES-UW will jointly provide assistance in mod- ule characterization and modeling, control development, analysis of component stresses, system integration/interface issues, and recom- mend packaging approaches. Bidirectional Power Converter for Plug-Connected Vehi- cles and Vehicle-to-Grid Technology (2009-present) (Spon- sored by VPT Energy Systems SBIR Phase I) — CPES will provide the platform necessary for the evaluation and demonstration of smart- grid characteristics, including vehicle-to-grid power converter tech- nology by committing lab and hardware support. CPES research lab and Sustainable Building Initiative (SBI) infrastructure, including so- lar, photovoltaic, and wind power generation facilities, will be made available for the development and testing of the converter opera- tion in an integrated energy system. Fundamental Study on the Sintering Behavior of Nanoscale Silver Paste for Electronic Packaging (2009-present) (Spon- sored by Office of Naval Research) — The goal of this proposal is to gain fundamental understanding of the chemical and physical behavior of nanoscale metal pastes as they are heated to dry and sinter in electronic packaging application. Because of their ability to densify at extremely low temperatures (<100° C), pastes and inks of nanoparticles of metal, such as silver, are cherished as one of the suc- cessful examples of nanotechnology to have brought breakthrough advancements to industry. The PI’s work on synthesis and process- ing of a nanoscale silver paste has received widespread attention because of its potential to offer a disruptive die-attach solution for packaging power devices and modules that offer high performance, high reliability, and high-temperature capability. However, the lack of solid scientific understanding on drying and sintering kinetics of the various chemical components in the paste hampers quick realization of the nanomaterial’s benefits in industrial practice. Manufacturing engineers still have to rely on the trial-and-error strategy to design the optimal processing conditions to achieve desired microstructure and properties. The technical approach of this program is to inves- tigate the thermodynamic and kinetic mechanisms associated with removal of the solvents by evaporation, burn-out of the binder or- ganics by decomposition, and densification of the inorganic metal nanoparticles by solid-state diffusion. The nanoscale silver paste will be used as a model system for this study. Specific objectives are to: (1) determine the effects of colloidal chemistry on paste dispersion and flow; and (2) characterize the physical mechanisms of solvent evaporation, binder burn-out, densification, and grain growth of the paste and their effects on die-attach properties. Design Methodology and Evaluation of a Multi-Purpose Fault-Tolerant Power Processor (proposed) (to be sponsored by THALES) — In support of the THALES initiative to develop a new modular power electronics distribution system capable of feeding multiple loads of different power and current ratings and loading profiles by continuously distributing and allocating its resources over time, CPES has proposed to develop the design methodology and design tools for the Voltage Source Inverter (VSI) power mod- ules that constitute the key power processing element of this sys- tem. CPES research effort will be focused on technologies such as minimum-loss interleaved PWM schemes, d-q frame vector controls, interface inductors for the parallel operation of the power modules, integrated ac and dc harmonic, EMI and system stability filters.