Greenwood, Rob2014-03-142014-03-141992-09-15etd-10062009-020216http://hdl.handle.net/10919/45026This thesis describes the design and implementation of a system to extract meaning from natural language specifications of digital systems. This research is part of the ASPIN project which has the long-term goal of providing an automated system for digital system synthesis from informal specifications. This work makes several contributions, one being the application of artificial intelligence techniques to specifications writing. Also, the work deals with the subset of the English language used to describe digital systems, and the concepts within this domain have been classified into a type hierarchy. Finally, a set of relations has been defined to represent the interrelationships between the concepts of the sublanguage. This work centers around the modeling of information found in natural language specifications of digital systems. The target know ledge representation for the work is the conceptual graph, developed by John Sowa. Conceptual graphs provide a sound theoretical base as well as enough versatility to model the information found in digital system specifications. The transformation from natural language to conceptual graphs is done in two stages. In the first stage, a previously developed context-free English language parser is used to create trees of sentence structure. In the second stage, the trees are processed by a semantic analyzer which uses a conceptual type hierarchy and a database of rules to extract the meaning from the English sentence and create the conceptual graph. The main work of this thesis centers around the semantic analyzer which is written in Quintus Prolog. The semantic analyzer currently contains approximately 380 canonical conceptual graphs that cover usage of over 680 words consisting of over 240 nouns and over 460 verbs.x, 170 leavesBTDapplication/pdfenIn CopyrightLD5655.V855 1992.G7447Digital electronicsProgramming languages (Electronic computers) -- SemanticsSemantic analysis for system level design automationThesishttp://scholar.lib.vt.edu/theses/available/etd-10062009-020216/