Craven, StephenAthanas, Peter M.2017-09-182017-09-182008-10-15Stephen Craven and Peter Athanas, “Dynamic Hardware Development,” International Journal of Reconfigurable Computing, vol. 2008, Article ID 901328, 10 pages, 2008. doi:10.1155/2008/901328http://hdl.handle.net/10919/79067Applications that leverage the dynamic partial reconfigurability of modern FPGAs arefew, owing in large part to the lack of suitable tools and techniques to create them. Whilethe trend in digital design is towards higher levels of design abstractions, forgoing hardwaredescription languages in some cases for high-level languages, the development of a reconfigurabledesign requires developers to work at a low level and contend with many poorlydocumented architecture-specific aspects. This paper discusses the creation of a high-leveldevelopment environment for reconfigurable designs that leverage an existing high-level synthesistool to enable the design, simulation, and implementation of dynamically reconfigurablehardware solely from a specification written in C. Unlike previous attempts, this approachencompasses the entirety of design and implementation, enables self-re-configurationthrough an embedded controller, and inherently handles partial reconfiguration. Benchmarkingnumbers are provided, which validate the productivity enhancements this approachprovides.application/pdfenCreative Commons Attribution 4.0 InternationalDynamic Hardware DevelopmentArticle - Refereed2017-09-18Copyright © 2008 Stephen Craven and Peter Athanas. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.International Journal of Reconfigurable Computinghttps://doi.org/10.1155/2008/901328