2016-08-242016-08-242002-06-11http://hdl.handle.net/10919/72449A 2T-1C FRAM, each cell of which includes two transistors and one ferroelectric capacitor so that the “charging” and “discharging” of the ferroelectric capacitor used in conjunction with the p-n junction of the two transistors performs write/read operations without switching thereby avoiding degradation problems such as fatigue and imprint in the 2T-1C FRAM.application/pdfen-USPatenthttp://pimg-fpiw.uspto.gov/fdd/67/046/064/0.pdf9658942365/145365/189.4365/189.15365/189.16365/200365/210.1365/210.15G11C11/226404667