Rong, Yu2022-11-092022-11-092022-11-08vt_gsexam:35632http://hdl.handle.net/10919/112545Emerging large-scale modular power converters are pursuing high-performance distributed control systems. As opposed to the centralized control architecture, the distributed control architecture features shared computational burdens, pulse-width modulation (PWM) latency compensation, simplified fiber-optic cable connection, redundant data routes, and greatly enhanced local control capabilities. Modular multilevel converters (MMCs) with conventional control are subjected to large capacitor voltage ripples, especially at low-line frequencies. It is proved that with appropriate arm current shaping in the timescale of a switching period, referred as the switching-cycle control (SCC), such line-frequency dependence can be eliminated and MMCs are enabled to work even in dc-dc mode. Yet the SCC demands multiple times of arm current alternations in one switching period. To achieve the high-bandwidth current regulation, hybrid modulation approach incorporating both the carrier-based modulation and the peak-current-mode (PCM) modulation is adopted. The combined digital and analog control and the extreme time-sensitive nature together pose great challenges on the practical implementation that the existing distributed control systems cannot cope with. This dissertation aims to develop an optimized distributed control system for SCC implementation. The critical analog PCM modulation is enabled by the intelligent gate driver with integrated rogowski coil and field programmable gate array (FPGA). A novel distributed control architecture is proposed accordingly for SCC applications where the hybrid modulation function is shifted to the gate driver. The proposed distributed control solution is verified in the SCC-based converter operations. Accompanied by the growing availability of medium-voltage silicon carbide (SiC) devices, fast-switching-enabled novel control schemes raise a high synchronization requirement for the communication network. Power electronics system network (PESNet) 3.0 is a proposed next-generation communication network designed and optimized for a distributed control system. This dissertation presents the development of PESNet 3.0 with a sub-nanosecond synchronization error (SE) and a gigabits-per-second data rate dedicated for large-scale high-frequency modular power converters. The White Rabbit Network technology, originally developed for the Large Hadron Collider accelerator chain at the European Organization for Nuclear Research (CERN), has been embedded in PESNet 3.0 and tailored to be suited for distributed power conversion systems. A simplified inter-node phase-locked loop (N2N-PLL) has been developed. Subsequently, stability analysis of the N2N-PLL is carried out with closed-loop transfer function measurement using a digital perturbation injection method. The experimental validation of the PESNet 3.0 is demonstrated at the controller level and converter level, respectively. The latter is on a 10 kV SiC-MOSFET-based modular converter prototype, verifying ±0.5 ns SE at 5 Gbps data rate for a new control scheme. The communication network has an impact on the converter control and operation. The synchronicity of the controllers has an influence on the converter harmonics and safe operation. A large synchronization error can lead to the malfunction of the converter operation. The communication latency poses a challenge to the converter control frequency and bandwidth. With the increased scale of the modular converter and control frequency, the low-latency requirement of communication network becomes more stringent.ETDenIn Copyrightcommunication networkdistributed controlsynchronizationreal-time systemmodular power convertersDissertation