2021-03-252021-03-252019-10-22http://hdl.handle.net/10919/102814Aspects disclosed in the detailed description include a microprocessor fault detection and response system. The microprocessor fault detection and response system utilizes a hardware-based fault-attack aware microprocessor extension (FAME) and a software-based trap handler for detecting and responding to a fault injection on a microprocessor. Upon detecting the fault injection, the hardware FAME switches the microprocessor from a normal mode to a safe mode and instructs the microprocessor to invoke the software-based trap handler in the safe mode. The hardware-based FAME provides fault recovery information to the software-based trap handler via a fault recovery register (FRR) for restoring the microprocessor to a fault-free state. By utilizing a combination of the hardware-based FAME and the software-based trap handler, it is possible to effectively protect the microprocessor from malicious fault attacks without significantly increasing performance and area overheads.application/pdfenPatenthttp://pimg-fpiw.uspto.gov/fdd/93/524/104/0.pdf15596876G06F11/1469G06F11/0721G06F11/0751G06F11/0772G06F11/0784G06F11/0793G06F11/1441G06F11/26G06F21/71G06F21/72G06F2201/80510452493