Bowen, John Kipp2014-03-142014-03-142008-01-18etd-01312008-141152http://hdl.handle.net/10919/31088Modern Field Programmable Gate Arrays (FPGAs) can implement entire run-time reconfigurable systems using partial reconfiguration. Module-based run-time reconfiguration permits the construction of custom applications at run-time using pre-compiled Intellectual Property (IP) from a module library. The need for both flexible module placement and custom inter-module communication is mostly ignored by existing modular run-time reconfiguration approaches and few existing tool flows for module generation address the need for automation. This thesis introduces an automated compile-time tool flow for generating dynamic modules that allow flexible run-time placement and communication synthesis.In CopyrightPartial ReconfigurationField programmable gate arraysRun-time ReconfigurationModule LibraryThesishttp://scholar.lib.vt.edu/theses/available/etd-01312008-141152/