Joshi, RutwikKarthikeyan, SenguntharHudait, Mantu K.2023-02-172023-02-172022-08-010018-9383http://hdl.handle.net/10919/113862In this article, we have evaluated the merits of monolithically cointegrated alternate channel complementary metal-oxide-semiconductor (CMOS) device architecture, utilizing tensile strained germanium (ε-Ge) for the p-channel FinFET and variable indium (In) compositional InxGa1−xAs (0.10 ≤ x ≤ 0.53) for the n-channel FinFET. The device simulation models were calibrated using the experimental results of Ge and InGaAs FinFETs and subsequently transferred to the cointegrated Ge and InxGa1−x As structure while keeping the device simulation parameters fixed. The device parameters, such as VT, Ion, Ioff, and subthreshold-swing (SS), were determined for identical fin dimensions for n- and p-channel FinFETs as a function of In composition that alters the tensile strain in Ge. These parameters are controllable during the heteroepitaxial growth by varying In composition in InxGa1−xAs. ε-Ge p-FinFET is shown to be superior in terms of SS and Ion/Ioff ratio compared with other competing architectures. The cointegrated architecture of CMOS inverter exhibited an optimum performance over a range of In compositions from 20% to 40% while driving fan-out fan-out 1 (FO-1) and FO-4 load configurations. In addition, the CMOS inverter with symmetric rise and fall times as well as noise-immune functionality demonstrated 150 GHz of operating frequency with 30-nW total power dissipation at 20% In composition, and hence a superior power-delay-product comparable with International Technology Roadmap for Semiconductors (ITRS) standards. Moreover, the three-stage CMOS ring oscillator performance was evaluated with various In compositions to be stable and power efficient. Thus, the cointegrated approach has a potential to: 1) simplify large-scale CMOS integration and 2) be compatible with optoelectronic materials.Pages 4175-4182application/pdfenIn CopyrightMonolithically Cointegrated Tensile Strained Germanium and In<inf>x</inf>Ga<inf>1−x</inf>As FinFETs for Tunable CMOS LogicArticle - Refereed2023-02-17IEEE Transactions on Electron Deviceshttps://doi.org/10.1109/TED.2022.3181112698Hudait, Mantu [0000-0002-9789-3081]1557-9646