2019-02-262019-02-262018-07-24http://hdl.handle.net/10919/87843In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating substrate presenting a parasitic capacitance placed in series with the low impedance current path and a connection of a conductive layer to input voltage rails using a single decoupling capacitor or, preferably, a midpoint of the voltage rails formed by a series connection of decoupling capacitors maintains a large portion of common mode (CM) currents which are due to high dV/dt slew rates of SiC and GaN transistors within the switching module.application/pdfenPatenthttp://pimg-fpiw.uspto.gov/fdd/32/327/100/0.pdf15585545H01L23/66H01L23/481H01L25/0652H01L25/0657H01L2224/1134H05K1/167H05K3/461410032732