Nakad, Zahi Samir2014-03-142014-03-142000-09-20etd-11132000-12050007http://hdl.handle.net/10919/35682Many problems faced in the engineering world are computationally intensive. Filtering using FIR (Finite Impulse Response) filters is an example to that. This thesis discusses the implementation of a fast, reconfigurable, and scalable FIR (Finite Impulse Response) digital filter. Constant coefficient multipliers and a Fast FIFO implementation are also discussed in connection with the FIR filter. This filter is used in two of its structures: the direct-form and the lattice structure. The thesis describes several configurations that can be created with the different components available and reports the testing results of these configurations.In CopyrightFIR filtersField programmable gate arraysreconfigurable computingconstant coefficient multipliersThesishttp://scholar.lib.vt.edu/theses/available/etd-11132000-12050007/