A Cross Platform Method for FPGA Integrity Checking

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dc.contributor.authorBenz, Matthew Aaronen
dc.contributor.committeechairJones, Mark T.en
dc.contributor.committeememberPatterson, Cameron D.en
dc.contributor.committeememberAthanas, Peter M.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:45:22Zen
dc.date.adate2007-10-16en
dc.date.available2014-03-14T20:45:22Zen
dc.date.issued2007-08-30en
dc.date.rdate2007-10-16en
dc.date.sdate2007-09-13en
dc.description.abstractAs embedded systems continue to evolve and the number of applications they support continues to increase, so does the diversity of the hardware they employ. As a result, the Field Programmable Gate Arrays (FPGAs), which have become fundamental elements in their design, have advanced in size and complexity as well. Because of this, it is now impossible to ignore the security implications that accompany such a progression. It is then not only important to prevent malicious attacks targeted at FPGAs from extracting the intellectual property contained in their configuration, but to now extend the research in this field by providing a cross-platform solution capable of securing the integrity of FPGA configurations at run-time. Today, there exist myriad attack strategies employed against FPGAs, the majority of which are seen in the form of semi-invasive attacks. These attacks manipulate the configuration of an FPGA and typically modify the state of the transistors that make up said configuration. This thesis introduces a multi-platform method for checking the integrity of an FPGA's configuration. The details of the system's design and implementation are discussed in addition to the analysis of the design trade-offs met when employing the system across multiple FPGA families. The system is implemented entirely in hardware and resides on-chip, providing an FPGA the ability to act as private entity capable of successfully detecting when it has been maliciously attacked.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-09132007-045308en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-09132007-045308/en
dc.identifier.urihttp://hdl.handle.net/10919/35045en
dc.publisherVirginia Techen
dc.relation.haspartthesis_benz_m.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectportableen
dc.subjectfault-injectionen
dc.subjectintegrityen
dc.subjectField programmable gate arraysen
dc.subjectsecurityen
dc.subjectconfigurationen
dc.titleA Cross Platform Method for FPGA Integrity Checkingen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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