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Center for Power Electronics Systems

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https://hdl.handle.net/10919/111742

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Browsing Center for Power Electronics Systems by Author "Boroyevich, Dushan"

Now showing 1 - 9 of 9
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    Anti-islanding detection for three-phase distributed generation
    (United States Patent and Trademark Office, 2017-04-25)
    Wobbling the operating frequency of a phase-locked loop (PLL), preferably by adding a periodic variation is feedback gain or delay in reference signal phase allows the avoidance of any non-detection zone that might occur due to exact synchronization of the phase locked loop operating frequency with a reference signal. If the change in PLL operating frequency is periodic, it can be made of adequate speed variation to accommodate and time requirement for islanding detection or the like when a reference signal being tracked by the PLL is lost. Such wobbling of the PLL operating frequency is preferably achieved by addition a periodic variable gain in a feedback loop and/or adding a periodically varying phase delay in a reference signal and/or PLL output.
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    Center Program Snapshot
    Lee, Fred C.; Boroyevich, Dushan (Virginia Tech, 2009-04)
    This book provides a comprehensive introduction to CPES research, education,and outreach.
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    Design of a 10 kV SiC MOSFET-based high-density, high-efficiency, modular medium-voltage power converter
    Mocevic, Slavko; Yu, Jianghui; Fan, Boran; Sun, Keyao; Xu, Yue; Stewart, Joshua; Rong, Yu; Song, He; Mitrovic, Vladimir; Yan, Ning; Wang, Jun; Cvetkovic, Igor; Burgos, Rolando; Boroyevich, Dushan; DiMarino, Christina; Dong, Dong; Motwani, Jayesh Kumar; Zhang, Richard (IEEE, 2022-03)
    Simultaneously imposed challenges of high-voltage insulation, high dv/dt, high-switching frequency, fast protection, and thermal management associated with the adoption of 10 kV SiC MOSFET, often pose nearly insurmountable barriers to potential users, undoubtedly hindering their penetration in medium-voltage (MV) power conversion. Key novel technologies such as enhanced gatedriver, auxiliary power supply network, PCB planar dc-bus, and high-density inductor are presented, enabling the SiC-based designs in modular MV converters, overcoming aforementioned challenges. However, purely substituting SiC design instead of Sibased ones in modular MV converters, would expectedly yield only limited gains. Therefore, to further elevate SiC-based designs, novel high-bandwidth control strategies such as switching-cycle control (SCC) and integrated capacitor-blocked transistor (ICBT), as well as high-performance/high-bandwidth communication network are developed. All these technologies combined, overcome barriers posed by state-of-the-art Si designs and unlock system level benefits such as very high power density, high-efficiency, fast dynamic response, unrestricted line frequency operation, and improved power quality, all demonstrated throughout this paper.
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    Global Intergrid for Sustainable Energy Abundance
    Boroyevich, Dushan; Cvetkovic, Igor; Dong, Dong (IEEE Power Electronics Society, 2022-06-04)
    Invited Poster for Session on Brainstorming for Game-Changing Ideas.
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    Power-cell switching-cycle capacitor voltage control for modular multi-level converters
    (United States Patent and Trademark Office, 2018-05-08)
    In a modular multi-level power converter, additional switching states are interleaved between main switching states that control output voltage or waveform. The additional switching states provide current from a DC-link to charge capacitors in respective modules or cells to an offset voltage from which the capacitor voltages are controlled toward a reference voltage during each switching cycle rather than being allowed to build up over a period of an output waveform of variable line frequency, possibly including zero frequency. Since the switching cycle is much shorter than the duration of a line frequency cycle and the capacitor voltages are balanced during each switching cycle, output voltage ripple can be limited as desired with a capacitor of much smaller value and size than would otherwise be required.
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    Semiconductor module arrangement
    (United States Patent and Trademark Office, 2018-07-24)
    In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating substrate presenting a parasitic capacitance placed in series with the low impedance current path and a connection of a conductive layer to input voltage rails using a single decoupling capacitor or, preferably, a midpoint of the voltage rails formed by a series connection of decoupling capacitors maintains a large portion of common mode (CM) currents which are due to high dV/dt slew rates of SiC and GaN transistors within the switching module.
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    Structural Resemblance Between Droop Controllers and Phase-Locked Loops
    Zhong, Qing-Chang; Boroyevich, Dushan (IEEE, 2016)
    It is well known that droop control is fundamental to the operation of power systems and now the parallel operation of inverters, while phase-locked loops (PLLs) are widely adopted in modern electrical engineering. In this paper, it is shown at first that droop control and PLLs structurally resemble each other. This bridges the gap between the two communities working on droop control and PLLs. As a result, droop controllers and PLLs can be improved and further developed via adopting the advancements in the other field. This finding is then applied to operate the conventional droop controller for inverters with inductive output impedance to achieve the function of PLLs, without having a dedicated synchronization unit. Extensive experimental results are provided to validate the theoretical analysis.
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    System and method for impedance measurement using chirp signal injection
    (United States Patent and Trademark Office, 2017-04-11)
    A method for impedance measurement using chirp signal injection is provided. The method includes injecting at least one chirp signal into the three-phase AC system, and collecting at least one response to the at least one chirp signal. The method further includes transferring the at least one response from abc coordinates to dq coordinates. At least one impedance is calculated based on the at least one response to the at least one chirp signal.
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    System and method for impedance measurement using series and shunt injection
    (United States Patent and Trademark Office, 2017-02-07)
    A method for impedance measurement in a three-phase AC system is provided. The method includes injecting a shunt perturbation signal into the three-phase AC system and collecting a response to the shunt perturbation signal, and injecting a series perturbation signal into the three-phase AC system and collecting a response to the series perturbation signal. The response to the shunt perturbation signal and the response to the series perturbation signal are then transferred from abc coordinate to dq coordinates. At least one impedance of the three-phase AC system is calculated based on the response to the shunt perturbation signal and the response to the series perturbation signal.