Browsing by Author "Ha, Dong"
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- An advanced neuromorphic accelerator on FPGA for next-G spectrum sensingAzmine, Muhammad Farhan (Virginia Tech, 2024-04-10)In modern communication systems, it’s important to detect and use available radio frequencies effectively. However, current methods face challenges with complexity and noise interference. We’ve developed a new approach using advanced artificial intelligence (AI) based computing techniques to improve efficiency and accuracy in this process. Our method shows promising results, requiring only minimal additional resources in exchange of improved performance compared to older techniques.
- The Analysis and Design of Phase-tunable Low-Power Low-Phase-Noise I/Q Signal Sources for Analog Phase Calibrated TransceiversChamas, Ibrahim (Virginia Tech, 2008-06)Due to the demand for low-cost, small-form factor and large-scale integration of system-on-chip wireless transceivers, the image-reject, zero-IF and low-IF receiver architectures have become the main topologies used in mainstream wireless communication systems. Consequently, signal sources with quadrature phase outputs [quadrature oscillators (QOs)] are therefore essential, and their phase noise, driving capability, tuning range, oscillation frequency, and power consumption have a major impact on the overall receiver performance. Additionally, it is required that the QO synthesize precise I/Q waveforms across the signal bandwidth over process, voltage, and temperature variations for adequate image-rejection and signal modulation/demodulation. While the use of symmetrical layout and large inter-digitated devices minimize both systematic and random mismatches, this solution alone may not succeed in achieving the stringent performance requirements dictated by modern wireless standards particularly as the technology scales into the sub-100nm regime, necessitating both phase and gain calibration of the mismatched I/Q channels post-fabrication. Given the necessity for precise RF quadrature signal synthesis, the goal of this work is to investigate low-power low-phase-noise quadrature oscillator (QVCO) topologies with an integrated phase calibration feature. The first part of this work focuses on the analysis and modeling of cross-coupled LC QVCOs. The analysis focuses on understanding the oscillator basic performance characteristics, design trade-offs, phase-noise performance, effect of including phase shift in the coupling paths, and on examining the quadrature accuracy in presence of process variations. New design parameters and circuit insight are developed and a generalized first order linear model and a one-port model are proposed. Particularly, we introduce the concept of an effective core and coupling transconductances to explain various oscillator properties. Additionally, a new incremental circuit element — the quadrature resistance — is introduced to evaluate the effect of coupling on the open-loop quality factor and hence on the oscillator phase noise performance. Mechanisms affecting the mode selectivity are identified and modeled. A qualitative and quantitative study of the effect of mismatch on the phase imbalance and amplitude error is presented. Particularly, closed-form intuitive expressions of the phase imbalance and amplitude error are derived and verified via circuit simulation. Based on our understanding of the various mechanisms affecting the quadrature accuracy, the second part of this work introduces a very efficient quadrature phase calibration technique based on the disconnected-source parallel-coupled LC QVCO topology. The phase-tunable LC QVCO (PT-QVCO) achieves an ultra-wide I/Q phase tuning range without affecting the relative amplitude error or consuming additional power or chip area. Additionally, in restoring the phase balance, it is observed that the proposed method restores the phase noise performance to its optimal value which presents a potential advantage over classical calibration techniques. Time domain measurements performed on a 5 GHz prototype show that I/Q signals with phase error up to ~±30°, beyond which the VCO cores are unlocked, can be driven to perfect quadrature phase. The PT-QVCO can be tuned from 3.87-4.45 GHz at the negative mode and 4.4-5.4 GHz at the positive mode, a total of ~1.5 GHz. The fabricated circuit including pad structures occupies an area of 1.1x0.7 mm² and drains 18mW (excluding buffer circuits) from a 1.8 V supply voltage. The third part of this work introduces a new low-power, low-phase-noise super harmonic injection-coupled LC QVCO (IC-QVCO) topology. Analysis of the waveform accuracy reveals an inverse dependence of the quadrature error on the tank quality factor thus allowing circuit optimization for both low phase noise and precise quadrature synthesis. Additionally, a tunable tail filter (TTF) is incorporated to calibrate the residual quadrature imbalance in presence of a 3-σ variation in the device parameters. An X-band IC-QVCO prototype with a TTF implemented in a 0.18μm RF CMOS process, achieves a measured phase noise figure-of-merit ranging from 177.3 to 182.6 dBc/Hz along the 9.0 to 9.6 GHz frequency tuning range while dissipating only 9mW from the 1.8V supply. The TTF reduces both the 1/f² and 1/f³ phase noise and calibrates the residual phase error within ±11° post-fabrication without affecting the relative amplitude error or the phase noise performance. The circuit performance compares favorably with recently published work. In the fourth part of this work, we explore the implementation of LC QVCOs as potential I/Q sources at millimeter-wave (MMW) frequencies. Among the several design challenges that emerge as the oscillator frequency is scaled into the MMW band, precise quadrature synthesis and adequate frequency tuning range are among the hardest to achieve. After describing the limitation of using an MOS varactor and a digitally controlled switch capacitor array for frequency tuning, we propose an alternative frequency tuning technique based on the fundamental operation of LC QVCOs. The off-resonance operation, which is defined by the coupling network, suggests varying the coupling current to achieve frequency tuning. In essence, by modifying the bias current of the coupling transistors (GMc-tuning), a wide and linear frequency tuning range can be achieved. Extensive simulation results of a 60 GHz prototype, implemented in a 90 nm commercial RF CMOS process, demonstrates a 5 GHz of frequency tuning range (57.5 GHz → 62.5 GHz), a tuning sensitivity of 1GHz/mA, and a 4dB improvement in the phase noise compared to a varactor solution. Finally, the Appendix includes recent research work on the analysis and design of gm-boosted common-gate low-noise amplifiers (CG-LNAs). While this topic seems to diverge from the main theme of the dissertation, we believe that the comprehensive analysis and the originality of the circuit design introduced in this work are worth acknowledging.
- High-frequency Quasi-square-wave Flyback RegulatorZhang, Zhemin (Virginia Tech, 2016-11-28)Motivated by the recent commercialization of gallium-nitride (GaN) switches, an effort was initiated to determine whether it was feasible to switch the flyback converter at 5 MHz in order to improve the power density of this versatile isolated topology. Soft switching techniques have to be utilized to eliminate the switching loss to maintain high efficiency at multi-megahertz. Compared to the traditional modeling of zero-voltage-switching quasi-square-wave converters, a numerical methodology of parameters design is proposed based on the steady-state model of zero-voltage switching quasi-square-wave flyback converter. The magnetizing inductance is selected to guarantee zero-voltage switching for the entire input and load range with the trade-off design for conduction loss and turn-off loss. A design methodology is introduced to select a minimum core volume for an inductor or coupled inductors experiencing appreciable core loss. The geometric constant Kgac = MLT/(Ac2WA) is shown to be a power function of the core volume Ve, where Ac is the effective core area, WA is the area of the winding window, and MLT is the mean length per turn for commercial toroidal, ER, and PQ cores, permitting the total loss to be expressed as a direct function of the core volume. The inductor is designed to meet specific loss or thermal constraints. An iterative procedure is described in which two- or three-dimensional proximity effects are first neglected and then subsequently incorporated via finite-element simulation. Interleaved and non-interleaved planar PCB winding structures were also evaluated to minimize leakage inductance, self-capacitance and winding loss. The analysis on the trade-off between magnetic size, frequency, loss and temperature indicated the potential for a higher density flyback converter. A small-signal equivalent circuit of QSW converter was proposed to design the control loop and to understand the small-signal behavior. By adding a simple damping resistor on the traditional small-signal CCM model, it can predict the pole splitting phenomenon observed in QSW converter. With the analytical expressions of the transfer functions of QSW converters, the impact of key parameters including magnetizing inductance, dead time, input voltage and output power on the small-signal behavior can be analyzed. The closed-loop bandwidth can be pushed much higher with this modified model, and the transient performance is significantly improved. With the traditional fix dead-time control, a large amount of loss during dead time occurred, especially for the eGaN FETs with high reverse voltage drop. An adaptive dead time control scheme was implemented with simple combinational logic circuitries to adjust the turn on time of the power switches. A variable deadtime control was proposed to further improve the performance of adaptive dead-time control with simplified sensing circuit, and the extra conduction loss caused by propagation delay in adaptive dead-time control can be minimized at multi-megahertz frequency.
- Machine Learning-Driven Optimization of Livestock Management: Classification of Cattle Behaviors for Enhanced Monitoring EfficiencyZhao, Zhuqing; Shehada, Halah; Ha, Dong; Dos Reis, Barbara; White, Robin; Shin, Sook (ACM, 2024-08-02)Monitoring cattle health in remote and expansive pastures poses significant challenges that necessitate automated, continuous, and real-time behavior monitoring. This paper investigates the effectiveness and reliability sensor-based cattle behavior classification for such monitoring, emphasizing the impact of intelligent feature selection in enhancing classification performance. To achieve this, we developed Wireless Sensor Nodes (WSN) affixed to individual cattle, enabling the capture of 3-axis acceleration data from five cows across varying seasons, spanning from summer to winter. Initially, we extracted a comprehensive set of 52 features, representing a broad spectrum of cow behaviors alongside statistical attributes. To enhance computational efficiency, we employed the Recursive Feature Elimination (RFE) method to distill 30 critical features by discarding redundant or less significant ones. Subsequently, these optimized features were utilized to train four machine learning (ML) models: Support Vector Machine (SVM), k-Nearest Neighbors (k- NN), Random Forest (RF), and Histogram-based Gradient Boosted Decision Trees (HGBDT). Notably, the HGBDT model demonstrated superior performance, achieving remarkable F1-scores of 99.01% for ’grazing’, 98.74% for ’ruminating’, 89.62% for ’lying’, 84.06% for ’standing’, and 91.87% for ’walking’. These findings underscore the potential of our approach to serve as a robust framework for precision livestock farming, offering valuable insights into enhancing cattle health monitoring in remote environments.
- SegIt: Empowering Sensor Data Labeling with Enhanced Efficiency and SecurityZhang, Zhen; Abraham, Samuel; Lee, Alex; Li, Yichen; Morota, Gota; Ha, Dong; Shin, Sook (ACM, 2024-08-02)SegIt is a novel, user-friendly, and highly efficient sensor data labeling tool designed to tackle critical challenges such as data privacy, synchronization accuracy, and memory efficiency inherent in existing labeling tools. While many current sensor data labeling tools provide free online services, they typically necessitate users to upload unlabeled sensor data, alongside video or audio references, to cloud storage for labeling. Nevertheless, such third-party storage exposes user data to potential security risks. SegIt, an innovative open-source tool, provides a software solution for tagging unlabeled sensor data directly on a local computer, ensuring enhanced accuracy, convenience, and, most importantly, data security.
- Surplus and Scarce Energy: Designing and Optimizing Security for Energy Harvested Internet of ThingsSanthana Krishnan, Archanaa (Virginia Tech, 2018)Internet of Things require a continuous power supply for longevity and energy harvesting from ambient sources enable sustainable operation of such embedded devices. Using selfpowered power supply gives raise two scenarios, where there is surplus or scarce harvested energy. In situations where the harvester is capable of harvesting beyond its storage capacity, the surplus energy is wasted. In situations where the harvester does not have sufficient resources, the sparse harvested energy can only transiently power the device. Transiently powered devices, referred to as intermittent computing devices, ensure forward progress by storing checkpoints of the device state at regular intervals. Irrespective of the availability of energy, the device should have adequate security. This thesis addresses the security of energy harvested embedded devices in both energy scenarios. First, we propose precomputation, an optimization technique, that utilizes the surplus energy. We study two cryptographic applications, namely bulk encryption and true random number generation, and we show that precomputing improves energy efficiency and algorithm latency in both applications. Second, we analyze the security pitfalls in transiently powered devices. To secure transiently powered devices, we propose the Secure Intermittent Computing Protocol. The protocol provides continuity to underlying application, atomicity to protocol operations and detects replay and tampering of checkpoints. Both the proposals together provide comprehensive security to self-powered embedded devices.