Browsing by Author "Hsieh, Y. T."
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- Cascode GaN HEMT Gate Driving AnalysisHeumesser, V.; Lai, J. S.; Hsieh, H. C.; Hsu, J.; Yang, C. Y.; Chang, E. Y.; Liu, C. Y.; Chieng, W. H.; Hsieh, Y. T. (IEEE, 2023-01-01)The aim of this paper is to analyze the conventional cascode gate driving to understand the switching transition and to provide a design guide for the GaN HEMT and its associated packaging. A double-pulse tester has been designed and fabricated with minimum parasitic inductance to avoid unnecessary parasitic ringing. The switching behaviors in both turn-on and -off are analyzed through topological study and explained through SPICE simulation. Two different cascode devices were tested to show the impact of threshold voltage and low-voltage Si MOSFET selection.