Browsing by Author "Hsu, J."

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    Cascode GaN HEMT Gate Driving Analysis
    Heumesser, V.; Lai, J. S.; Hsieh, H. C.; Hsu, J.; Yang, C. Y.; Chang, E. Y.; Liu, C. Y.; Chieng, W. H.; Hsieh, Y. T. (IEEE, 2023-01-01)
    The aim of this paper is to analyze the conventional cascode gate driving to understand the switching transition and to provide a design guide for the GaN HEMT and its associated packaging. A double-pulse tester has been designed and fabricated with minimum parasitic inductance to avoid unnecessary parasitic ringing. The switching behaviors in both turn-on and -off are analyzed through topological study and explained through SPICE simulation. Two different cascode devices were tested to show the impact of threshold voltage and low-voltage Si MOSFET selection.
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    D-Mode GaN HEMT with Direct Drive
    Heumesser, V.; Lai, J. S.; Hsieh, H. C.; Hsu, J.; Yang, C. Y.; Chang, E. Y.; Ko, H. K.; Liu, W. H.; Lin, Y. M. (IEEE, 2023-01-01)
    A direct-driven gate driver circuit has been developed for the depletion-mode gallium nitride (d-mode GaN) high electron mobility transistor (HEMT), which is a'normally on'' device and is typically connected in series with a low-voltage power MOSFET to prevent shoot-through faults. The switching of such a''cascode'' device is substantially delayed due to a large MOSFET input capacitance. This paper introduces a charge-pump based direct-driven approach to provide a negative voltage in the gate drive loop so that the device becomes 'normally off The switching characteristics of the direct-driven HEMT is analyzed through computer simulation and hardware testing. Results indicate that the switching delays due to MOSFET gating is eliminated, and the voltage slew rate can be directly controlled by the gate resistance.