Browsing by Author "Huang, Xiucheng"
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- Avoiding internal switching loss in soft switching cascode structure device(United States Patent and Trademark Office, 2017-08-15)In a cascode switching device, avalanche breakdown of a control transistor and loss of soft switching or zero voltage switching in a high voltage normally-on depletion mode transistor having a negative switching threshold voltage and the corresponding losses are avoided by providing additional capacitance in parallel with a parallel connection of drain-source parasitic capacitance of the control transistor and gate-source parasitic capacitance of the high voltage, normally-on transistor to form a capacitive voltage divider with the drain-source parasitic capacitance of the high voltage, normally-on transistor such that the avalanche breakdown voltage of the control transistor cannot be reached. The increased capacitance also assures that the drain source parasitic capacitance of the high voltage, normally-on transistor is fully discharged before internal turn-on can occur.
- Circuit and method for driving synchronous rectifiers for high-frequency flyback converters(United States Patent and Trademark Office, 2017-11-07)A voltage waveform similar to a waveform of a magnetizing current of an isolation transformer and immune to high frequency oscillatory resonant behavior is developed across a capacitor of a series resistor and capacitor connection connected in parallel with a synchronous rectifier. A simple logic circuit produces a waveform for controlling the synchronous rectifier which is not subject to significant turn on delay or early turn off caused by oscillatory resonances among parasitic inductances and capacitances. Improved timing accuracy of a synchronous converter provides improved power converter accuracy, particularly for flyback converters which are commonly used in converters for supplying power to offline electrical devices but are subject to oscillatory resonant behaviors that cannot be adequately damped at switching frequencies sufficiently high to support miniaturization of adapters.
- High Frequency GaN Characterization and Design ConsiderationsHuang, Xiucheng (Virginia Tech, 2016-10-10)The future power conversion system not only must meet the characteristics demanded by the load, but also have to achieve high power density with high efficiency, high ambient temperature, and high reliability. Density and efficiency are two key drivers and metrics for the advancement of power conversion technologies. Generally speaking, a high performance active device is the first force to push power density to meet the requirement of modern systems. Silicon has been a dominant material in power management since the late 1950s. However, due to continuous device optimizations and improvements in the production process, the material properties of silicon have increasingly become the limiting factor. Workarounds like the super junction stretch the limits but usually at substantial cost. The use of gallium nitride devices is gathering momentum, with a number of recent market introductions for a wide range of applications such as point-of-load (POL) converters, off-line switching power supplies, battery chargers and motor drives. GaN devices have a much lower gate charge and lower output capacitance than silicon MOSFETs and, therefore, are capable of operating at a switching frequency 10 times greater. This can significantly impact the power density of power converters, their form factor, and even current design and manufacturing practices. To realize the benefits of GaN devices resulting from significantly higher operating frequencies, a number of issues have to be addressed, such as converter topology, soft-switching technique, high frequency gate driver, high frequency magnetics, packaging, control, and thermal management. This work studies the insight switching characteristics of high-voltage GaN devices including some specific issues related to the cascode GaN. The package impact on the switching performance and device reliability will be illustrated in details. A stack-die package is proposed for cascode GaN devices to minimize the impact of package parasitic inductance on switching transition. Comparison of hard-switching and soft-switching operation is carried based on device model and experiments, which shows the necessity of soft-switching for GaN devices at high frequency. This work also addresses high dv/dt and di/dt related gate drive issues associated with the higher switching speed of GaN devices. Particularly, the conventional driving solution could fail on the high side switch in a half-bridge configuration due to relative large common-mode noise current. Two simple and effective driving methods are proposed to improve noise immunity and maintain high driving speed. Finally, this work illustrates the utilization of GaN in an emerging application, high density AC-DC adapter. Many design considerations are presented in detail. The GaN-based adapter is capable of operating at 1-2 MHz frequency with an improved efficiency up to 94%. Several design examples at different power levels, with a power density in the range of 20~35W/in3, which is a three-fold improvement over the state-of-the-art product, are successfully demonstrated. In conclusion, this work is focus on the characterization, and evaluation of GaN devices. Packaging, high frequency driving and soft-switching technique are addressed to fully explore the potential of GaN devices. High density adapters are demonstrated to show the advance of GaN device and its impact on system design.
- Universal system structure for low power adapters(United States Patent and Trademark Office, 2017-12-19)A two-stage power converter architecture including an isolation transformer and rectification of the isolation transformer output by an LLC resonant circuit and methodology for operating the same feeds an output voltage back to a circuit for generating waveforms for controlling a totem pole circuit to provide output voltage regulation as well as rectification of AC input voltage. The circuit for controlling the totem pole circuit may also be responsive to the AC input power waveform to provide power factor correction (PFC), in which case, the feedback signal provides additional pulse width modulation of the PFC signals. Bus capacitor size may also be reduced by injecting harmonics of the AC input waveform into the feedback signal which also serves to substantially maintain efficiency of the (preferably LLC) resonant second stage.