Browsing by Author "Jackson, Brian Aliston"
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- Digital Filter Design and Synthesis Using High-level Modeling ToolsJackson, Brian Aliston (Virginia Tech, 1999-12-01)The purpose of this thesis is to formulate a technically sound approach to designing Infinite Impulse Response (IIR) digital filters using high-level modeling tools. High-level modeling tools provide the ability to build and simulate ideal models. Once proper validation is complete on these ideal models, the user can then migrate to lower levels of abstraction until an actual real world model is designed. High-level modeling tools are the epitome of the top-down design concept in which design first takes place with the basic functional knowledge of a system. With each level of abstraction, validation is performed. High-level modeling tools are used throughout industry and their application is continually growing especially in the DSP area where many modes of communications are expanding. High-level modeling tools and validation significantly address this complex expansion by utilizing an ideal representation of a complicated network.
- Translation of Heterogeneous High-level Models to Lower Level Design LanguagesJackson, Brian Aliston (Virginia Tech, 2005-04-29)Proceeding from a specification, one develops an abstract mathematical model of a system, or portion of a system. This model of a system is validated to insure that the specification is interpreted accurately and to explore different algorithms for implementing the system behavior. We use the words "portion of a system," because only rarely are systems designed wholly using a purely top-down approach. Commonly, the design approach is a mixture of top-down and bottom-up. But even in this mixed approach, top-down techniques are critical to the development of new, advanced system features and improving the performance of existing system components. An example of this style of design tools and environments is Ptolemy II. Ptolemy II is a high-level modeling tool created at UC-Berkeley. It supports heterogeneous and homogeneous modeling, simulation, and design of concurrent systems. High-level modeling of such embedded systems as digital electronics, hardware, and software can be effectively represented. The bottom-up design approach exploits design reuse to achieve the productivity necessary to build complex systems. Historically, chip design companies have always reused designs in going from one product generation to another, but the efficiency of bottom-up design is enhanced by the use of IP (Intellectual Property) cores that a company can buy from an outside source. Design libraries are useful for system design and are an example of IP cores. A sound methodology to translate Ptolemy models to SystemC models would have a very beneficial effect on the CAD/EDA industry. Ptolemy II is written in Java and its high-level designs, or abstract graph models, are represented as XML documents. Ptolemy's major emphasis is on the methodology for defining and producing embedded software together with the system in which it is embedded. SystemC is written in C++, and its industrial use is gaining momentum due to its ability to represent functionality, communication, software, and hardware at various levels of abstraction. SystemC produces synthesizable code. A methodology to convert Ptolemy models to synthesizable SystemC code would be the technical epitome of a hybrid between top-down and bottom-up design styles and methodologies. Such a methodology would enable system designers to obtain fast design exploration, efficient IP-reuse, and validation. Ptolemy has various components and models of computation. A model of computation dictates how components interact between other components. SystemC has its own models of computation and design libraries. XML and Perl are both powerful tools by themselves, and we use these tools in this research to create a sound methodology for translating Ptolemy models (high-level of abstraction) to synthesizable SystemC code (low-level of abstraction), i.e.: code which can serve as input to hardware tools.