Browsing by Author "Nagata, M."

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    Metalorganic chemical vapor deposition of ferroelectric SrBi2Ta2O9 thin films
    Li, T. K.; Zhu, Y. F.; Desu, Seshu B.; Peng, C. H.; Nagata, M. (AIP Publishing, 1996-01-01)
    Ferroelectric layered-oxides SrBi2Ta2O9 thin films were prepared on Pt coated Si wafers and single-crystal sapphire by metalorganic chemical vapor deposition (MOCVD). The films were specular and crack-free and showed complete crystallization at temperatures between 650 and 700 degrees C. Good ferroelectric properties were obtained for a 200 nm thick film with Pt electrodes: 2P(r) and E(c) were about 8.3 mu C/cm(2) and 60 kV/cm, respectively. The leakage currents were as low as 8 X 10(-9) A/cm(2) at 150 kV/cm. The films also showed fatigue-free characteristics: no fatigue was observed up to 1.4 X 10(10) switching cycles. These high quality MOCVD films make high-intensity (>1 Mbit) nonvolatile memory devices possible. (C) 1996 American Institute of Physics.
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    Novel high temperature multilayer electrode-barrier structure for high-density ferroelectric memories
    Bhatt, H. D.; Desu, Seshu B.; Vijay, Dilip P.; Hwang, Y. S.; Zhang, X.; Nagata, M.; Grill, A. (AIP Publishing, 1997-08-01)
    This has been accomplished in the past using four/five separate electrode- and diffusion-barrier layers. In this letter, we report a novel Pt-Rh-O-x/Pt-Rh/Pt-Rh-O-x electrode-barrier structure which acts as an electrode as well as a diffusion barrier for integration of the ferroelectric capacitors directly onto silicon deposited using an in situ reactive rf sputtering process. The electrodes have a smooth and fine grained microstructure and are excellent diffusion barriers between the PbZr0.53Ti0.47O3 (PZT) and Si substrate and exhibit good thermal stability up to very high processing temperatures of 700 degrees C. The ferroelectric (PZT) test capacitors using these electrode barriers grown directly on Si, show well saturated hysteresis loops with P-r and E-c of 16 mu C/cm(2) and 30-40 kV/cm, respectively. The capacitors exhibit no significant fatigue loss (<5%) up to 10(11) cycles and have low leakage currents (2X10(-8) A/cm(2) at 100 kV/cm). These electrode barriers can be used to directly integrate the thin film capacitors on the source/drain of the transistors of the memory cell structure for accomplishing large scale integration. (C) 1997 American Institute of Physics.