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Browsing by Author "Ren, Yuancheng"

Now showing 1 - 9 of 9
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    Buck converter with high efficiency gate driver providing extremely short dead time
    (United States Patent and Trademark Office, 2007-02-27)
    A buck converter has a driver circuit with a drive transformer that provides complementary voltages to the buck converter switches. The drive transformer may have two secondary windings, with one winding for each converter switch. As one converter switch experiences a rising gate voltage, the other converter switch experiences a falling gate voltage. Since both converter switches are controlled by the same driver switches, the converter switch dead time is very small. Preferably, at least one converter switch has a voltage shift circuit connected to the gate electrode. Adjustment of the voltage shift magnitude will advance or delay the turn on and turn off times of the switch. Hence, the converter switch dead time can be precisely adjusted by varying the voltage shift magnitude. Preferably, the converter switch dead time is less than 1 or 2 nanoseconds.
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    High Frequency, High Efficiency Two-Stage Approach for Future Microprocessors
    Ren, Yuancheng (Virginia Tech, 2005-04-22)
    It is perceived that Moore's Law will prevail at least for the next decade, with continuous advancements of processing technologies for very-large-scale integrated (VLSI) circuits. Nano technology is driving VLSI circuits in a path of greater transistor integration, faster clock frequency, and lower operation voltage. This has imposed a new challenge for delivering high- quality power to modern processors. Power management technology is critical for transferring the required high current in a highly efficient way, and accurately regulating the sub-1V voltage in very fast dynamic transient response conditions. Furthermore, the VRs are limited in a given area and the power density is important to save the precious real estate of the motherboard. Based on the power delivery path model, the analysis results show that as long as the bandwidth can reach around 350 kHz, the bulk capacitor of the VR can be completely eliminated, which means significant savings in cost and real estate. Analysis also indicates that 650kHz bandwidth can reduce the number of the decoupling capacitor from 230 to 50 for future microprocessor case. Beyond 650kHz, the reduction is not obvious any more due to the parasitic components along the power delivery path. Following the vision of high bandwidth, the VRs need to operate at much higher frequency than today's practice. Unfortunately, the multiphase buck converter cannot benefit from it due to the low efficiency at high switching frequency. The extreme duty is the bottleneck. The extreme duty cycle increases VR switching loss, reverse recovery loss, and conduction loss; therefore makes the 12V-input VR efficiency drop a good deal when compared with 5V-input VR efficiency. Two-stage approach is proposed in this dissertation to solve this issue. The analysis shows that the two-stage conversion has much better high frequency capability than the conventional single stage VRs. Based on today's commercial devices, 2-MHz is realized by the hardware and 350kHz bandwidth is achieved to eliminate the output bulk capacitors. Further improvement based on future devices and several proposed methods of reducing switching loss and body diode loss can push the switching frequency up to 4MHz while maintaining good efficiency. Such a high frequency makes the high bandwidth design (650kHz) feasible. Hence, the output capacitance can be significantly reduced to save cost and real estate. The two-stage concept is also effective in laptop computer and 48V DPS applications. It has been experimentally proved that two-stage VR is able to achieve higher switching frequency than single stage not only at full load condition but also at light load condition by the proposed ABVP and AFP concept based on two-stage configuration. These unique control strategies make the two-stage approach even more attractive. As the two-stage approach is applied to 48V DPS applications, such as telecommunication system and server systems, more efficient and higher power density power supply can be achieved while greatly cut down the cost. Therefore, after the two-stage approach is proposed, it has been widely adopted by the industry. In order to further reduce the output capacitance, the power architecture of computer needs to be modified. Based on two-stage approach, one possible solution is to move the second stage VR up to the OLGA board. Based on this structure, the parasitics can be dramatically reduced and the number of the cavity capacitor is reduced from 50 to 14. By reducing ESL of the capacitor, the output capacitance could be further reduced. After that and based on two-stage approach again, VR+LR structure is discussed, which provides the opportunity to reduce the output capacitance and integrate the power supply with CPU. The feasibility is studied in this dissertation from both power loss reduction and output capacitance reduction perspectives. Experimental results prove that LR can significantly reduce the voltage spike while minimizing the output capacitance. As a conclusion, the two-stage approach is a promising solution for powering future processors. It is widely effective in computer and communication systems. Far beyond that, it provides a feasible platform for new architectures to power the future microprocessors.
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    Hybrid filter for high slew rate output current application
    (United States Patent and Trademark Office, 2009-07-14)
    An active linear regulator circuit in parallel with a filter capacitor of a switching voltage regulator injects current to a load only when the switching regulator and capacitor cannot supply adequate current to follow high frequency load transients in a manner which is compatible with adaptive voltage positioning (AVP) requirements. control of current injection and determination of the insufficiency of current from the switching regulator and capacitors is achieved by impedance matching of the linear regulator to the switching regulator. The linear regulator thus operates at relatively low current and duty cycle to limit power dissipation therein. By matching impedances and increasing the bandwidth of the switching regulator, filter capacitor requirements can be reduced to the point of being met entirely by packaging and/or on-die capacitors which may be placed close to or at the point of load to reduce parasitic inductance, as can the linear regulator.
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    Hybrid filter for high slew rate output current application
    (United States Patent and Trademark Office, 2009-09-01)
    An active linear regulator circuit in parallel with a filter capacitor of a switching voltage regulator injects current to a load only when the switching regulator and capacitor cannot supply adequate current to follow high frequency load transients in a manner which is compatible with adaptive voltage positioning (AVP) requirements. control of current injection and determination of the insufficiency of current from the switching regulator and capacitors is achieved by impedance matching of the linear regulator to the switching regulator. The linear regulator thus operates at relatively low current and duty cycle to limit power dissipation therein. By matching impedances and increasing the bandwidth of the switching regulator, filter capacitor requirements can be reduced to the point of being met entirely by packaging and/or on-die capacitors which may be placed close to or at the point of load to reduce parasitic inductance, as can the linear regulator.
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    Power converters having capacitor resonant with transformer leakage inductance
    (United States Patent and Trademark Office, 2007-03-27)
    Power converters having reduced body diode conduction loss, reduced reverse recovery loss and lower switching noise, among other benefits, have a resonant capacitor Cr connected across an unfiltered output. The resonant capacitor Cr resonates with the leakage inductance Lk of the transformer. The resonant capacitor and leakage inductance are selected such that ½ a LC resonance period is equal to an ON time of each secondary switch S1 S2. The resonance provides zero current switching for secondary switches S1 S2, eliminates zero body diode conduction during dead times, and eliminates reverse recovery losses in the secondary switches. The present invention is applicable to many different circuit topologies such as full bridge, active clamp forward, push-pull forward, and center-tap secondary. The present converters provide high energy conversion efficiency and high frequency operation.
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    Power converters having output capacitor resonant with autotransformer leakage inductance
    (United States Patent and Trademark Office, 2007-08-07)
    Power converters having reduced body diode conduction loss, reduced reverse recovery loss and lower switching noise, among other benefits, have a resonant capacitor Cr connected across an unfiltered output. The resonant capacitor Cr resonates with the leakage inductance Lk of the transformer. The resonant capacitor and leakage inductance are selected such that ½ a LC resonance period is equal to an ON time of each secondary switch S1 S2. The resonance provides zero current switching for secondary switches S1 S2, eliminates zero body diode conduction during dead times, and eliminates reverse recovery losses in the secondary switches. The present invention is applicable to many different circuit topologies such as full bridge, active clamp forward, push-pull forward, and center-tap secondary. The present converters provide high energy conversion efficiency and high frequency operation.
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    Self-driven circuit for synchronous rectifier DC/DC converter
    (United States Patent and Trademark Office, 2006-03-21)
    A power converter having a primary circuit (e.g. full bridge) and a secondary circuit (e.g. current doubler) has switches in the secondary circuit that are controlled by a drive circuit. The drive circuit is connected to a swing node in the primary circuit, and is powered by the primary circuit. The drive circuit has an isolation device such as a transformer to provide electrical isolation between the primary circuit and secondary circuit. The drive circuit provides a current source for driving the secondary switch gates, thereby reducing power consumption. The present drive circuit provides clean gate drive signals without noise and oscillations. The drive circuits of the invention are simple, and require only a few components.
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    Self-driven circuit for synchronous rectifier DC/DC converter
    (United States Patent and Trademark Office, 2004-11-16)
    A power converter having a primary circuit (e.g. full bridge) and a secondary circuit (e.g. current doubler) has switches in the secondary circuit that are controlled by a drive circuit. The drive circuit is connected to a swing node in the primary circuit, and is powered by the swing node. The drive circuit has an isolation device such as a transformer to provide electrical isolation between the primary circuit and secondary circuit. The drive circuit provides a current source for driving the secondary switch gates, thereby reducing power consumption. The present drive circuit provides clean gate drive signals without noise and oscillations. The drive circuits of the invention are simple, and require only a few components.
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    Two-stage voltage regulators with adjustable intermediate bus voltage, adjustable switching frequency, and adjustable number of active phases
    (United States Patent and Trademark Office, 2006-07-04)
    A two-stage power converter that dynamically adjusts to output current requirements includes a first stage regulator that provides power to a second stage regulator. The first stage can be a buck converter, and the second stage can be a multiple-phase buck converter. The output voltage of the first stage (intermediate bus voltage Vbus) is varied according to the load current to optimize conversion efficiency. To provide maximum efficiency, the Vbus voltage is increased as load current increases. The Vbus voltage provided by the first stage can be varied by duty cycle or operating frequency control. In another embodiment, the switching frequency of the second stage is varied as output current changes so that output current ripple is held constant. In an embodiment employing a multiple-phase buck converter in the second stage, the number of operating phases are varied as output current changes.