Browsing by Author "Sen, Sidhartha"
Now showing 1 - 2 of 2
Results Per Page
Sort Options
- Effects of ion processing and substrate variables on electrical characteristics of GaAsSen, Sidhartha (Virginia Tech, 1991)The main objective of this study was to determine fundamental information related to ionbeam-induced damage to gallium arsenide (GaAs). The study covers experimental results concerning defect creation in GaAs versus parameters such as implantation energy, nature of GaAs substrate, crystalline orientation, and annealing. Transport and deep level transient spectroscopy (DLTS) results are presented for 50 keV Si-implanted and RTA (rapid thermal annealing) GaAs with (100) and (211) substrate orientations. Several electron traps are identified and their possible origins discussed. It is observed that (211) GaAs, after Si-implantation and RTA, has higher residual damage than (100) oriented GaAs. The electrical properties of active GaAs on Cr-doped and undoped GaAs substrates are compared. The DLTS response of active layers on Cr-doped GaAs is significantly different from those on undoped GaAs. A viable explanation that accounts for this difference is presented. The effects of furnace annealing on electrical properties of 50 keV, 4 x 10¹³ cm⁻² Si-implanted GaAs are addressed. A correlation between the structural recovery and electrical activation is established. The effects of 2 and 6 MeV Si implantation followed by RTA on the electrical characteristics of GaAs are investigated in detail. MeV Si-implantation and RTA generates active buried layers in GaAs. The buried layer quality is found to be at least comparable to a similarly processed keV Si-implanted active GaAs layer. The deep traps in MeV-implanted GaAs are identified and explained in terms of their probable origins. The deep level behavior of MeV Si-implanted and RTA GaAs is distinctly different from keV Si-implanted and RTA GaAs. This difference is largely due to the dynamic annealing occurring during MeV implantation. MESFETs formed on MBE-grown Al.35Ga.65As and low temperature MBE-grown GaAs buffer layers have shown peculiar characteristics (improved transconductance, sharper carrier profile, variability in threshold voltage, significant backgating, etc.). The effects of Al.35Ga.65As buffers and low temperature GaAs buffers on the electrical properties of the overlying active GaAs are investigated. Transport, DLTS, and SIMS (Secondary Ion Mass Spectroscopy) measurements are employed to explain the abnormalities in buffered MESFETs. Deep states and impurities are identified in buffers; they appear to migrate toward the channel-buffer interface during processing. The defects originating from the buffer are correlated to the performance of MESFETs formed on them. The effects of ion processing parameters, substrate chemistry, buffer layers, and annealing on the electrical characteristics of active GaAs layers are identified. An understanding of these effects is extremely critical to obtain reproducible devices with desirable characteristics.
- Electrical studies on ion-etched n-GaAs(100) surfacesSen, Sidhartha (Virginia Tech, 1987-12-15)The major objective of this thesis was to evaluate electrically the damage caused by a low energy (< 4keV) Ar+ bombardment on n-GaAs(100) surfaces. Electrical measurements were performed on Schottlky diodes formed on the virgin and the ion-etched surfaces. The l-V measurements show deterioration of diode parameters by ion etching. The ion etched diodes have a strong component of surface leakage current. The high frequency capacitance of ion-etched diodes is less than that of the virgin diodes. The low frequency capacitance of ion-etched diodes was found to be frequency dispersive. The extent of frequency dispersion diminishes at low temperatures and at low reverse biases. Virgin diode capacitance, on the other hand, was found to be independent of frequency. The electrical characteristics of ion-etched diodes are explained by means of an amorphous layer and a donor-like damaged layer formed as a result of ion etching. The depth of the top amorphous layer increases with etch energy. The damaged layer containing the ion induced traps superimposes over the amorphous layer and extends deep into the bulk semi-conductor. The density of such traps is very bias sensitive and also temperature dependent. A possible equivalent circuit model for the ion-etched material is proposed. Low temperature isochronal annealing (< 450°C, 10mins.) was not found effective in causing complete recovery of the ion-damaged surface.