Browsing by Author "Tian, Shuilin"

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    Equivalent Circuit Model of High Frequency PWM and Resonant Converters
    Tian, Shuilin (Virginia Tech, 2015-09-30)
    Distributed power system (DPS) is widely adopted in Power supplies for the telecom, computer and network applications. Constant on-time current mode control and V2 control are widely used as point-of-load (POL) converters and voltage regulators (VR) in DPS systems. Series resonant converters (SRC) are widely used in aerospace systems and LLC resonant converters are widely used as Front-end converters in DPS systems. The technological innovations bring increasing demand for optimizing the dynamic performance of the switching regulators in these applications. There has been a strong desire to develop simple and accurate equivalent circuit models to facilitate the design of these converters. Constant on-time current-mode control has been widely used in POL and VRM converters. For multi-phase application, external ramp is required to improve jittering performance using pulse distribution method. Chapter II analyzes the effect of external ramp on small-signal model of constant on-time current mode control. It is found that external ramp brings additional dynamics by introducing a moving pole and a static zero. Next, a three-terminal switch model is proposed based on non-ideal current source concept, where the non-idealness of the current source is presented by a Re2-Le2 branch. Based on the proposed model, design guidelines are proposed based on either worst case design strategy or auto-tuning strategy. V2 control has advantages of simple implementation and fast transient response and is widely used in industry for POL and VR applications. However, the capacitor voltage sideband effect, which casues the instability problem when ceramic capacitors are employed, also needs to be taken into consideration in modeling. Chapter III proposed a unified equivalent circuit model of V2 control, the model is built based on non-ideal voltage source concept. The model represents capacitor voltage sideband effect with a Re2-Le2 branch, which forms the double pole by resonating with power stage output capacitor. The equivalent circuit model is a complete model and can be used to examine all the transfer functions. Bsed on the unified equivalent circuit model, design guidelines for VR applications and general POL applications are provided in Chapter IV, for both constant on-time V2 control and constant frequency V2 control. For resonant converters, the small-sginal modelling is very challenging as some of the state variables do not have dc components but contain strong switching frequency component and therefore the average concept breaks down. For SRC, the equivalent circuit model proposed by E. Yang in [E26] based on the results by the extended describing function concept is the most successful model. However, the order of the equivalent circuit model is too high and the transfer functions are still derived based on numerical solution instead of analytical solutions. Chapter V proposes a methodology to simplify the fifth-order equivalent circuit of SRC to a third-order equivalent circuit. The proposed equivalent circuit model can be used to explain the beat frequency dynamics: when switching frequency is far away from resonant frequency, beat frequency will occur; when the two frequencies are close, beat frequency will disappear and another double pole which is determined by equivalent inductor and output capacitor will be formed. For the first time, analytical solutions are provided for all the transfer functions which are very helpful for feedback design. LLC resonant converters are widely adopted as front-end converter in distributed power system for the telecom, computer and network applications [F2]. Besides, LLC resonant converters are also very popular in other applications, such as LCD, LED and plasma display in TV and flat panels [F3]-[F6]; iron implanter arc power supply[F7]; solar array simulator in photovoltaic application[F8]; fuel cell applications[F9],and so on. For LLC, no simple equivalent circuit model is available and no analytical expressions of transfer functions are presented. Chapter VI proposes an equivalent circuit model for LLC resonant converter. When Fs ≥ Fo, Lm is clamped by the output voltage and LLC behaves very similar as SRC. As a result, the dynamic behavior is similar as SRC: when switching frequency is larger than resonant frequency, the beat frequency double pole show up and the circuit is third-order; when switching frequency is close to resonant frequency, beat frequency double pole disappear and a new double pole formed by equivalent inductor Le and equivalent output capacitor Cf show up. The circuit reduces to second order. When Fs
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    Small-signal Analysis and Design of Constant-on-time V2 Control for Ceramic Caps
    Tian, Shuilin (Virginia Tech, 2012-04-19)
    Recently, constant-on-time V2 control is more and more popular in industry products due to features of high light load efficiency, simple implementation and fast transient response. In many applications such as cell phone, camera, and other portable devices, low-ESR capacitors such as ceramic caps are preferred due to small size and small output voltage ripple requirement. However, for the converters with ceramic caps, the conventional V2 control suffers from the sub-harmonic oscillation due to the lagging phase of the capacitor voltage ripple relative to the inductor current ripple. Two solutions to eliminate sub-harmonic oscillations are discussed in [39] and the small-signal models are also derived based on time-domain describing function. However, the characteristic of constant-on-time V2 with external ramp is not fully understood and no explicit design guideline for the external ramp is provided. For digital constant on-time V2 control, the high resolution PWM can be eliminated due to constant on-time modulation scheme and direct output voltage feedback [43]. However, the external ramp design is not only related to the amplitude of the limit-cycle oscillation, but also very important to the stability of the system. The previous analysis is not thorough since numerical solution is used. The primary objective of this work is to gain better understanding of the small-signal characteristic for analog and digital constant-on-time V2 with ramp compensations, and provide the design guideline based on the factorized small-signal model. First, constant on-time current-mode control and constant on-time V2 control are reviewed. Generally speaking, constant-on-time current mode control does not have stability issues. However, for constant-on-time V2 control with ceramic caps, sub-harmonic oscillation occurs due to the lagging phase of the capacitor voltage ripple. External ramp compensation and current ramp compensation are two solutions to solve the problem. Previous equivalent circuit model extended by Ray Ridley's sample-and-hold concept is not applicable since it fails to consider the influence of the capacitor voltage ripple. The model proposed in [39] successfully considers the influence from the capacitor voltage ripple by using time-domain describing function method. However, the characteristic of constant-on-time V2 with external ramp is not fully understood. Therefore, more research focusing on the analysis is needed to gain better understanding of the characteristic and provide the design guideline for the ramp compensations. After that, the small-signal model and design of analog constant on-time V2 control is investigated and discussed. The small-signal models are factorized and pole-zero movements are identified. It is found that with increasing the external ramp, two pairs of double poles first move toward each other at half of switching frequency, after meeting at the key point, the two double poles separate, one pair moves to a lower frequency and the other moves to a higher frequency while keeping the quality factor equal to each other. For output impedance, with increasing the external ramp, the low frequency magnitude also increases. The recommended external ramp is around two times the magnitude at the key point K. When Duty cycle is larger, the damping performance is not good with only external ramp compensation, unless very high switching frequency is used. With current ramp compensation, it is recommended to design the current ramp so that the quality factor of the double pole is around 1. With current ramp compensation, the damping can be well controlled regardless of the circuit parameters. Next, the small-signal analysis and design strategy is also extended to digital constant on-time V2 control structure which is proposed in [43]. It is found that the scenario is very similar as analog constant on-time V2 control. The external ramp should be designed around the key point to improve the dynamic performance. The sampling effects of the output voltage require a larger external ramp to stabilize digital constant-on-time V2 control while suffers only a little bit of damping performance. One simple method for measuring control-to-output transfer functions in digital constant-on-time V2 control is presented. The experimental results verify the small-signal analysis except for the high frequency phase difference which reveals the delay effects in the circuit. Load transient experimental results prove the proposed design guideline for digital constant on-time V2 control. As a conclusion, the characteristics of analog and digital constant-on-time V2 control structures are examined and design guidelines are proposed for ramp compensations based on the factorized small-signal model. The analysis and design guideline are verified with simplis simulation and experimental results.