Browsing by Author "Wu, Yingxiang"

Now showing 1 - 2 of 2
  • Thumbnail Image
    Describing Integrated Power Electronics Modules using STEP AP210
    Wu, Yingxiang (Virginia Tech, 2004-04-22)
    The software environment for power electronics design is comprised of tools that address many interrelated disciplines including circuits design, physical layout, thermal management, structural mechanics, and electromagnetics. This usually results in a number of separate models that provide various views of a design, each of which is usually stored separately in proprietary formats. The problem is that the relationships between views (e.g., the circuit design that defines the functional connectivity between components, and the physical layout that provides physical paths to implement connections), are not explicitly captured. This makes it difficult to synchronize and maintain data consistency across all models as changes are made to the respective views. This thesis addresses this problem by describing power electronics modules using STEP AP210, the STandard for the Exchange of Product data, Application Protocol 210; which has been designated as ISO 10303-210. A multidisciplinary model was implemented for an integrated power electronics module (IPEM). It consists of two views of the IPEM: a functional network definition of the IPEM, and a physical implementation that satisfies the functional connectivity requirements. The relationships between these two views are explicitly recorded in the model. These relationships allow for the development of a method which verifies whether the connectivity data in both views are consistent. Finally, this thesis provides guidance for deploying STEP AP210 to unify multidisciplinary data resources during the design of integrated power electronics.
  • Thumbnail Image
    Rapid Prototyping Job Scheduling Optimization
    Wu, Yingxiang (Virginia Tech, 2001-11-16)
    Today's commercial rapid prototyping systems (i.e., solid freeform fabrication, layered manufacturing) rely on human intervention to load and unload build jobs. Hence, jobs are processed subject to both the machine's and the operator's schedules. In particular, first-in-first-out (FIFO) queuing of such systems will result in machine idle time whenever a build job has been completed and an operator is not available to unload that build job and start up the next one. These machine idle times can significantly affect the system throughput, and, hence, the effective cost rate. This thesis addresses this problem by rearranging the job queue to minimizing the machine idle time, subject to the machine's and operator's schedules. This is achieved by employing a general branch-and-bound search method, that, for efficiency, reduces the search space by identifying contiguous sequences and avoiding reshuffling of those sequences during the branching procedure. The effectiveness of this job scheduling optimization has been demonstrated using a sequence of 30 jobs extracted from the usage log for the FDM 1600 rapid prototyping system in the Department of Mechanical Engineering at Virginia Tech.