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dc.contributor.authorArchuleta, Jeremyen_US
dc.contributor.authorScogland, Thomas R. W.en_US
dc.contributor.authorTilevich, Elien_US
dc.date.accessioned2013-06-19T14:35:59Z
dc.date.available2013-06-19T14:35:59Z
dc.date.issued2008
dc.identifierhttp://eprints.cs.vt.edu/archive/00000982/en_US
dc.identifier.urihttp://hdl.handle.net/10919/19792
dc.description.abstractThe recent shift in computer system design to multi-core technology requires that the developer leverage explicit parallel programming techniques in order to utilize available performance. Nevertheless, developing the requisite parallel applications remains a prohibitively-difficult undertaking, particularly for the general programmer. To mitigate many of the challenges in creating concurrent software, this paper introduces a new parallel programming methodology that leverages feature-oriented programming (FOP) to logically decompose a product line architecture (PLA) into concurrent execution units. In addition, our efficient implementation of this methodology, that we call concurrent mixin layers, uses a layered architecture to facilitate the development of parallel applications. To validate our methodology and accompanying implementation, we present a case study of a product line of multimedia applications deployed within a typical multi-core environment. Our performance results demonstrate that a product line can be effectively transformed into parallel applications capable of utilizing multiple cores, thus improving performance. Furthermore, concurrent mixin layers significantly reduces the complexity of parallel programming by eliminating the need for the programmer to introduce explicit low-level concurrency control. Our initial experience gives us reason to believe that concurrent mixin layers is a promising technique for taming parallelism in multi-core environments.en_US
dc.format.mimetypeapplication/pdfen_US
dc.publisherDepartment of Computer Science, Virginia Polytechnic Institute & State Universityen_US
dc.subjectParallel computationen_US
dc.titleTaming Multi-core Parallelism with Concurrent Mixin Layersen_US
dc.typeTechnical reporten_US
dc.identifier.trnumberTR-08-22en_US
dc.type.dcmitypeTexten_US
dc.identifier.sourceurlhttp://eprints.cs.vt.edu/archive/00000982/01/gpce.pdf


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