MOANA: Modeling and Analyzing I/O Variability in Parallel System Experimental Design

TR number
TR-18-04Date
2018-04-19Author
Cameron, Kirk W.
Anwar, Ali
Cheng, Yue
Xu, Li
Li, Bo
Ananth, Uday
Lux, Thomas
Hong, Yili
Watson, Layne T.
Butt, Ali R.
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Exponential increases in complexity and scale make variability a growing threat to sustaining HPC performance at exascale. Performance variability in HPC I/O is common, acute, and formidable. We take the first step towards comprehensively studying linear and nonlinear approaches to modeling HPC I/O system variability. We create a modeling and analysis approach (MOANA) that predicts HPC I/O variability for thousands of software and hardware configurations on highly parallel shared-memory systems. Our findings indicate nonlinear approaches to I/O variability prediction are an order of magnitude more accurate than linear regression techniques. We demonstrate the use of MOANA to accurately predict the confidence intervals of unmeasured I/O system configurations for a given number of repeat runs – enabling users to quantitatively balance experiment duration with statistical confidence.