Dynamic Gate Breakdown of p-Gate GaN HEMTs in Inductive Power Switching

dc.contributor.authorWang, Bixuanen
dc.contributor.authorZhang, Ruizheen
dc.contributor.authorWang, Hengyuen
dc.contributor.authorHe, Quanboen
dc.contributor.authorSong, Qihaoen
dc.contributor.authorLi, Qiangen
dc.contributor.authorUdrea, Florinen
dc.contributor.authorZhang, Yuhaoen
dc.date.accessioned2024-01-31T13:58:31Zen
dc.date.available2024-01-31T13:58:31Zen
dc.date.issued2023-02en
dc.description.abstractWe employ a new circuit method to characterize the gate dynamic breakdown voltage (BVdyn) of Schottky-type p-gate GaN HEMTs in power converters. Different from prior pulse I-V and DC stress tests, this method features a resonance-like gate ringing with the pulse width down to 20 ns and an inductive switching concurrently in the drain-source loop. At the increased pulse width, the gate BVdyn shows a decrease and then saturation at 21~22 V. Moreover, the gate BVdyn increases with temperature and is higher under the hard switching than that under the drain-source grounding condition. In the 400 V hard switching at 150 oC, the gate BVdyn reaches 27.5 V. Such impact of the drain switching locus and temperature on the gate BVdyn is not seen in Si and SiC power transistors tested in the same setup. These results are explained by a physics model that accounts for the electrostatics in the p-GaN gate stack in hard switching and at high temperatures. This work unveils new physics critical to the gate robustness of p-gate GaN HEMTs and manifest the necessity of the gate robustness evaluation in inductive switching conditions.en
dc.description.sponsorshipThis work is supported in part by the Power Management Consortium of the Center for Power Electronics Systems at Virginia Tech and in part by the National Science Foundation under the Grants ECCS-2045001 and ECCS-2036740.en
dc.description.versionAccepted versionen
dc.format.extentp. 217-220en
dc.format.mimetypeapplication/pdfen
dc.identifier.citationB. Wang, R. Zhang, H. Wang, Q. He, Q. Song, Q. Li, F. Udrea, and Y. Zhang, “Dynamic Gate Breakdown of p-Gate GaN HEMTs in Inductive Power Switching,” in IEEE Electron Device Letters, vol. 44, no. 2, pp. 217-220, Feb. 2023, doi: 10.1109/LED.2022.3227091.en
dc.identifier.doihttps://doi.org/10.1109/LED.2022.3227091en
dc.identifier.issue2en
dc.identifier.urihttps://hdl.handle.net/10919/117742en
dc.identifier.volume44en
dc.language.isoenen
dc.publisherIEEEen
dc.rightsCreative Commons Attribution 4.0 Internationalen
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/en
dc.subjectGaNen
dc.subjectHEMTen
dc.subjectpower electronicsen
dc.subjecthard switchingen
dc.subjectgateen
dc.subjectbreakdown voltageen
dc.subjectovervoltageen
dc.subjectruggednessen
dc.subjectreliabilityen
dc.titleDynamic Gate Breakdown of p-Gate GaN HEMTs in Inductive Power Switchingen
dc.title.serialIEEE Electron Device Lettersen
dc.typeArticle - Refereeden
dc.type.dcmitypeTexten

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