1 kV Self-Aligned Vertical GaN Superjunction Diode
| dc.contributor.author | Ma, Yunwei | en |
| dc.contributor.author | Porter, Matthew | en |
| dc.contributor.author | Qin, Yuan | en |
| dc.contributor.author | Spencer, Joseph | en |
| dc.contributor.author | Du, Zhonghao | en |
| dc.contributor.author | Xiao, Ming | en |
| dc.contributor.author | Wang, Yifan | en |
| dc.contributor.author | Kravchenko, Ivan | en |
| dc.contributor.author | Briggs, Dayrl P. | en |
| dc.contributor.author | Hensley, Dale K. | en |
| dc.contributor.author | Udrea, Florin | en |
| dc.contributor.author | Tadjer, Marko | en |
| dc.contributor.author | Wang, Han | en |
| dc.contributor.author | Zhang, Yuhao | en |
| dc.date.accessioned | 2024-01-18T16:25:40Z | en |
| dc.date.available | 2024-01-18T16:25:40Z | en |
| dc.date.issued | 2024-01 | en |
| dc.description.abstract | This work demonstrates vertical GaN superjunction (SJ) diodes fabricated via a novel self-aligned process. The SJ comprises n-GaN pillars wrapped by the charge-balanced p-type nickel oxide (NiO). After the NiO sputtering around GaN pillars, the self-aligned process exposes the top pillar surfaces without the need for additional lithography or a patterned NiO etching which is usually difficult. The GaN SJ diode shows a breakdown voltage (B V) of 1100 V, a specific on-resistance ( RON) of 0.4 mΩ⋅ cm2, and a SJ drift-region resistance ( Rdr) of 0.13 mΩ⋅ cm2. The device also exhibits good thermal stability with B V retained over 1 kV and RON dropped to 0.3 mΩ⋅ cm2 at 125oC . The trade-off between B V and Rdr is superior to the 1D GaN limit. These results show the promise of vertical GaN SJ power devices. The self-aligned process is applicable for fabricating the heterogeneous SJ based on various wide- and ultra-wide bandgap semiconductors. | en |
| dc.description.sponsorship | This work is supported in part by Office of Naval Research monitored by Lynn Petersen (Grant N00014-21-1-2183), National Science Foundation (Grant ECCS-2036740), and CPES Power Management Industry Consortium. Device fabrication was conducted as part of a user project at the Center for Nanophase Materials Sciences, which is a DOE Office of Science User Facility at Oak Ridge National Laboratory. | en |
| dc.description.version | Accepted version | en |
| dc.format.extent | Pages 12-15 | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.citation | Y. Ma, M. Porter, Y. Qin, J. Spencer, Z. Du, M. Xiao, Y. Wang, I. Kravchenko, D. P. Briggs, D. K. Hensley, F. Udrea, M. Tadjer, H. Wang, and Y. Zhang, “1 kV Self-Aligned Vertical GaN Superjunction Diode,” IEEE Electron Device Lett., vol. 45, no. 1, pp. 12–15, Jan. 2024, doi: 10.1109/LED.2023.3332855. | en |
| dc.identifier.doi | https://doi.org/10.1109/LED.2023.3332855 | en |
| dc.identifier.eissn | 1558-0563 | en |
| dc.identifier.issn | 0741-3106 | en |
| dc.identifier.issue | 1 | en |
| dc.identifier.uri | https://hdl.handle.net/10919/117395 | en |
| dc.identifier.volume | 45 | en |
| dc.language.iso | en | en |
| dc.publisher | IEEE | en |
| dc.rights | Creative Commons Attribution 4.0 International | en |
| dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | en |
| dc.title | 1 kV Self-Aligned Vertical GaN Superjunction Diode | en |
| dc.title.serial | IEEE Electron Device Letters | en |
| dc.type | Article - Refereed | en |
| dc.type.dcmitype | Text | en |