Low temperature seeding process for ferroelectric memory device

A process for producing a ferroelectric lead zirconate titanate dielectric for a semiconductor device by applying a lead titanate seeding layer to a substrate before applying the lead zirconate titanate film, and a semiconductor device produced in accordance with the process. The lead titanate seeding layer allows the subsequent lead zirconate titanate to be annealed at a significantly lower seeding temperature, to lessen interdiffusion among the films, electrodes and substrate and to lessen thermal stresses.