Method and apparatus for current/power balancing

Aspects of the disclosure provide a system having a power circuit. The power circuit includes a first switch circuit having at least a first transistor and a second switch circuit having at least a second transistor. Further, the power circuit includes first interconnections configured to couple the first switch circuit to driving nodes, a source node and a drain node of the power circuit, and second interconnection configured to couple the second switch circuit in parallel to the first switch circuit to the driving nodes, the source node and the drain node of the power circuit. A polarity of unbalance in the first interconnections and the second interconnections dominates a polarity of current unbalance in the first switch circuit and the second switch circuit.