A Composable Workflow for Productive FPGA Computing via Whole-Program Analysis and Transformation (with Code Excerpts)

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dc.contributor.authorSathre, Paulen
dc.contributor.authorHelal, Ahmed E.en
dc.contributor.authorFeng, Wu-chunen
dc.contributor.departmentComputer Scienceen
dc.date.accessioned2018-07-25T15:14:25Zen
dc.date.available2018-07-25T15:14:25Zen
dc.date.issued2018-07-24en
dc.description.abstractWe present a composable workflow to enable highly-productive heterogeneous computing on FPGAs. The workflow consists of a trio of static analysis and transformation tools: (1) a whole-program, source-to-source translator to transform existing parallel code to OpenCL, (2) a set of OpenCL kernel linters, which target FPGAs to detect possible semantic errors and performance traps, and (3) a whole-program OpenCL linter to validate the host-to-device interface of OpenCL programs. The workflow promotes rapid realization of heterogeneous parallel code across a multitude of heterogeneous computing environments, particularly FPGAs, by providing complementary tools for automatic CUDA-to-OpenCL translation and compile-time OpenCL validation in advance of very expensive compilation, placement, and routing on FPGAs. The proposed tools perform whole-program analysis and transformation to tackle realworld, large-scale parallel applications. The efficacy of the workflow tools is demonstrated via a representative translation and analysis of a sizable CUDA finite automata processing engine as well as the analysis and validation of an additional 96 OpenCL benchmarks.en
dc.identifier.trnumberTR-18-05en
dc.identifier.urihttp://hdl.handle.net/10919/84388en
dc.language.isoenen
dc.publisherDepartment of Computer Science, Virginia Polytechnic Institute & State Universityen
dc.relation.ispartofComputer Science Technical Reportsen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectHigh Performance Computingen
dc.subjectParallel and Distributed Computingen
dc.subjectAlgorithmsen
dc.subjectComputer Systemsen
dc.titleA Composable Workflow for Productive FPGA Computing via Whole-Program Analysis and Transformation (with Code Excerpts)en
dc.typeTechnical reporten
dc.type.dcmitypeTexten

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