Resistive volatile/non-volatile floating electrode logic/memory cell
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Abstract
A resistive floating electrode device (RFED) provides a logic cell or non-volatile storage or dynamic or static random access memory on an extremely compact matrix with individual cells scalable to the minimum available lithographic feature size regime by providing atomic switches connected in anti-parallel relationship, preferably with a common inert electrode. Programming is facilitated by limiting current to a compliance current level in order to maintain an OB state from which the cell can be written to either the 0 or 1 state. A perfecting feature of the invention provides for selective operation of a cell as a diode or in a volatile or non-volatile storage mode within the same memory array. A series connection of three or more RFEDs in accordance with the invention having different ON state currents, OFF state currents and reset currents can be used as adaptive, neural or chaotic logic cells.